195 lines
7.1 KiB
C
195 lines
7.1 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file ARMCMx/chcore.c
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* @brief ARM Cortex-Mx architecture port code.
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*
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* @addtogroup ARMCMx_CORE
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* @{
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*/
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#include "ch.h"
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#include "nvic.h"
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/**
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* @brief Halts the system.
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* @note The function is declared as a weak symbol, it is possible
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* to redefine it in your application code.
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*/
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#if !defined(__DOXYGEN__)
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__attribute__((weak))
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#endif
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void port_halt(void) {
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port_disable();
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while (TRUE) {
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}
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}
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#if !CH_OPTIMIZE_SPEED
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void _port_lock(void) {
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register uint32_t tmp asm ("r3") = BASEPRI_KERNEL;
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asm volatile ("msr BASEPRI, %0" : : "r" (tmp));
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}
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void _port_unlock(void) {
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register uint32_t tmp asm ("r3") = BASEPRI_USER;
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asm volatile ("msr BASEPRI, %0" : : "r" (tmp));
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}
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#endif
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/**
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* @brief System Timer vector.
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* @details This interrupt is used as system tick.
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* @note The timer must be initialized in the startup code.
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*/
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void SysTickVector(void) {
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chSysLockFromIsr();
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chSysTimerHandlerI();
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if (chSchIsRescRequiredExI())
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SCB_ICSR = ICSR_PENDSVSET;
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chSysUnlockFromIsr();
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}
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#if CORTEX_MODEL == CORTEX_M0
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#define PUSH_CONTEXT(sp, prio) { \
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asm volatile ("mrs %0, PSP \n\t" \
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"sub %0, %0, #40 \n\t" \
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"stmia %0!, {r3-r7} \n\t" \
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"sub %0, %0, #20 \n\t" \
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"mov r3, r8 \n\t" \
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"str r3, [%0, #20] \n\t" \
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"mov r3, r9 \n\t" \
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"str r3, [%0, #24] \n\t" \
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"mov r3, r10 \n\t" \
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"str r3, [%0, #28] \n\t" \
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"mov r3, r11 \n\t" \
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"str r3, [%0, #32] \n\t" \
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"mov r3, lr \n\t" \
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"str r3, [%0, #36] \n\t" \
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: "=r" (sp) : "r" (sp), "r" (prio)); \
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}
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#define POP_CONTEXT(sp) { \
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asm volatile ("ldr r3, [%0, #20] \n\t" \
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"mov r8, r3 \n\t" \
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"ldr r3, [%0, #24] \n\t" \
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"mov r9, r3 \n\t" \
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"ldr r3, [%0, #28] \n\t" \
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"mov r10, r3 \n\t" \
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"ldr r3, [%0, #32] \n\t" \
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"mov r11, r3 \n\t" \
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"ldr r3, [%0, #36] \n\t" \
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"mov lr, r3 \n\t" \
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"ldmia %0!, {r3-r7} \n\t" \
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"add %0, %0, #20 \n\t" \
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"msr PSP, %0 \n\t" \
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"msr BASEPRI, r3 \n\t" \
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"bx lr" : "=r" (sp) : "r" (sp)); \
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}
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#else /* CORTEX_MODEL != CORTEX_M0 */
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#if !defined(CH_CURRP_REGISTER_CACHE)
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#define PUSH_CONTEXT(sp, prio) { \
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asm volatile ("mrs %0, PSP \n\t" \
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"stmdb %0!, {r3-r11,lr}" : \
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"=r" (sp) : "r" (sp), "r" (prio)); \
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}
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#define POP_CONTEXT(sp) { \
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asm volatile ("ldmia %0!, {r3-r11, lr} \n\t" \
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"msr PSP, %0 \n\t" \
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"msr BASEPRI, r3 \n\t" \
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"bx lr" : "=r" (sp) : "r" (sp)); \
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}
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#else /* defined(CH_CURRP_REGISTER_CACHE) */
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#define PUSH_CONTEXT(sp, prio) { \
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asm volatile ("mrs %0, PSP \n\t" \
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"stmdb %0!, {r3-r6,r8-r11, lr}" : \
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"=r" (sp) : "r" (sp), "r" (prio)); \
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}
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#define POP_CONTEXT(sp) { \
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asm volatile ("ldmia %0!, {r3-r6,r8-r11, lr} \n\t" \
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"msr PSP, %0 \n\t" \
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"msr BASEPRI, r3 \n\t" \
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"bx lr" : "=r" (sp) : "r" (sp)); \
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}
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#endif /* defined(CH_CURRP_REGISTER_CACHE) */
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#endif /* CORTEX_MODEL != CORTEX_M0 */
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/**
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* @brief SVC vector.
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* @details The SVC vector is used for commanded context switch. Structures
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* @p intctx are saved and restored from the process stacks of the
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* switched threads.
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*
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* @param[in] ntp the thread to be switched it
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* @param[in] otp the thread to be switched out
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*/
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#if !defined(__DOXYGEN__)
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__attribute__((naked))
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#endif
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void SVCallVector(Thread *ntp, Thread *otp) {
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register struct intctx *sp_thd asm("r2");
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register uint32_t prio asm ("r3");
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asm volatile ("mrs r3, BASEPRI" : "=r" (prio) : );
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PUSH_CONTEXT(sp_thd, prio)
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otp->p_ctx.r13 = sp_thd;
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sp_thd = ntp->p_ctx.r13;
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POP_CONTEXT(sp_thd)
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}
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/**
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* @brief Preemption code.
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*/
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#if !defined(__DOXYGEN__)
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__attribute__((naked))
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#endif
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void PendSVVector(void) {
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register struct intctx *sp_thd asm("r2");
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register uint32_t prio asm ("r3");
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Thread *otp, *ntp;
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chSysLockFromIsr();
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prio = CORTEX_BASEPRI_USER;
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PUSH_CONTEXT(sp_thd, prio)
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(otp = currp)->p_ctx.r13 = sp_thd;
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ntp = fifo_remove(&rlist.r_queue);
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setcurrp(ntp);
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ntp->p_state = THD_STATE_CURRENT;
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chSchReadyI(otp);
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#if CH_TIME_QUANTUM > 0
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/* Set the round-robin time quantum.*/
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rlist.r_preempt = CH_TIME_QUANTUM;
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#endif
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chDbgTrace(otp);
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sp_thd = ntp->p_ctx.r13;
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POP_CONTEXT(sp_thd)
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}
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/** @} */
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