189 lines
5.3 KiB
C
189 lines
5.3 KiB
C
/*
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ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/*
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Concepts and parts of this file have been contributed by Uladzimir Pylinsky
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aka barthess.
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*/
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/**
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* @file fsmc.c
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* @brief FSMC Driver subsystem low level driver source template.
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*
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* @addtogroup FSMC
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* @{
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*/
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#include "hal.h"
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#include "fsmc.h"
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#if HAL_USE_NAND || STM32_USE_FSMC_SRAM || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/**
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* @brief FSMC1 driver identifier.
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*/
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#if STM32_FSMC_USE_FSMC1 || defined(__DOXYGEN__)
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FSMCDriver FSMCD1;
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#endif
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/*===========================================================================*/
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/* Driver local types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Low level FSMC driver initialization.
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*
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* @notapi
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*/
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void fsmc_init(void) {
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if (FSMCD1.state == FSMC_UNINIT) {
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FSMCD1.state = FSMC_STOP;
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#if STM32_SRAM_USE_FSMC_SRAM1
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FSMCD1.sram1 = (FSMC_SRAM_NOR_TypeDef *)(FSMC_Bank1_R_BASE);
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#endif
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#if STM32_SRAM_USE_FSMC_SRAM2
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FSMCD1.sram2 = (FSMC_SRAM_NOR_TypeDef *)(FSMC_Bank1_R_BASE + 8);
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#endif
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#if STM32_SRAM_USE_FSMC_SRAM3
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FSMCD1.sram3 = (FSMC_SRAM_NOR_TypeDef *)(FSMC_Bank1_R_BASE + 8 * 2);
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#endif
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#if STM32_SRAM_USE_FSMC_SRAM4
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FSMCD1.sram4 = (FSMC_SRAM_NOR_TypeDef *)(FSMC_Bank1_R_BASE + 8 * 3);
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#endif
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#if STM32_NAND_USE_FSMC_NAND1
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FSMCD1.nand1 = (FSMC_NAND_TypeDef *)FSMC_Bank2_R_BASE;
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#endif
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#if STM32_NAND_USE_FSMC_NAND2
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FSMCD1.nand2 = (FSMC_NAND_TypeDef *)FSMC_Bank3_R_BASE;
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#endif
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#if STM32_USE_FSMC_PCCARD
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FSMCD1.pccard = (FSMC_PCCARD_TypeDef *)FSMC_Bank4_R_BASE;
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#endif
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}
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}
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/**
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* @brief Configures and activates the FSMC peripheral.
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*
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* @param[in] fsmcp pointer to the @p FSMCDriver object
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*
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* @notapi
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*/
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void fsmc_start(FSMCDriver *fsmcp) {
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osalDbgAssert((fsmcp->state == FSMC_STOP) || (fsmcp->state == FSMC_READY),
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"invalid state");
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if (fsmcp->state == FSMC_STOP) {
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/* Enables the peripheral.*/
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#if STM32_FSMC_USE_FSMC1
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if (&FSMCD1 == fsmcp) {
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rccResetFSMC();
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rccEnableFSMC(FALSE);
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#if (!STM32_NAND_USE_EXT_INT && HAL_USE_NAND)
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nvicEnableVector(STM32_FSMC_NUMBER, STM32_FSMC_FSMC1_IRQ_PRIORITY);
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#endif
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}
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#endif /* STM32_FSMC_USE_FSMC1 */
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fsmcp->state = FSMC_READY;
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}
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}
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/**
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* @brief Deactivates the FSMC peripheral.
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*
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* @param[in] emcp pointer to the @p FSMCDriver object
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*
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* @notapi
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*/
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void fsmc_stop(FSMCDriver *fsmcp) {
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if (fsmcp->state == FSMC_READY) {
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/* Resets the peripheral.*/
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rccResetFSMC();
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/* Disables the peripheral.*/
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#if STM32_FSMC_USE_FSMC1
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if (&FSMCD1 == fsmcp) {
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#if (!STM32_NAND_USE_EXT_INT && HAL_USE_NAND)
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nvicDisableVector(STM32_FSMC_NUMBER);
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#endif
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rccDisableFSMC(FALSE);
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}
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#endif /* STM32_FSMC_USE_FSMC1 */
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fsmcp->state = FSMC_STOP;
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}
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}
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#if !STM32_NAND_USE_EXT_INT
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/**
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* @brief FSMC shared interrupt handler.
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*
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* @notapi
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*/
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CH_IRQ_HANDLER(STM32_FSMC_HANDLER) {
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CH_IRQ_PROLOGUE();
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#if STM32_NAND_USE_FSMC_NAND1
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if (FSMCD1.nand1->SR & FSMC_SR_ISR_MASK){
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NANDD1.isr_handler(&NANDD1);
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}
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#endif
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#if STM32_NAND_USE_FSMC_NAND2
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if (FSMCD1.nand2->SR & FSMC_SR_ISR_MASK){
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NANDD2.isr_handler(&NANDD2);
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}
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#endif
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CH_IRQ_EPILOGUE();
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}
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#endif /* !STM32_NAND_USE_EXT_INT */
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#endif /* HAL_USE_FSMC || STM32_USE_FSMC_SRAM */
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/** @} */
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