805 lines
32 KiB
Plaintext
805 lines
32 KiB
Plaintext
/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @defgroup IO HAL
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* @brief Hardware Abstraction Layer.
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* @details Under ChibiOS/RT the set of the various device driver interfaces
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* is called the HAL subsystem: Hardware Abstraction Layer. The HAL is the
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* abstract interface between ChibiOS/RT application and hardware.
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*
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* @section hal_device_driver_arch HAL Device Drivers Architecture
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* A device driver is usually split in two layers:
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* - High Level Device Driver (<b>HLD</b>). This layer contains the definitions
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* of the driver's APIs and the platform independent part of the driver.<br>
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* An HLD is composed by two files:
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* - @p @<driver@>.c, the HLD implementation file. This file must be
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* included in the Makefile in order to use the driver.
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* - @p @<driver@>.h, the HLD header file. This file is implicitly
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* included by the HAL header file @p hal.h.
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* .
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* - Low Level Device Driver (<b>LLD</b>). This layer contains the platform
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* dependent part of the driver.<br>
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* A LLD is composed by two files:
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* - @p @<driver@>_lld.c, the LLD implementation file. This file must be
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* included in the Makefile in order to use the driver.
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* - @p @<driver@>_lld.h, the LLD header file. This file is implicitly
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* included by the HLD header file.
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* .
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* The LLD may be not present in those drivers that do not access the
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* hardware directly but through other device drivers, as example the
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* @ref MMC_SPI driver uses the @ref SPI and @ref PAL drivers in order
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* to implement its functionalities.
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* .
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* @subsection hal_device_driver_diagram Diagram
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* @dot
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digraph example {
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node [shape=rectangle, fontname=Helvetica, fontsize=8,
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fixedsize="true", width="2.0", height="0.4"];
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edge [fontname=Helvetica, fontsize=8];
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app [label="Application"];
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hld [label="High Level Driver"];
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lld [label="Low Level Driver"];
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hw [label="Microcontroller Hardware"];
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hal_lld [label="HAL shared low level code"];
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app->hld;
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hld->lld;
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lld-> hw;
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lld->hal_lld;
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hal_lld->hw;
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}
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* @enddot
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*/
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/**
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* @defgroup HAL_CONF Configuration
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* @brief @ref HAL Configuration.
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* @details The file @p halconf.h contains the high level settings for all
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* the drivers supported by the HAL. The low level, platform dependent,
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* settings are contained in the @p mcuconf.h file instead and are describe
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* in the various platforms reference manuals.
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*
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* @ingroup IO
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*/
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/**
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* @defgroup HAL HAL Driver
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* @brief Hardware Abstraction Layer.
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* @details The HAL driver performs the system initialization and includes
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* the platform support code shared by the other drivers. This driver does
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* contain any API function except for a general initialization function
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* @p halInit() that must be invoked before any HAL service can be used,
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* usually the HAL initialization is performed immediately before the
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* kernel initialization.
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*
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* @ingroup IO
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*/
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/**
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* @defgroup HAL_LLD HAL Low Level Driver
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* @brief @ref HAL low level driver template.
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*
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* @ingroup HAL
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*/
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/**
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* @defgroup PAL PAL Driver
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* @brief I/O Ports Abstraction Layer
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* @details This module defines an abstract interface for digital I/O ports.
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* Note that most I/O ports functions are just macros. The macros
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* have default software implementations that can be redefined in a
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* @ref PAL_LLD if the target hardware supports special features like, as
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* example, atomic bit set/reset/masking. Please refer to the ports specific
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* documentation for details.<br>
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* The @ref PAL has the advantage to make the access to the I/O ports platform
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* independent and still be optimized for the specific architectures.<br>
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* Note that the @ref PAL_LLD may also offer non standard macro and functions
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* in order to support specific features but, of course, the use of such
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* interfaces would not be portable. Such interfaces shall be marked with
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* the architecture name inside the function names.
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* @pre In order to use the ADC driver the @p CH_HAL_USE_PAL option
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* must be enabled in @p halconf.h.
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*
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* @section pal_1 Implementation Rules
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* In implementing an @ref PAL_LLD there are some rules/behaviors that
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* should be respected.
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*
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* @subsection pal_1_1 Writing on input pads
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* The behavior is not specified but there are implementations better than
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* others, this is the list of possible implementations, preferred options
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* are on top:
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* -# The written value is not actually output but latched, should the pads
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* be reprogrammed as outputs the value would be in effect.
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* -# The write operation is ignored.
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* -# The write operation has side effects, as example disabling/enabling
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* pull up/down resistors or changing the pad direction. This scenario is
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* discouraged, please try to avoid this scenario.
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* .
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* @subsection pal_1_2 Reading from output pads
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* The behavior is not specified but there are implementations better than
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* others, this is the list of possible implementations, preferred options
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* are on top:
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* -# The actual pads states are read (not the output latch).
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* -# The output latch value is read (regardless of the actual pads states).
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* -# Unspecified, please try to avoid this scenario.
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* .
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* @subsection pal_1_3 Writing unused or unimplemented port bits
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* The behavior is not specified.
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*
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* @subsection pal_1_4 Reading from unused or unimplemented port bits
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* The behavior is not specified.
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*
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* @subsection pal_1_5 Reading or writing on pins associated to other functionalities
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* The behavior is not specified.
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*
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* @ingroup IO
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*/
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/**
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* @defgroup PAL_LLD PAL Low Level Driver
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* @brief @ref PAL low level driver template.
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* @details This file is a template for an I/O port low level driver not an
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* actual implementation. This template is only meant as documentation of
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* a generic @ref PAL_LLD entry points.
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*
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* @ingroup PAL
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*/
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/**
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* @defgroup SERIAL Serial Driver
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* @brief Generic Serial Driver.
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* @details This module implements a generic full duplex serial driver. The
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* driver implements a @p SerialDriver interface and uses I/O Queues for
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* communication between the upper and the lower driver. Event flags are used
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* to notify the application about incoming data, outgoing data and other I/O
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* events.<br>
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* The module also contains functions that make the implementation of the
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* interrupt service routines much easier.
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* @pre In order to use the ADC driver the @p CH_HAL_USE_SERIAL option
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* must be enabled in @p halconf.h.
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*
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* @ingroup IO
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*/
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/**
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* @defgroup SERIAL_LLD Serial Low Level Driver
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* @brief @ref SERIAL low level driver template.
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* @details This file is a template for a serial low level driver not an
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* actual implementation. This template is only meant as documentation of
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* a generic @ref SERIAL_LLD entry points.
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*
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* @ingroup SERIAL
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*/
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/**
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* @defgroup I2C I2C Driver
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* @brief Generic I2C Driver.
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* @details This module implements a generic I2C driver.
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* @pre In order to use the ADC driver the @p CH_HAL_USE_I2C option
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* must be enabled in @p halconf.h.
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*
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* @section i2c_1 Driver State Machine
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* The driver implements a state machine internally, not all the driver
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* functionalities can be used in any moment, any transition not explicitly
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* shown in the following diagram has to be considered an error and shall
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* be captured by an assertion (if enabled).
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* @if LATEX_PDF
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* @else
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* @endif
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*
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* The driver is not thread safe for performance reasons, if you need to access
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* the I2C bus from multiple thread then use the @p i2cAcquireBus() and
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* @p i2cReleaseBus() APIs in order to gain exclusive access.
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*
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* @ingroup IO
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*/
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/**
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* @defgroup I2C_LLD I2C Low Level Driver
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* @brief @ref I2C low level driver template.
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* @details This file is a template for an I2C low level driver not an
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* actual implementation. This template is only meant as documentation of
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* a generic @ref I2C_LLD entry points.
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*
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* @ingroup I2C
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*/
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/**
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* @defgroup SPI SPI Driver
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* @brief Generic SPI Driver.
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* @details This module implements a generic SPI driver.
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* @pre In order to use the ADC driver the @p CH_HAL_USE_SPI option
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* must be enabled in @p halconf.h.
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*
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* @section spi_1 Driver State Machine
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* The driver implements a state machine internally, not all the driver
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* functionalities can be used in any moment, any transition not explicitly
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* shown in the following diagram has to be considered an error and shall
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* be captured by an assertion (if enabled).
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* @if LATEX_PDF
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* @dot
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digraph example {
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size="5, 7";
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rankdir="LR";
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node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
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edge [fontname=Helvetica, fontsize=8];
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stop [label="SPI_STOP\nLow Power"];
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uninit [label="SPI_UNINIT", style="bold"];
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ready [label="SPI_READY\nClock Enabled"];
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active [label="SPI_ACTIVE\nBus Active"];
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complete [label="SPI_COMPLETE\nComplete"];
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uninit -> stop [label="\n spiInit()", constraint=false];
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stop -> ready [label="\nspiStart()"];
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ready -> ready [label="\nspiSelect()\nspiUnselect()\nspiStart()"];
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ready -> stop [label="\nspiStop()"];
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stop -> stop [label="\nspiStop()"];
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ready -> active [label="\nspiStartXXXI() (async)\nspiXXX() (sync)"];
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active -> ready [label="\nsync return"];
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active -> complete [label="\nasync callback\n>spc_endcb<"];
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complete -> active [label="\nspiStartXXXI() (async)\nthen\ncallback return"];
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complete -> ready [label="\ncallback return"];
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}
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* @else
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* @dot
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digraph example {
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rankdir="LR";
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node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
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edge [fontname=Helvetica, fontsize=8];
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|
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stop [label="SPI_STOP\nLow Power"];
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uninit [label="SPI_UNINIT", style="bold"];
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ready [label="SPI_READY\nClock Enabled"];
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active [label="SPI_ACTIVE\nBus Active"];
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complete [label="SPI_COMPLETE\nComplete"];
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uninit -> stop [label="\n spiInit()", constraint=false];
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stop -> ready [label="\nspiStart()"];
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ready -> ready [label="\nspiSelect()\nspiUnselect()\nspiStart()"];
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ready -> stop [label="\nspiStop()"];
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stop -> stop [label="\nspiStop()"];
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ready -> active [label="\nspiStartXXX() (async)\nspiXXX() (sync)"];
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active -> ready [label="\nsync return"];
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active -> complete [label="\nasync callback\n>spc_endcb<"];
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complete -> active [label="\nspiStartXXXI() (async)\nthen\ncallback return"];
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complete -> ready [label="\ncallback return"];
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}
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* @enddot
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* @endif
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*
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* The driver is not thread safe for performance reasons, if you need to access
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* the SPI bus from multiple thread then use the @p spiAcquireBus() and
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* @p spiReleaseBus() APIs in order to gain exclusive access.
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*
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* @ingroup IO
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*/
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/**
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* @defgroup SPI_LLD SPI Low Level Driver
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* @brief @ref SPI low level driver template.
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* @details This file is a template for an SPI low level driver not an
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* actual implementation. This template is only meant as documentation of
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* a generic @ref SPI_LLD entry points.
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*
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* @ingroup SPI
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*/
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/**
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* @defgroup ADC ADC Driver
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* @brief Generic ADC Driver.
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* @details This module implements a generic ADC driver.
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* @pre In order to use the ADC driver the @p CH_HAL_USE_ADC option
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* must be enabled in @p halconf.h.
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*
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* @section adc_1 Driver State Machine
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* The driver implements a state machine internally, not all the driver
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* functionalities can be used in any moment, any transition not explicitly
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* shown in the following diagram has to be considered an error and shall
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* be captured by an assertion (if enabled).
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* @if LATEX_PDF
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* @dot
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|
digraph example {
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|
size="5, 7";
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|
rankdir="LR";
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|
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
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|
edge [fontname=Helvetica, fontsize=8];
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|
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stop [label="ADC_STOP\nLow Power"];
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uninit [label="ADC_UNINIT", style="bold"];
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ready [label="ADC_READY\nClock Enabled"];
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active [label="ADC_ACTIVE\nConverting"];
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complete [label="ADC_COMPLETE\nComplete"];
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uninit -> stop [label="\n adcInit()", constraint=false];
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stop -> ready [label="\nadcStart()"];
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ready -> ready [label="\nadcStart()\nadcStopConversion()"];
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ready -> stop [label="\nadcStop()"];
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stop -> stop [label="\nadcStop()"];
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ready -> active [label="\nadcStartConversion() (async)\nadcConvert() (sync)"];
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active -> ready [label="\nadcStopConversion()\nsync return"];
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active -> active [label="\nasync callback (half buffer)\nasync callback (full buffer circular)\n>acg_endcb<"];
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active -> complete [label="\nasync callback (full buffer)\n>acg_endcb<"];
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complete -> active [label="\nadcStartConversionI()\nthen\ncallback return()"];
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complete -> ready [label="\ncallback return"];
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}
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* @enddot
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* @else
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* @dot
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digraph example {
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|
rankdir="LR";
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|
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
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|
edge [fontname=Helvetica, fontsize=8];
|
|
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|
stop [label="ADC_STOP\nLow Power"];
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|
uninit [label="ADC_UNINIT", style="bold"];
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|
ready [label="ADC_READY\nClock Enabled"];
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active [label="ADC_ACTIVE\nConverting"];
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complete [label="ADC_COMPLETE\nComplete"];
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uninit -> stop [label="\n adcInit()", constraint=false];
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stop -> ready [label="\nadcStart()"];
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ready -> ready [label="\nadcStart()\nadcStopConversion()"];
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ready -> stop [label="\nadcStop()"];
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stop -> stop [label="\nadcStop()"];
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ready -> active [label="\nadcStartConversion() (async)\nadcConvert() (sync)"];
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active -> ready [label="\nadcStopConversion()\nsync return"];
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active -> active [label="\nasync callback (half buffer)\nasync callback (full buffer circular)\n>acg_endcb<"];
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active -> complete [label="\nasync callback (full buffer)\n>acg_endcb<"];
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complete -> active [label="\nadcStartConversionI()\nthen\ncallback return()"];
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complete -> ready [label="\ncallback return"];
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}
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* @enddot
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* @endif
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*
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* @section adc_2 ADC Operations
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* The ADC driver is quite complex, an explanation of the terminology and of
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* the operational details follows.
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*
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* @subsection adc_2_1 ADC Conversion Groups
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* The @p ADCConversionGroup is the objects that specifies a physical
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* conversion operation. This structure contains some standard fields and
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* several implementation-dependent fields.<br>
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* The standard fields define the CG mode, the number of channels belonging
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* to the CG and the optional callbacks.<br>
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* The implementation-dependent fields specify the physical ADC operation
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* mode, the analog channels belonging to the group and any other
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* implementation-specific setting. Usually the extra fields just mirror
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* the physical ADC registers, please refer to the vendor's MCU Reference
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* Manual for details about the available settings. Details are also available
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* into the documentation of the ADC low level drivers and in the various
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* sample applications.
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*
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* @subsection adc_2_2 ADC Conversion Modes
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* The driver supports several conversion modes:
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* - <b>One Shot</b>, the driver performs a single group conversion then stops.
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* - <b>Linear Buffer</b>, the driver performs a series of group conversions
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* then stops. This mode is like a one shot conversion repeated N times,
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* the buffer pointer increases after each conversion. The buffer is
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* organized as an S(CG)*N samples matrix, when S(CG) is the conversion
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* group size (number of channels) and N is the buffer depth (number of
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* repeated conversions).
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* - <b>Circular Buffer</b>, much like the linear mode but the operation does
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* not stop when the buffer is filled, it is automatically restarted
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* with the buffer pointer wrapping back to the buffer base.
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* .
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* @subsection adc_2_3 ADC Callbacks
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* The driver is able to invoke callbacks during the conversion process. A
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* callback is invoked when the operation has been completed or, in circular
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* mode, when the buffer has been filled and the operation is restarted. In
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* linear and circular modes a callback is also invoked when the buffer is
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* half filled.<br>
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* The "half filled" and "filled" callbacks in circular mode allow to
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* implement "streaming processing" of the sampled data, while the driver is
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* busy filling one half of the buffer the application can process the
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* other half, this allows for continuous interleaved operations.
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*
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* @ingroup IO
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*/
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/**
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* @defgroup ADC_LLD ADC Low Level Driver
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* @brief @ref ADC low level driver template.
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* @details This file is a template for an ADC low level driver not an
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* actual implementation. This template is only meant as documentation of
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* a generic @ref ADC_LLD entry points.
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*
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* @ingroup ADC
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*/
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/**
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* @defgroup CAN CAN Driver
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* @brief Generic CAN Driver.
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* @details This module implements a generic ADC driver.
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* @pre In order to use the ADC driver the @p CH_HAL_USE_CAN option
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* must be enabled in @p halconf.h.
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*
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* @section can_1 Driver State Machine
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* The driver implements a state machine internally, not all the driver
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|
* functionalities can be used in any moment, any transition not explicitly
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|
* shown in the following diagram has to be considered an error and shall
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|
* be captured by an assertion (if enabled).
|
|
* @if LATEX_PDF
|
|
* @dot
|
|
digraph example {
|
|
size="5, 7";
|
|
rankdir="LR";
|
|
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
|
|
edge [fontname=Helvetica, fontsize=8];
|
|
|
|
stop [label="CAN_STOP\nLow Power"];
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uninit [label="CAN_UNINIT", style="bold"];
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starting [label="CAN_STARTING\nInitializing"];
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ready [label="CAN_READY\nClock Enabled"];
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sleep [label="CAN_SLEEP\nLow Power"];
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uninit -> stop [label=" canInit()", constraint=false];
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stop -> stop [label="\ncanStop()"];
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stop -> ready [label="\ncanStart()\n(fast implementation)"];
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stop -> starting [label="\ncanStart()\n(slow implementation)"];
|
|
starting -> starting [label="\ncanStart()\n(other thread)"];
|
|
starting -> ready [label="\ninitialization complete\n(all threads)"];
|
|
ready -> stop [label="\ncanStop()"];
|
|
ready -> ready [label="\ncanStart()\ncanReceive()\ncanTransmit()"];
|
|
ready -> sleep [label="\ncanSleep()"];
|
|
sleep -> sleep [label="\ncanSleep()"];
|
|
sleep -> ready [label="\ncanWakeup()"];
|
|
sleep -> ready [label="\nhardware\nwakeup event"];
|
|
}
|
|
* @enddot
|
|
* @else
|
|
* @dot
|
|
digraph example {
|
|
rankdir="LR";
|
|
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
|
|
edge [fontname=Helvetica, fontsize=8];
|
|
|
|
stop [label="CAN_STOP\nLow Power"];
|
|
uninit [label="CAN_UNINIT", style="bold"];
|
|
starting [label="CAN_STARTING\nInitializing"];
|
|
ready [label="CAN_READY\nClock Enabled"];
|
|
sleep [label="CAN_SLEEP\nLow Power"];
|
|
|
|
uninit -> stop [label=" canInit()", constraint=false];
|
|
stop -> stop [label="\ncanStop()"];
|
|
stop -> ready [label="\ncanStart()\n(fast implementation)"];
|
|
stop -> starting [label="\ncanStart()\n(slow implementation)"];
|
|
starting -> starting [label="\ncanStart()\n(other thread)"];
|
|
starting -> ready [label="\ninitialization complete\n(all threads)"];
|
|
ready -> stop [label="\ncanStop()"];
|
|
ready -> ready [label="\ncanStart()\ncanReceive()\ncanTransmit()"];
|
|
ready -> sleep [label="\ncanSleep()"];
|
|
sleep -> sleep [label="\ncanSleep()"];
|
|
sleep -> ready [label="\ncanWakeup()"];
|
|
sleep -> ready [label="\nhardware\nwakeup event"];
|
|
}
|
|
* @enddot
|
|
* @endif
|
|
*
|
|
* @ingroup IO
|
|
*/
|
|
|
|
/**
|
|
* @defgroup CAN_LLD CAN Low Level Driver
|
|
* @brief @ref CAN low level driver template.
|
|
* @details This file is a template for a CAN low level driver not an
|
|
* actual implementation. This template is only meant as documentation of
|
|
* a generic @ref CAN_LLD entry points.
|
|
*
|
|
* @ingroup CAN
|
|
*/
|
|
|
|
/**
|
|
* @defgroup PWM PWM Driver
|
|
* @brief Generic PWM Driver.
|
|
* @details This module implements a generic PWM driver.
|
|
* @pre In order to use the ADC driver the @p CH_HAL_USE_PWM option
|
|
* must be enabled in @p halconf.h.
|
|
*
|
|
* @section pwm_1 Driver State Machine
|
|
* The driver implements a state machine internally, not all the driver
|
|
* functionalities can be used in any moment, any transition not explicitly
|
|
* shown in the following diagram has to be considered an error and shall
|
|
* be captured by an assertion (if enabled).
|
|
* @dot
|
|
digraph example {
|
|
rankdir="LR";
|
|
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
|
|
edge [fontname=Helvetica, fontsize=8];
|
|
uninit [label="PWM_UNINIT", style="bold"];
|
|
stop [label="PWM_STOP\nLow Power"];
|
|
ready [label="PWM_READY\nClock Enabled"];
|
|
uninit -> stop [label="pwmInit()"];
|
|
stop -> stop [label="pwmStop()"];
|
|
stop -> ready [label="pwmStart()"];
|
|
ready -> stop [label="pwmStop()"];
|
|
ready -> ready [label="pwmEnableChannel()\npwmDisableChannel()"];
|
|
}
|
|
* @enddot
|
|
*
|
|
* @section pwm_1 PWM Operations.
|
|
* This driver abstracts a generic PWM times composed of:
|
|
* - A main up counter.
|
|
* - A comparator register that resets the main counter to zero when the limit
|
|
* is reached. An optional callback can be generated when this happens.
|
|
* - An array of @p PWM_CHANNELS PWM channels, each channel has an output,
|
|
* a comparator and is able to invoke an optional callback when a comparator
|
|
* match with the main counter happens.
|
|
* .
|
|
* A PWM channel output can be in two different states:
|
|
* - <b>IDLE</b>, when the channel is disabled or after a match occurred.
|
|
* - <b>ACTIVE</b>, when the channel is enabled and a match didn't occur yet
|
|
* in the current PWM cycle.
|
|
* .
|
|
* Note that the two states can be associated to both logical zero or one in
|
|
* the @p PWMChannelConfig structure.
|
|
*
|
|
* @ingroup IO
|
|
*/
|
|
|
|
/**
|
|
* @defgroup PWM_LLD PWM Low Level Driver
|
|
* @brief @ref PWM low level driver template.
|
|
* @details This file is a template for a PWM low level driver not an
|
|
* actual implementation. This template is only meant as documentation of
|
|
* a generic @ref PWM_LLD entry points.
|
|
*
|
|
* @ingroup PWM
|
|
*/
|
|
|
|
/**
|
|
* @defgroup MAC MAC Driver
|
|
* @brief Generic MAC driver.
|
|
* @details This module implements a generic interface for MAC (Media
|
|
* Access Control) drivers, as example Ethernet controllers.
|
|
* @pre In order to use the ADC driver the @p CH_HAL_USE_MAC option
|
|
* must be enabled in @p halconf.h.
|
|
*
|
|
* @ingroup IO
|
|
*/
|
|
|
|
/**
|
|
* @defgroup MAC_LLD MAC Low Level Driver
|
|
* @brief @ref MAC low level driver template.
|
|
* @details This file is a template for a MAC low level driver not an
|
|
* actual implementation. This template is only meant as documentation of
|
|
* a generic @ref MAC_LLD entry points.
|
|
*
|
|
* @ingroup MAC
|
|
*/
|
|
|
|
/**
|
|
* @defgroup MMC_SPI MMC over SPI Driver
|
|
* @brief Generic MMC driver.
|
|
* @details This module implements a portable MMC driver that uses a SPI
|
|
* driver as physical layer.
|
|
* @pre In order to use the ADC driver the @p CH_HAL_USE_MMC_SPI option
|
|
* must be enabled in @p halconf.h.
|
|
*
|
|
* @section mmc_spi_1 Driver State Machine
|
|
* The driver implements a state machine internally, not all the driver
|
|
* functionalities can be used in any moment, any transition not explicitly
|
|
* shown in the following diagram has to be considered an error and shall
|
|
* be captured by an assertion (if enabled).
|
|
* @if LATEX_PDF
|
|
* @dot
|
|
digraph example {
|
|
size="5, 7";
|
|
rankdir="LR";
|
|
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
|
|
edge [fontname=Helvetica, fontsize=8];
|
|
|
|
any [label="Any State"];
|
|
stop2 [label="MMC_STOP\nLow Power"];
|
|
uninit [label="MMC_UNINIT", style="bold"];
|
|
stop [label="MMC_STOP\nLow Power"];
|
|
wait [label="MMC_WAIT\nWaiting Card"];
|
|
inserted [label="MMC_INSERTED\nCard Inserted"];
|
|
ready [label="MMC_READY\nCard Ready"];
|
|
reading [label="MMC_READING\nReading"];
|
|
writing [label="MMC_WRITING\nWriting"];
|
|
|
|
uninit -> stop [label="mmcInit()"];
|
|
stop -> wait [label="mmcStart()", constraint=false];
|
|
wait -> inserted [label="insertion (inserted event)"];
|
|
inserted -> inserted [label="mmcDisconnect()"];
|
|
inserted -> ready [label="mmcConnect()"];
|
|
ready -> ready [label="mmcConnect()"];
|
|
ready -> inserted [label="mmcDisconnect()"];
|
|
ready -> reading [label="mmcStartSequentialRead()"];
|
|
reading -> reading [label="mmcSequentialRead()"];
|
|
reading -> ready [label="mmcStopSequentialRead()"];
|
|
reading -> ready [label="read error"];
|
|
ready -> writing [label="mmcStartSequentialWrite()"];
|
|
writing -> writing [label="mmcSequentialWrite()"];
|
|
writing -> ready [label="mmcStopSequentialWrite()"];
|
|
writing -> ready [label="write error"];
|
|
inserted -> wait [label="removal (removed event)"];
|
|
ready -> wait [label="removal (removed event)"];
|
|
reading -> wait [label="removal (removed event)"];
|
|
writing -> wait [label="removal (removed event)"];
|
|
|
|
any -> stop2 [label="mmcStop()"];
|
|
}
|
|
* @enddot
|
|
* @else
|
|
* @dot
|
|
digraph example {
|
|
rankdir="LR";
|
|
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
|
|
edge [fontname=Helvetica, fontsize=8];
|
|
|
|
any [label="Any State"];
|
|
stop2 [label="MMC_STOP\nLow Power"];
|
|
uninit [label="MMC_UNINIT", style="bold"];
|
|
stop [label="MMC_STOP\nLow Power"];
|
|
wait [label="MMC_WAIT\nWaiting Card"];
|
|
inserted [label="MMC_INSERTED\nCard Inserted"];
|
|
ready [label="MMC_READY\nCard Ready"];
|
|
reading [label="MMC_READING\nReading"];
|
|
writing [label="MMC_WRITING\nWriting"];
|
|
|
|
uninit -> stop [label="mmcInit()"];
|
|
stop -> wait [label="mmcStart()", constraint=false];
|
|
wait -> inserted [label="insertion (inserted event)"];
|
|
inserted -> inserted [label="mmcDisconnect()"];
|
|
inserted -> ready [label="mmcConnect()"];
|
|
ready -> ready [label="mmcConnect()"];
|
|
ready -> inserted [label="mmcDisconnect()"];
|
|
ready -> reading [label="mmcStartSequentialRead()"];
|
|
reading -> reading [label="mmcSequentialRead()"];
|
|
reading -> ready [label="mmcStopSequentialRead()"];
|
|
reading -> ready [label="read error"];
|
|
ready -> writing [label="mmcStartSequentialWrite()"];
|
|
writing -> writing [label="mmcSequentialWrite()"];
|
|
writing -> ready [label="mmcStopSequentialWrite()"];
|
|
writing -> ready [label="write error"];
|
|
inserted -> wait [label="removal (removed event)"];
|
|
ready -> wait [label="removal (removed event)"];
|
|
reading -> wait [label="removal (removed event)"];
|
|
writing -> wait [label="removal (removed event)"];
|
|
|
|
any -> stop2 [label="mmcStop()"];
|
|
}
|
|
* @enddot
|
|
* @endif
|
|
*
|
|
* The MMC drivers currently supports only cards with capacity up to 2GB
|
|
* and does not implement CRC checking. Hot plugging and removal are supported
|
|
* through kernel events.
|
|
*
|
|
* @ingroup IO
|
|
*/
|
|
|
|
|
|
/**
|
|
* @defgroup UART UART Driver
|
|
* @brief Generic UART Driver.
|
|
* @details This driver abstracts a generic UART peripheral, the API is
|
|
* designed to be:
|
|
* - Unbuffered and copy-less, transfers are always directly performed
|
|
* from/to the application-level buffers without extra copy operations.
|
|
* - Asynchronous, the API is always non blocking.
|
|
* - Callbacks capable, operations completion and other events are notified
|
|
* via callbacks.
|
|
* .
|
|
* Special hardware features like deep hardware buffers, DMA transfers
|
|
* are hidden to the user but fully supportable by the low level
|
|
* implementations.<br>
|
|
* This driver model is best used where communication events are meant to
|
|
* drive an higher level state machine, as example:
|
|
* - RS485 drivers.
|
|
* - Multipoint network drivers.
|
|
* - Serial protocol decoders.
|
|
* .
|
|
* If your application requires a synchronoyus buffered driver then the
|
|
* @ref SERIAL should be used instead.
|
|
* @pre In order to use the ADC driver the @p CH_HAL_USE_UART option
|
|
* must be enabled in @p halconf.h.
|
|
*
|
|
* @section uart_1 Driver State Machine
|
|
* The driver implements a state machine internally, not all the driver
|
|
* functionalities can be used in any moment, any transition not explicitly
|
|
* shown in the following diagram has to be considered an error and shall
|
|
* be captured by an assertion (if enabled).
|
|
* @dot
|
|
digraph example {
|
|
rankdir="LR";
|
|
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
|
|
edge [fontname=Helvetica, fontsize=8];
|
|
|
|
uninit [label="UART_UNINIT", style="bold"];
|
|
stop [label="UART_STOP\nLow Power"];
|
|
ready [label="UART_READY\nClock Enabled"];
|
|
|
|
uninit -> stop [label="\nuartInit()"];
|
|
stop -> ready [label="\nuartStart()"];
|
|
ready -> ready [label="\nuartStart()"];
|
|
ready -> stop [label="\nuartStop()"];
|
|
stop -> stop [label="\nuartStop()"];
|
|
}
|
|
* @enddot
|
|
*
|
|
* @subsection uart_1_1 Transmitter sub State Machine
|
|
* The follow diagram describes the transmitter state machine, this diagram
|
|
* is valid while the driver is in the @p UART_READY state. This state
|
|
* machine is automatically reset to the @p TX_IDLE state each time the
|
|
* driver enters the @p UART_READY state.
|
|
* @dot
|
|
digraph example {
|
|
rankdir="LR";
|
|
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
|
|
edge [fontname=Helvetica, fontsize=8];
|
|
|
|
tx_idle [label="TX_IDLE", style="bold"];
|
|
tx_active [label="TX_ACTIVE"];
|
|
tx_complete [label="TX_COMPLETE"];
|
|
tx_fatal [label="Fatal Error", style="bold"];
|
|
|
|
tx_idle -> tx_active [label="\nuartStartSend()"];
|
|
tx_idle -> tx_idle [label="\nuartStopSend()\n>uc_txend2<"];
|
|
tx_active -> tx_complete [label="\nbuffer transmitted\n>uc_txend1<"];
|
|
tx_active -> tx_idle [label="\nuartStopSend()"];
|
|
tx_active -> tx_fatal [label="\nuartStartSend()"];
|
|
tx_complete -> tx_active [label="\nuartStartSendI()\nthen\ncallback return"];
|
|
tx_complete -> tx_idle [label="\ncallback return"];
|
|
}
|
|
* @enddot
|
|
*
|
|
* @subsection uart_1_2 Receiver sub State Machine
|
|
* The follow diagram describes the receiver state machine, this diagram
|
|
* is valid while the driver is in the @p UART_READY state. This state
|
|
* machine is automatically reset to the @p RX_IDLE state each time the
|
|
* driver enters the @p UART_READY state.
|
|
* @dot
|
|
digraph example {
|
|
rankdir="LR";
|
|
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
|
|
edge [fontname=Helvetica, fontsize=8];
|
|
|
|
rx_idle [label="RX_IDLE", style="bold"];
|
|
rx_active [label="RX_ACTIVE"];
|
|
rx_complete [label="RX_COMPLETE"];
|
|
rx_fatal [label="Fatal Error", style="bold"];
|
|
|
|
rx_idle -> rx_idle [label="\nuartStopReceive()\n>uc_rxchar<\n>uc_rxerr<"];
|
|
rx_idle -> rx_active [label="\nuartStartReceive()"];
|
|
|
|
rx_active -> rx_complete [label="\nbuffer filled\n>uc_rxend<"];
|
|
rx_active -> rx_idle [label="\nuartStopReceive()"];
|
|
rx_active -> rx_active [label="\nreceive error\n>uc_rxerr<"];
|
|
rx_active -> rx_fatal [label="\nuartStartReceive()"];
|
|
rx_complete -> rx_active [label="\nuartStartReceiveI()\nthen\ncallback return"];
|
|
rx_complete -> rx_idle [label="\ncallback return"];
|
|
}
|
|
* @enddot
|
|
*
|
|
* @ingroup IO
|
|
*/
|
|
|
|
/**
|
|
* @defgroup UART_LLD UART Low Level Driver
|
|
* @brief @ref UART low level driver template.
|
|
* @details This file is a template for a UART low level driver not an
|
|
* actual implementation. This template is only meant as documentation of
|
|
* a generic @ref UART_LLD entry points.
|
|
*
|
|
* @ingroup UART
|
|
*/
|