348 lines
11 KiB
C
348 lines
11 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file STM32/mac_lld.h
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* @brief STM32 low level MAC driver header.
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*
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* @addtogroup MAC
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* @{
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*/
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#ifndef _MAC_LLD_H_
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#define _MAC_LLD_H_
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#if HAL_USE_MAC || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/**
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* @name RDES0 constants
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* @{
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*/
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#define STM32_RDES0_OWN 0x80000000
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#define STM32_RDES0_AFM 0x40000000
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#define STM32_RDES0_FL_MASK 0x3FFF0000
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#define STM32_RDES0_ES 0x00008000
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#define STM32_RDES0_DESERR 0x00004000
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#define STM32_RDES0_SAF 0x00002000
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#define STM32_RDES0_LE 0x00001000
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#define STM32_RDES0_OE 0x00000800
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#define STM32_RDES0_VLAN 0x00000400
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#define STM32_RDES0_FS 0x00000200
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#define STM32_RDES0_LS 0x00000100
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#define STM32_RDES0_IPHCE 0x00000080
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#define STM32_RDES0_LCO 0x00000040
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#define STM32_RDES0_FT 0x00000020
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#define STM32_RDES0_RWT 0x00000010
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#define STM32_RDES0_RE 0x00000008
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#define STM32_RDES0_DE 0x00000004
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#define STM32_RDES0_CE 0x00000002
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#define STM32_RDES0_PCE 0x00000001
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/** @} */
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/**
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* @name RDES1 constants
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* @{
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*/
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#define STM32_RDES1_DIC 0x80000000
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#define STM32_RDES1_RBS2_MASK 0x1FFF0000
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#define STM32_RDES1_RER 0x00008000
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#define STM32_RDES1_RCH 0x00004000
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#define STM32_RDES1_RBS1_MASK 0x00001FFF
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/** @} */
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/**
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* @name TDES0 constants
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* @{
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*/
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#define STM32_TDES0_OWN 0x80000000
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#define STM32_TDES0_IC 0x40000000
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#define STM32_TDES0_LS 0x20000000
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#define STM32_TDES0_FS 0x10000000
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#define STM32_TDES0_DC 0x08000000
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#define STM32_TDES0_DP 0x04000000
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#define STM32_TDES0_TTSE 0x02000000
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#define STM32_TDES0_LOCKED 0x01000000 /* NOTE: Pseudo flag. */
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#define STM32_TDES0_CIC_MASK 0x00C00000
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#define STM32_TDES0_CIC(n) ((n) << 22)
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#define STM32_TDES0_TER 0x00200000
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#define STM32_TDES0_TCH 0x00100000
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#define STM32_TDES0_TTSS 0x00020000
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#define STM32_TDES0_IHE 0x00010000
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#define STM32_TDES0_ES 0x00008000
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#define STM32_TDES0_JT 0x00004000
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#define STM32_TDES0_FF 0x00002000
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#define STM32_TDES0_IPE 0x00001000
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#define STM32_TDES0_LCA 0x00000800
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#define STM32_TDES0_NC 0x00000400
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#define STM32_TDES0_LCO 0x00000200
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#define STM32_TDES0_EC 0x00000100
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#define STM32_TDES0_VF 0x00000080
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#define STM32_TDES0_CC_MASK 0x00000078
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#define STM32_TDES0_ED 0x00000004
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#define STM32_TDES0_UF 0x00000002
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#define STM32_TDES0_DB 0x00000001
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/** @} */
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/**
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* @name TDES1 constants
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* @{
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*/
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#define STM32_TDES1_TBS2_MASK 0x1FFF0000
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#define STM32_TDES1_TBS1_MASK 0x00001FFF
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/** @} */
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @name Configuration options
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* @{
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*/
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/**
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* @brief Number of available transmit buffers.
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*/
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#if !defined(STM32_MAC_TRANSMIT_BUFFERS) || defined(__DOXYGEN__)
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#define STM32_MAC_TRANSMIT_BUFFERS 2
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#endif
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/**
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* @brief Number of available receive buffers.
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*/
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#if !defined(STM32_MAC_RECEIVE_BUFFERS) || defined(__DOXYGEN__)
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#define STM32_MAC_RECEIVE_BUFFERS 4
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#endif
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/**
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* @brief Maximum supported frame size.
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*/
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#if !defined(STM32_MAC_BUFFERS_SIZE) || defined(__DOXYGEN__)
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#define STM32_MAC_BUFFERS_SIZE 1522
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#endif
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/**
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* @brief PHY detection timeout.
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* @details Timeout, in milliseconds, for PHY address detection, if a PHY
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* is not detected within the timeout then the driver halts during
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* initialization. This setting applies only if the PHY address is
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* not explicitly set in the board header file using
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* @p BOARD_PHY_ADDRESS. A zero value disables the timeout and a
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* single search path is performed.
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*/
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#if !defined(STM32_MAC_PHY_TIMEOUT) || defined(__DOXYGEN__)
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#define STM32_MAC_PHY_TIMEOUT 100
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#endif
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/**
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* @brief ETHD1 interrupt priority level setting.
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*/
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#if !defined(STM32_ETH1_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_ETH1_IRQ_PRIORITY 13
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#endif
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/**
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* @brief IP checksum offload.
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* @details The following modes are available:
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* - 0 Function disabled.
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* - 1 Only IP header checksum calculation and insertion are enabled.
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* - 2 IP header checksum and payload checksum calculation and
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* insertion are enabled, but pseudo-header checksum is not
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* calculated in hardware.
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* - 3 IP Header checksum and payload checksum calculation and
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* insertion are enabled, and pseudo-header checksum is
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* calculated in hardware.
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* .
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*/
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#if !defined(STM32_IP_CHECKSUM_OFFLOAD) || defined(__DOXYGEN__)
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#define STM32_IP_CHECKSUM_OFFLOAD 0
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#endif
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/** @} */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#if (STM32_MAC_PHY_TIMEOUT > 0) && !HAL_IMPLEMENTS_COUNTERS
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#error "STM32_MAC_PHY_TIMEOUT requires the realtime counter service"
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief Type of an STM32 Ethernet receive descriptor.
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*/
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typedef struct {
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volatile uint32_t rdes0;
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volatile uint32_t rdes1;
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volatile uint32_t rdes2;
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volatile uint32_t rdes3;
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} stm32_eth_rx_descriptor_t;
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/**
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* @brief Type of an STM32 Ethernet transmit descriptor.
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*/
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typedef struct {
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volatile uint32_t tdes0;
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volatile uint32_t tdes1;
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volatile uint32_t tdes2;
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volatile uint32_t tdes3;
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} stm32_eth_tx_descriptor_t;
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/**
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* @brief Driver configuration structure.
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*/
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typedef struct {
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/**
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* @brief MAC address.
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*/
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uint8_t *mac_address;
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/* End of the mandatory fields.*/
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} MACConfig;
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/**
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* @brief Structure representing a MAC driver.
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*/
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struct MACDriver {
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/**
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* @brief Driver state.
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*/
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macstate_t state;
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/**
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* @brief Current configuration data.
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*/
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const MACConfig *config;
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/**
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* @brief Transmit semaphore.
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*/
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Semaphore tdsem;
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/**
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* @brief Receive semaphore.
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*/
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Semaphore rdsem;
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#if MAC_USE_EVENTS || defined(__DOXYGEN__)
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/**
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* @brief Receive event.
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*/
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EventSource rdevent;
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#endif
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/* End of the mandatory fields.*/
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/**
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* @brief Link status flag.
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*/
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bool_t link_up;
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/**
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* @brief PHY address (pre shifted).
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*/
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uint32_t phyaddr;
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/**
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* @brief Receive next frame pointer.
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*/
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stm32_eth_rx_descriptor_t *rxptr;
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/**
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* @brief Transmit next frame pointer.
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*/
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stm32_eth_tx_descriptor_t *txptr;
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};
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/**
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* @brief Structure representing a transmit descriptor.
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*/
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typedef struct {
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/**
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* @brief Current write offset.
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*/
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size_t offset;
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/**
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* @brief Available space size.
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*/
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size_t size;
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/* End of the mandatory fields.*/
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/**
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* @brief Pointer to the physical descriptor.
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*/
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stm32_eth_tx_descriptor_t *physdesc;
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} MACTransmitDescriptor;
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/**
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* @brief Structure representing a receive descriptor.
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*/
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typedef struct {
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/**
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* @brief Current read offset.
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*/
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size_t offset;
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/**
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* @brief Available data size.
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*/
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size_t size;
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/* End of the mandatory fields.*/
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/**
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* @brief Pointer to the physical descriptor.
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*/
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stm32_eth_rx_descriptor_t *physdesc;
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} MACReceiveDescriptor;
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#if !defined(__DOXYGEN__)
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extern MACDriver ETHD1;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void mac_lld_init(void);
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void mac_lld_start(MACDriver *macp);
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void mac_lld_stop(MACDriver *macp);
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msg_t mac_lld_get_transmit_descriptor(MACDriver *macp,
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MACTransmitDescriptor *tdp);
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size_t mac_lld_write_transmit_descriptor(MACTransmitDescriptor *tdp,
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uint8_t *buf,
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size_t size);
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void mac_lld_release_transmit_descriptor(MACTransmitDescriptor *tdp);
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msg_t mac_lld_get_receive_descriptor(MACDriver *macp,
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MACReceiveDescriptor *rdp);
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size_t mac_lld_read_receive_descriptor(MACReceiveDescriptor *rdp,
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uint8_t *buf,
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size_t size);
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void mac_lld_release_receive_descriptor(MACReceiveDescriptor *rdp);
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bool_t mac_lld_poll_link_status(MACDriver *macp);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_MAC */
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#endif /* _MAC_LLD_H_ */
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/** @} */
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