94 lines
3.1 KiB
ArmAsm
94 lines
3.1 KiB
ArmAsm
/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012,2013 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file SPC56ELxx/bam.s
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* @brief SPC56ELxx boot assistant record.
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*
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* @addtogroup PPC_CORE
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* @{
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*/
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#if !defined(__DOXYGEN__)
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/* BAM info, SWT off, WTE off, VLE from settings.*/
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.section .bam, "ax"
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.long 0x015A0000
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.long .clear_ecc
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/* RAM clearing, this device requires a write to all RAM location in
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order to initialize the ECC detection hardware, this is going to
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slow down the startup but there is no way around.
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Note all registers are cleared in order to avoid possible problems
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with lockstep mode.*/
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.clear_ecc:
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xor %r0, %r0, %r0
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xor %r1, %r1, %r1
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xor %r2, %r2, %r2
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xor %r3, %r3, %r3
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xor %r4, %r4, %r4
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xor %r5, %r5, %r5
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xor %r6, %r6, %r6
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xor %r7, %r7, %r7
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xor %r8, %r8, %r8
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xor %r9, %r9, %r9
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xor %r10, %r10, %r10
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xor %r11, %r11, %r11
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xor %r12, %r12, %r12
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xor %r13, %r13, %r13
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xor %r14, %r14, %r14
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xor %r15, %r15, %r15
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xor %r16, %r16, %r16
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xor %r17, %r17, %r17
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xor %r18, %r18, %r18
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xor %r19, %r19, %r19
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xor %r20, %r20, %r20
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xor %r21, %r21, %r21
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xor %r22, %r22, %r22
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xor %r23, %r23, %r23
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xor %r24, %r24, %r24
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xor %r25, %r25, %r25
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xor %r26, %r26, %r26
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xor %r27, %r27, %r27
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xor %r28, %r28, %r28
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xor %r29, %r29, %r29
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xor %r30, %r30, %r30
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xor %r31, %r31, %r31
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lis %r4, __ram_start__@h
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ori %r4, %r4, __ram_start__@l
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lis %r5, __ram_end__@h
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ori %r5, %r5, __ram_end__@l
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.cleareccloop:
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cmpl cr0, %r4, %r5
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bge cr0, .cleareccend
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stmw %r16, 0(%r4)
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addi %r4, %r4, 64
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b .cleareccloop
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.cleareccend:
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/* HW configuration.*/
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bl _coreinit
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b _boot_address
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#endif /* !defined(__DOXYGEN__) */
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/** @} */
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