barthess 82d5cb36c3 F4x PLL clock checking fixed. According to RM0090 the value of PLLN may be between 64 and 432. ... git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4740 35acf78f-673a-0410-8e92-d51de3d6d3f4		2012-10-11 17:57:18 +00:00
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hal	F4x PLL clock checking fixed. According to RM0090 the value of PLLN may be between 64 and 432.	2012-10-11 17:57:18 +00:00
kernel	git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4734 35acf78f-673a-0410-8e92-d51de3d6d3f4	2012-10-03 19:49:01 +00:00
ports	git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4736 35acf78f-673a-0410-8e92-d51de3d6d3f4	2012-10-04 10:01:23 +00:00
various	Fixed bug 3571053.	2012-09-29 08:39:25 +00:00