275 lines
9.3 KiB
C
275 lines
9.3 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file STM32/adc_lld.h
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* @brief STM32 ADC subsystem low level driver header.
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*
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* @addtogroup STM32_ADC
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* @{
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*/
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#ifndef _ADC_LLD_H_
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#define _ADC_LLD_H_
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#if CH_HAL_USE_ADC || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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#define ADC_CR2_EXTSEL_SRC(n) ((n) << 17) /**< @brief Trigger source. */
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#define ADC_CR2_EXTSEL_SWSTART (7 << 17) /**< @brief Software trigger. */
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#define ADC_CHANNEL_IN0 0 /**< @brief External analog input 0. */
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#define ADC_CHANNEL_IN1 1 /**< @brief External analog input 1. */
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#define ADC_CHANNEL_IN2 2 /**< @brief External analog input 2. */
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#define ADC_CHANNEL_IN3 3 /**< @brief External analog input 3. */
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#define ADC_CHANNEL_IN4 4 /**< @brief External analog input 4. */
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#define ADC_CHANNEL_IN5 5 /**< @brief External analog input 5. */
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#define ADC_CHANNEL_IN6 6 /**< @brief External analog input 6. */
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#define ADC_CHANNEL_IN7 7 /**< @brief External analog input 7. */
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#define ADC_CHANNEL_IN8 8 /**< @brief External analog input 8. */
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#define ADC_CHANNEL_IN9 9 /**< @brief External analog input 9. */
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#define ADC_CHANNEL_IN10 10 /**< @brief External analog input 10. */
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#define ADC_CHANNEL_IN11 11 /**< @brief External analog input 11. */
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#define ADC_CHANNEL_IN12 12 /**< @brief External analog input 12. */
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#define ADC_CHANNEL_IN13 13 /**< @brief External analog input 13. */
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#define ADC_CHANNEL_IN14 14 /**< @brief External analog input 14. */
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#define ADC_CHANNEL_IN15 15 /**< @brief External analog input 15. */
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#define ADC_CHANNEL_SENSOR 16 /**< @brief Internal temperature sensor.*/
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#define ADC_CHANNEL_VREFINT 17 /**< @brief Internal reference. */
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @brief ADC1 driver enable switch.
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* @details If set to @p TRUE the support for ADC1 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(USE_STM32_ADC1) || defined(__DOXYGEN__)
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#define USE_STM32_ADC1 TRUE
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#endif
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/**
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* @brief ADC1 DMA priority (0..3|lowest..highest).
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*/
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#if !defined(STM32_ADC1_DMA_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_ADC1_DMA_PRIORITY 3
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#endif
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/**
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* @brief ADC1 interrupt priority level setting.
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*/
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#if !defined(STM32_ADC1_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_ADC1_IRQ_PRIORITY 5
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#endif
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/**
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* @brief ADC1 DMA error hook.
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* @note The default action for DMA errors is a system halt because DMA error
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* can only happen because programming errors.
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*/
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#if !defined(STM32_ADC1_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
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#define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt()
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#endif
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief ADC sample data type.
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*/
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typedef uint16_t adcsample_t;
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/**
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* @brief Channels number in a conversion group.
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*/
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typedef uint16_t adc_channels_num_t;
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/**
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* @brief ADC notification callback type.
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*
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* @param[in] buffer pointer to the most recent samples data
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* @param[in] n number of buffer rows available starting from @p buffer
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*/
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typedef void (*adccallback_t)(adcsample_t *buffer, size_t n);
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/**
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* @brief Conversion group configuration structure.
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* @details This implementation-dependent structure describes a conversion
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* operation.
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*/
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typedef struct {
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/**
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* @brief Enables the circular buffer mode for the group.
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*/
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bool_t acg_circular;
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/**
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* @brief Number of the analog channels belonging to the conversion group.
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*/
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adc_channels_num_t acg_num_channels;
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/* End of the mandatory fields.*/
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/**
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* @brief ADC CR1 register initialization data.
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* @note All the required bits must be defined into this field except
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* @p ADC_CR1_SCAN that is enforced inside the driver.
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*/
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uint32_t acg_cr1;
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/**
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* @brief ADC CR2 register initialization data.
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* @note All the required bits must be defined into this field except
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* @p ADC_CR2_DMA and @p ADC_CR2_ADON that are enforced inside the
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* driver.
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*/
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uint32_t acg_cr2;
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/**
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* @brief ADC SMPR1 register initialization data.
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*/
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uint32_t acg_smpr1;
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/**
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* @brief ADC SMPR2 register initialization data.
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*/
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uint32_t acg_smpr2;
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/**
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* @brief ADC SQR1 register initialization data.
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*/
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uint32_t acg_sqr1;
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/**
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* @brief ADC SQR2 register initialization data.
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*/
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uint32_t acg_sqr2;
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/**
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* @brief ADC SQR3 register initialization data.
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*/
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uint32_t acg_sqr3;
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} ADCConversionGroup;
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/**
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* @brief Driver configuration structure.
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* @note It could be empty on some architectures.
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*/
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typedef struct {
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} ADCConfig;
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/**
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* @brief Structure representing an ADC driver.
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*/
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typedef struct {
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/**
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* @brief Driver state.
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*/
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adcstate_t ad_state;
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/**
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* @brief Current configuration data.
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*/
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const ADCConfig *ad_config;
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/**
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* @brief Synchronization semaphore.
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*/
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Semaphore ad_sem;
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/**
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* @brief Current callback function or @p NULL.
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*/
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adccallback_t ad_callback;
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/**
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* @brief Current samples buffer pointer or @p NULL.
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*/
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adcsample_t *ad_samples;
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/**
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* @brief Current samples buffer depth or @p 0.
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*/
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size_t ad_depth;
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/**
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* @brief Current conversion group pointer or @p NULL.
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*/
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const ADCConversionGroup *ad_grpp;
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/* End of the mandatory fields.*/
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/**
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* @brief Pointer to the ADCx registers block.
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*/
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ADC_TypeDef *ad_adc;
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/**
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* @brief Pointer to the DMA channel registers block.
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*/
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DMA_Channel_TypeDef *ad_dma;
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/**
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* @brief DMA priority bit mask.
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*/
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uint32_t ad_dmaprio;
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} ADCDriver;
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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#define ADC_SQR1_NUM_CH(n) (((n) - 1) << 20)
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#define ADC_SQR3_SQ0_N(n) ((n) << 0)
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#define ADC_SQR3_SQ1_N(n) ((n) << 5)
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#define ADC_SQR3_SQ2_N(n) ((n) << 10)
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#define ADC_SQR3_SQ3_N(n) ((n) << 15)
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#define ADC_SQR3_SQ4_N(n) ((n) << 20)
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#define ADC_SQR3_SQ5_N(n) ((n) << 25)
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#define ADC_SQR2_SQ6_N(n) ((n) << 0)
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#define ADC_SQR2_SQ7_N(n) ((n) << 5)
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#define ADC_SQR2_SQ8_N(n) ((n) << 10)
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#define ADC_SQR2_SQ9_N(n) ((n) << 15)
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#define ADC_SQR2_SQ10_N(n) ((n) << 20)
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#define ADC_SQR2_SQ11_N(n) ((n) << 25)
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#define ADC_SQR1_SQ13_N(n) ((n) << 0)
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#define ADC_SQR1_SQ14_N(n) ((n) << 5)
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#define ADC_SQR1_SQ15_N(n) ((n) << 10)
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#define ADC_SQR1_SQ16_N(n) ((n) << 15)
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#if USE_STM32_ADC1 && !defined(__DOXYGEN__)
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extern ADCDriver ADCD1;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void adc_lld_init(void);
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void adc_lld_start(ADCDriver *adcp);
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void adc_lld_stop(ADCDriver *adcp);
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void adc_lld_start_conversion(ADCDriver *adcp);
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void adc_lld_stop_conversion(ADCDriver *adcp);
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#ifdef __cplusplus
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}
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#endif
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#endif /* CH_HAL_USE_ADC */
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#endif /* _ADC_LLD_H_ */
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/** @} */
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