89 lines
2.4 KiB
ArmAsm
89 lines
2.4 KiB
ArmAsm
/*
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ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* Generic ARM-CortexM3 startup file for ChibiOS/RT.
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*/
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.set CONTROL_MODE_PRIVILEGED, 0
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.set CONTROL_MODE_UNPRIVILEGED, 1
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.set CONTROL_USE_MSP, 0
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.set CONTROL_USE_PSP, 0
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.text
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.balign 2
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.syntax unified
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/*
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* Reset handler.
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*/
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.global ResetHandler
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ResetHandler:
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/*
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* Stack pointers initialization.
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*/
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ldr r0, =__ram_end__
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ldr r1, =__main_stack_size__
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sub r0, r0, r1
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msr PSP, r0
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// ldr r1, =__process_stack_size__
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// sub r0, r0, r1
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/*
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* Data initialization.
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* NOTE: It assumes that the DATA size is a multiple of 4.
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*/
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ldr r1, =_textdata
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ldr r2, =_data
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ldr r3, =_edata
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dloop:
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cmp r2, r3
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ittt lo
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ldrlo r0, [r1], #4
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strlo r0, [r2], #4
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blo dloop
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/*
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* BSS initialization.
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* NOTE: It assumes that the BSS size is a multiple of 4.
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*/
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mov r0, #0
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ldr r1, =_bss_start
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ldr r2, =_bss_end
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bloop:
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cmp r1, r2
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itt lo
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strlo r0, [r1], #4
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blo bloop
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/*
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* Switches to the Process Stack and disables the interrupts globally.
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*/
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mov r0, #CONTROL_MODE_PRIVILEGED | CONTROL_USE_PSP
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msr CONTROL, r0
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cpsid i
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/*
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* Application-provided HW initialization routine.
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*/
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bl hwinit
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/*
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* main(0, NULL).
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*/
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mov r0, #0
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mov r1, r0
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bl main
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bl chSysHalt
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