121 lines
4.0 KiB
C
121 lines
4.0 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _CHCORE_H_
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#define _CHCORE_H_
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#define CH_ARCHITECTURE_ARMCM3
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typedef void *regarm;
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/*
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* Interrupt saved context, empty in this architecture.
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*/
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struct extctx {
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};
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/*
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* System saved context.
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*/
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struct intctx {
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regarm basepri;
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regarm r4;
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regarm r5;
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regarm r6;
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#ifndef CH_CURRP_REGISTER_CACHE
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regarm r7;
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#endif
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regarm r8;
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regarm r9;
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regarm r10;
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regarm r11;
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regarm lr_exc;
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regarm r0;
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regarm r1;
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regarm r2;
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regarm r3;
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regarm r12;
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regarm lr_thd;
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regarm pc;
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regarm xpsr;
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};
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/*
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* Port dependent part of the Thread structure, you may add fields in
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* this structure.
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*/
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typedef struct {
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struct intctx *r13;
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} Context;
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/*
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* Platform dependent part of the \p chThdCreate() API.
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*/
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#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
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tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace + \
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wsize - \
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sizeof(struct intctx)); \
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tp->p_ctx.r13->basepri = 0; \
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tp->p_ctx.r13->lr_exc = (regarm)0xFFFFFFFD; \
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tp->p_ctx.r13->r0 = arg; \
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tp->p_ctx.r13->r1 = pf; \
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tp->p_ctx.r13->pc = threadstart; \
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tp->p_ctx.r13->xpsr = (regarm)0x01000000; \
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}
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#define chSysLock() { \
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register uint32_t tmp asm ("r3"); \
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asm volatile ("movs %0, #0x10" : "=r" (tmp): ); \
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asm volatile ("msr BASEPRI, %0" : : "r" (tmp)); \
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}
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#define chSysUnlock() { \
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register uint32_t tmp asm ("r3"); \
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asm volatile ("movs %0, #0" : "=r" (tmp): ); \
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asm volatile ("msr BASEPRI, %0" : : "r" (tmp)); \
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}
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#define chSysSwitchI(otp, ntp) { \
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register Thread *_otp asm ("r0") = (otp); \
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register Thread *_ntp asm ("r1") = (ntp); \
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asm volatile ("svc #0" : : "r" (_otp), "r" (_ntp)); \
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}
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#define INT_REQUIRED_STACK 0
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#define StackAlign(n) ((((n) - 1) | 3) + 1)
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#define UserStackSize(n) StackAlign(sizeof(Thread) + \
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sizeof(struct intctx) + \
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sizeof(struct extctx) + \
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(n) + \
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INT_REQUIRED_STACK)
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#define WorkingArea(s, n) uint32_t s[UserStackSize(n) >> 2];
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#define chSysIRQEnterI()
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#define chSysIRQExitI() { \
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SCB_ICSR = ICSR_PENDSVSET; \
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}
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/* It should be 8.*/
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#define IDLE_THREAD_STACK_SIZE 0
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void _IdleThread(void *p) __attribute__((noreturn));
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void chSysHalt(void);
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void chSysPuts(char *msg);
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void threadstart(void);
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#endif /* _CHCORE_H_ */
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