153 lines
4.5 KiB
C
153 lines
4.5 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <ch.h>
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#include <nvic.h>
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/*
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* System idle thread loop.
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*/
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__attribute__((weak))
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void _IdleThread(void *p) {
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while (TRUE) {
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// asm volatile ("wfi");
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}
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}
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/*
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* System console message (not implemented).
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*/
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__attribute__((weak))
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void chSysPuts(char *msg) {
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}
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/*
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* System halt.
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*/
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__attribute__((naked, weak))
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void chSysHalt(void) {
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asm volatile ("cpsid i");
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while (TRUE) {
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}
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}
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__attribute__((naked, weak))
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void threadstart(void) {
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asm volatile ( \
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"blx r1 \n\t" \
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"bl chThdExit \n\t" \
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"bl chSysHalt \n\t" \
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);
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}
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/*
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* System Timer vector.
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*/
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void SysTickVector(void) {
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chSysIRQEnterI();
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chSysLock();
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chSysTimerHandlerI();
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chSysUnlock();
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chSysIRQExitI();
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}
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void *retaddr;
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/*
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* System invoked context switch.
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*/
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__attribute__((naked))
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void SVCallVector(Thread *otp, Thread *ntp) {
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#ifdef CH_CURRP_REGISTER_CACHE
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asm volatile ("mrs r3, BASEPRI \n\t" \
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"mrs r12, PSP \n\t" \
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"stmdb r12!, {r3-r6,r8-r11, lr} \n\t" \
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"str r12, [r0, #16] \n\t" \
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"ldr r12, [r1, #16] \n\t" \
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"ldmia r12!, {r3-r6,r8-r11, lr} \n\t" \
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"msr PSP, r12 \n\t" \
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"msr BASEPRI, r3 \n\t" \
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"bx lr ");
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#else
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asm volatile ("mrs r3, BASEPRI \n\t" \
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"mrs r12, PSP \n\t" \
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"stmdb r12!, {r3-r11, lr} \n\t" \
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"str r12, [r0, #16] \n\t" \
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"ldr r12, [r1, #16] \n\t" \
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"ldmia r12!, {r3-r11, lr} \n\t" \
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"msr PSP, r12 \n\t" \
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"msr BASEPRI, r3 \n\t" \
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"bx lr ");
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#endif
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}
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/*
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* Preemption invoked context switch.
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*/
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__attribute__((naked))
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void PendSVVector(void) {
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Thread *otp;
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register struct intctx *sp_thd asm("r12");
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chSysLock();
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asm volatile ("push {lr}");
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if (!chSchRescRequiredI()) {
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chSysUnlock();
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asm volatile ("pop {pc}");
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}
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asm volatile ("pop {lr} \n\t" \
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"movs r3, #0 \n\t" \
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"mrs %0, PSP" : "=r" (sp_thd) : );
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#ifdef CH_CURRP_REGISTER_CACHE
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asm volatile ("stmdb %0!, {r3-r6,r8-r11, lr}" :
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"=r" (sp_thd) :
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"r" (sp_thd));
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#else
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asm volatile ("stmdb %0!, {r3-r11,lr}" :
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"=r" (sp_thd) :
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"r" (sp_thd));
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#endif
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(otp = currp)->p_ctx.r13 = sp_thd;
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chSchReadyI(otp);
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(currp = fifo_remove(&rlist.r_queue))->p_state = PRCURR;
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rlist.r_preempt = CH_TIME_QUANTUM;
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#ifdef CH_USE_TRACE
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chDbgTrace(otp, currp);
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#endif
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sp_thd = currp->p_ctx.r13;
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#ifdef CH_CURRP_REGISTER_CACHE
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asm volatile ("ldmia %0!, {r3-r6,r8-r11, lr}" : : "r" (sp_thd));
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#else
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asm volatile ("ldmia %0!, {r3-r11, lr}" : : "r" (sp_thd));
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#endif
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asm volatile ("msr PSP, %0 \n\t" \
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"msr BASEPRI, r3 \n\t" \
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"bx lr" : : "r" (sp_thd));
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}
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