252 lines
7.9 KiB
Plaintext
252 lines
7.9 KiB
Plaintext
/*
|
|
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
|
|
|
|
This file is part of ChibiOS/RT.
|
|
|
|
ChibiOS/RT is free software; you can redistribute it and/or modify
|
|
it under the terms of the GNU General Public License as published by
|
|
the Free Software Foundation; either version 3 of the License, or
|
|
(at your option) any later version.
|
|
|
|
ChibiOS/RT is distributed in the hope that it will be useful,
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
GNU General Public License for more details.
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
|
|
/**
|
|
* @defgroup STM32 STM32 Drivers
|
|
* @brief STM32 specific support.
|
|
*
|
|
* @ingroup platforms
|
|
*/
|
|
|
|
/**
|
|
* @defgroup STM32_HAL STM32 HAL Support
|
|
* @brief HAL support.
|
|
* @details The STM32 HAL support is responsible for system initialization.
|
|
*
|
|
* @section stm32_hal_1 Supported HW resources
|
|
* - PLL1.
|
|
* - PLL2.
|
|
* - RCC.
|
|
* - Flash.
|
|
* .
|
|
* @section stm32_hal_2 STM32 HAL driver implementation features
|
|
* - PLLs startup and stabilization.
|
|
* - Clock tree initialization.
|
|
* - Clock source selection.
|
|
* - Flash wait states initialization based on the selected clock options.
|
|
* - SYSTICK initialization based on current clock and kernel required rate.
|
|
* - DMA support initialization.
|
|
* .
|
|
* @ingroup STM32
|
|
*/
|
|
|
|
/**
|
|
* @defgroup STM32F103_HAL STM32F103 HAL Support
|
|
* @brief HAL support for STM32 LD, MD and HD families.
|
|
*
|
|
* @ingroup STM32_HAL
|
|
*/
|
|
|
|
/**
|
|
* @defgroup STM32F10X_CL_HAL STM32F105/F107 HAL Support
|
|
* @brief HAL support for STM32 CL (Connectivity Line) family.
|
|
*
|
|
* @ingroup STM32_HAL
|
|
*/
|
|
|
|
/**
|
|
* @defgroup STM32_PAL STM32 GPIO Support
|
|
* @brief GPIO peripherals support.
|
|
*
|
|
* @section stm32_pal_1 Supported HW resources
|
|
* - AFIO.
|
|
* - GPIOA.
|
|
* - GPIOB.
|
|
* - GPIOC.
|
|
* - GPIOD.
|
|
* - GPIOE.
|
|
* - GPIOF.
|
|
* - GPIOG.
|
|
* .
|
|
* @section stm32_pal_2 STM32 PAL driver implementation features
|
|
* The PAL driver implementation fully supports the following hardware
|
|
* capabilities:
|
|
* - 16 bits wide ports.
|
|
* - Atomic set/reset functions.
|
|
* - Atomic set+reset function (atomic bus operations).
|
|
* - Output latched regardless of the pad setting.
|
|
* - Direct read of input pads regardless of the pad setting.
|
|
* .
|
|
* @section stm32_pal_3 Supported PAL setup modes
|
|
* The STM32 PAL driver supports the following I/O modes:
|
|
* - @p PAL_MODE_RESET.
|
|
* - @p PAL_MODE_UNCONNECTED.
|
|
* - @p PAL_MODE_INPUT.
|
|
* - @p PAL_MODE_INPUT_PULLUP.
|
|
* - @p PAL_MODE_INPUT_PULLDOWN.
|
|
* - @p PAL_MODE_INPUT_ANALOG.
|
|
* - @p PAL_MODE_OUTPUT_PUSHPULL.
|
|
* - @p PAL_MODE_OUTPUT_OPENDRAIN.
|
|
* - @p PAL_MODE_STM32_ALTERNATE_PUSHPULL (non standard).
|
|
* - @p PAL_MODE_STM32_ALTERNATE_OPENDRAIN (non standard).
|
|
* .
|
|
* Any attempt to setup an invalid mode is ignored.
|
|
*
|
|
* @section stm32_pal_4 Suboptimal behavior
|
|
* The GPIO is less than optimal in several areas, the limitations should
|
|
* be taken in account while using the PAL driver:
|
|
* - Pad/port toggling operations are not atomic.
|
|
* - Pad/group mode setup is not atomic.
|
|
* - Writing on pads/groups/ports programmed as input with pull-up/down
|
|
* resistor can change the resistor setting because the output latch is
|
|
* used for resistor selection.
|
|
* .
|
|
* @ingroup STM32
|
|
*/
|
|
|
|
/**
|
|
* @defgroup STM32_SERIAL STM32 USART Support (buffered)
|
|
* @brief UART/USART peripherals support.
|
|
*
|
|
* @section stm32_serial_1 Supported HW resources
|
|
* The serial driver can support any of the following hardware resources:
|
|
* - USART1.
|
|
* - USART2.
|
|
* - USART3.
|
|
* - UART4.
|
|
* - UART5.
|
|
* .
|
|
* @section stm32_serial_2 STM32 Serial driver implementation features
|
|
* - Clock stop for reduced power usage when the driver is in stop state.
|
|
* - Each UART/USART can be independently enabled and programmed. Unused
|
|
* peripherals are left in low power mode.
|
|
* - Fully interrupt driven.
|
|
* - Programmable priority levels for each UART/USART.
|
|
* .
|
|
* @ingroup STM32
|
|
*/
|
|
|
|
/**
|
|
* @defgroup STM32_UART STM32 USART Support (unbuffered)
|
|
* @brief UART/USART peripherals support.
|
|
*
|
|
* @section stm32_uart_1 Supported HW resources
|
|
* The UART driver can support any of the following hardware resources:
|
|
* - USART1.
|
|
* - USART2.
|
|
* - USART3.
|
|
* .
|
|
* @section stm32_uart_2 STM32 UART driver implementation features
|
|
* - Clock stop for reduced power usage when the driver is in stop state.
|
|
* - Each UART/USART can be independently enabled and programmed. Unused
|
|
* peripherals are left in low power mode.
|
|
* - Programmable interrupt priority levels for each UART/USART.
|
|
* - DMA is used for receiving and transmitting.
|
|
* - Programmable DMA bus priority for each DMA channel.
|
|
* - Programmable DMA interrupt priority for each DMA channel.
|
|
* - Programmable DMA error hook for each DMA channel.
|
|
* .
|
|
* @ingroup STM32
|
|
*/
|
|
|
|
/**
|
|
* @defgroup STM32_DMA STM32 DMA Support
|
|
* @brief DMA helper driver.
|
|
*
|
|
* @section stm32_dma_1 Supported HW resources
|
|
* The DMA driver can support any of the following hardware resources:
|
|
* - DMA1.
|
|
* - DMA2.
|
|
* .
|
|
* @section stm32_dma_2 STM32 DMA driver implementation features
|
|
* - Automatic DMA clock stop when not in use by other drivers.
|
|
* - Exports helper functions/macros to the other drivers that share the
|
|
* DMA resource.
|
|
* .
|
|
* @ingroup STM32
|
|
*/
|
|
|
|
/**
|
|
* @defgroup STM32_ADC STM32 ADC Support
|
|
* @brief ADC peripherals support.
|
|
* @details The ADC driver supports the STM32 ADCs using DMA channels for
|
|
* improved performance.
|
|
*
|
|
* @section stm32_adc_1 Supported HW resources
|
|
* - ADC1.
|
|
* .
|
|
* @section stm32_adc_2 STM32 ADC driver implementation features
|
|
* - Clock stop for reduced power usage when the driver is in stop state.
|
|
* - Streaming conversion using DMA for maximum performance.
|
|
* - Programmable ADC interrupt priority level.
|
|
* - Programmable DMA bus priority for each DMA channel.
|
|
* - Programmable DMA interrupt priority for each DMA channel.
|
|
* - Programmable DMA error hook for each DMA channel.
|
|
* .
|
|
* @ingroup STM32
|
|
*/
|
|
|
|
/**
|
|
* @defgroup STM32_CAN STM32 CAN Support
|
|
* @brief CAN peripheral support.
|
|
*
|
|
* @section stm32_can_1 Supported HW resources
|
|
* - bxCAN1.
|
|
* .
|
|
* @section stm32_can_2 STM32 CAN driver implementation features
|
|
* - Clock stop for reduced power usage when the driver is in stop state.
|
|
* - Support for bxCAN sleep mode.
|
|
* - Programmable bxCAN interrupts priority level.
|
|
* .
|
|
* @ingroup STM32
|
|
*/
|
|
|
|
/**
|
|
* @defgroup STM32_PWM STM32 PWM Support
|
|
* @brief TIMx peripherals as PWM generators support.
|
|
*
|
|
* @section stm32_pwm_1 Supported HW resources
|
|
* - TIM1.
|
|
* - TIM2.
|
|
* - TIM3.
|
|
* - TIM4.
|
|
* .
|
|
* @section stm32_pwm_2 STM32 PWM driver implementation features
|
|
* - Each timer can be independently enabled and programmed. Unused
|
|
* peripherals are left in low power mode.
|
|
* - Four independent PWM channels per timer.
|
|
* - Programmable TIMx interrupts priority level.
|
|
* .
|
|
* @ingroup STM32
|
|
*/
|
|
|
|
/**
|
|
* @defgroup STM32_SPI STM32 SPI Support
|
|
* @brief SPI peripherals support.
|
|
* @details The SPI driver supports the STM32 SPIs using DMA channels for
|
|
* improved performance.
|
|
*
|
|
* @section stm32_spi_1 Supported HW resources
|
|
* - SPI1.
|
|
* - SPI2.
|
|
* - SPI3.
|
|
* .
|
|
* @section stm32_spi_2 STM32 SPI driver implementation features
|
|
* - Clock stop for reduced power usage when the driver is in stop state.
|
|
* - Each SPI can be independently enabled and programmed. Unused
|
|
* peripherals are left in low power mode.
|
|
* - Programmable interrupt priority levels for each SPI.
|
|
* - DMA is used for receiving and transmitting.
|
|
* - Programmable DMA bus priority for each DMA channel.
|
|
* - Programmable DMA interrupt priority for each DMA channel.
|
|
* - Programmable DMA error hook for each DMA channel.
|
|
* .
|
|
* @ingroup STM32
|
|
*/
|