96 lines
3.8 KiB
C
96 lines
3.8 KiB
C
/*
|
|
SPC5 HAL - Copyright (C) 2013 STMicroelectronics
|
|
|
|
Licensed under the Apache License, Version 2.0 (the "License");
|
|
you may not use this file except in compliance with the License.
|
|
You may obtain a copy of the License at
|
|
|
|
http://www.apache.org/licenses/LICENSE-2.0
|
|
|
|
Unless required by applicable law or agreed to in writing, software
|
|
distributed under the License is distributed on an "AS IS" BASIS,
|
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
See the License for the specific language governing permissions and
|
|
limitations under the License.
|
|
*/
|
|
|
|
/**
|
|
* @file SPC560BCxx/spc560bc_registry.h
|
|
* @brief SPC560B/Cxx capabilities registry.
|
|
*
|
|
* @addtogroup HAL
|
|
* @{
|
|
*/
|
|
|
|
#ifndef _SPC560BC_REGISTRY_H_
|
|
#define _SPC560BC_REGISTRY_H_
|
|
|
|
/*===========================================================================*/
|
|
/* Platform capabilities. */
|
|
/*===========================================================================*/
|
|
|
|
/**
|
|
* @name SPC560B/Cxx capabilities
|
|
* @{
|
|
*/
|
|
/* eDMA attributes.*/
|
|
#define SPC5_HAS_EDMA FALSE
|
|
|
|
/* LINFlex attributes.*/
|
|
#define SPC5_HAS_LINFLEX0 TRUE
|
|
#define SPC5_LINFLEX0_PCTL 48
|
|
#define SPC5_LINFLEX0_RXI_HANDLER vector79
|
|
#define SPC5_LINFLEX0_TXI_HANDLER vector80
|
|
#define SPC5_LINFLEX0_ERR_HANDLER vector81
|
|
#define SPC5_LINFLEX0_RXI_NUMBER 79
|
|
#define SPC5_LINFLEX0_TXI_NUMBER 80
|
|
#define SPC5_LINFLEX0_ERR_NUMBER 81
|
|
#define SPC5_LINFLEX0_CLK (halSPCGetSystemClock() / \
|
|
SPC5_PERIPHERAL1_CLK_DIV_VALUE)
|
|
|
|
#define SPC5_HAS_LINFLEX1 TRUE
|
|
#define SPC5_LINFLEX1_PCTL 49
|
|
#define SPC5_LINFLEX1_RXI_HANDLER vector99
|
|
#define SPC5_LINFLEX1_TXI_HANDLER vector100
|
|
#define SPC5_LINFLEX1_ERR_HANDLER vector101
|
|
#define SPC5_LINFLEX1_RXI_NUMBER 99
|
|
#define SPC5_LINFLEX1_TXI_NUMBER 100
|
|
#define SPC5_LINFLEX1_ERR_NUMBER 101
|
|
#define SPC5_LINFLEX1_CLK (halSPCGetSystemClock() / \
|
|
SPC5_PERIPHERAL1_CLK_DIV_VALUE)
|
|
|
|
#define SPC5_HAS_LINFLEX2 TRUE
|
|
#define SPC5_LINFLEX2_PCTL 50
|
|
#define SPC5_LINFLEX2_RXI_HANDLER vector119
|
|
#define SPC5_LINFLEX2_TXI_HANDLER vector120
|
|
#define SPC5_LINFLEX2_ERR_HANDLER vector121
|
|
#define SPC5_LINFLEX2_RXI_NUMBER 119
|
|
#define SPC5_LINFLEX2_TXI_NUMBER 120
|
|
#define SPC5_LINFLEX2_ERR_NUMBER 121
|
|
#define SPC5_LINFLEX2_CLK (halSPCGetSystemClock() / \
|
|
SPC5_PERIPHERAL1_CLK_DIV_VALUE)
|
|
|
|
#define SPC5_HAS_LINFLEX3 TRUE
|
|
#define SPC5_LINFLEX3_PCTL 51
|
|
#define SPC5_LINFLEX3_RXI_HANDLER vector122
|
|
#define SPC5_LINFLEX3_TXI_HANDLER vector123
|
|
#define SPC5_LINFLEX3_ERR_HANDLER vector124
|
|
#define SPC5_LINFLEX3_RXI_NUMBER 122
|
|
#define SPC5_LINFLEX3_TXI_NUMBER 123
|
|
#define SPC5_LINFLEX3_ERR_NUMBER 124
|
|
#define SPC5_LINFLEX3_CLK (halSPCGetSystemClock() / \
|
|
SPC5_PERIPHERAL1_CLK_DIV_VALUE)
|
|
|
|
/* SIUL attributes.*/
|
|
#define SPC5_HAS_SIUL TRUE
|
|
#define SPC5_SIUL_PCTL 68
|
|
#define SPC5_SIUL_NUM_PORTS 8
|
|
#define SPC5_SIUL_NUM_PCRS 123
|
|
#define SPC5_SIUL_NUM_PADSELS 32
|
|
#define SPC5_SIUL_SYSTEM_PINS 32,33,121,122
|
|
/** @} */
|
|
|
|
#endif /* _SPC560BC_REGISTRY_H_ */
|
|
|
|
/** @} */
|