141 lines
4.8 KiB
Plaintext
141 lines
4.8 KiB
Plaintext
/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012,2013 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @defgroup LPC11xx LPC11xx Drivers
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* @details This section describes all the supported drivers on the LPC11xx
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* platform and the implementation details of the single drivers.
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*
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* @ingroup platforms
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*/
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/**
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* @defgroup LPC11xx_HAL LPC11xx Initialization Support
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* @details The LPC11xx HAL support is responsible for system initialization.
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*
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* @section lpc11xx_hal_1 Supported HW resources
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* - SYSCON.
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* - Flash.
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* .
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* @section lpc11xx_hal_2 LPC11xx HAL driver implementation features
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* - Clock tree initialization.
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* - Clock source selection.
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* - Flash controller initialization.
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* - SYSTICK initialization based on current clock and kernel required rate.
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* .
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* @ingroup LPC11xx
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*/
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/**
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* @defgroup LPC11xx_GPT LPC11xx GPT Support
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* @details The LPC11xx GPT driver uses the CTxxBy peripherals.
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*
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* @section lpc11xx_gpt_1 Supported HW resources
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* - CT16B0.
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* - CT16B1.
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* - CT32B0.
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* - CT32B1.
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* .
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* @section lpc11xx_gpt_2 LPC11xx GPT driver implementation features
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* - Each timer can be independently enabled and programmed. Unused
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* peripherals are left in low power mode.
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* - Programmable CTxxBy interrupts priority level.
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* .
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* @ingroup LPC11xx
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*/
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/**
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* @defgroup LPC11xx_PAL LPC11xx PAL Support
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* @details The LPC11xx PAL driver uses the GPIO peripherals.
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*
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* @section lpc11xx_pal_1 Supported HW resources
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* - GPIO0.
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* - GPIO1.
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* - GPIO2.
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* - GPIO3.
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* .
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* @section lpc11xx_pal_2 LPC11xx PAL driver implementation features
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* - 12 bits wide ports.
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* - Atomic set/reset functions.
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* - Atomic set+reset function (atomic bus operations).
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* - Output latched regardless of the pad setting.
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* - Direct read of input pads regardless of the pad setting.
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* .
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* @section lpc11xx_pal_3 Supported PAL setup modes
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* - @p PAL_MODE_RESET.
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* - @p PAL_MODE_UNCONNECTED.
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* - @p PAL_MODE_INPUT.
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* - @p PAL_MODE_OUTPUT_PUSHPULL.
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* .
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* Any attempt to setup an invalid mode is ignored.
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*
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* @section lpc11xx_pal_4 Suboptimal behavior
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* Some GPIO features are less than optimal:
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* - Pad/port toggling operations are not atomic.
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* - Pull-up and Pull-down resistors cannot be programmed through the PAL
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* driver and must be programmed separately using the IOCON peripheral.
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* - Reading of the output latch for pads programmed as input is not possible,
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* the input pin value is returned instead.
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* .
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* @ingroup LPC11xx
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*/
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/**
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* @defgroup LPC11xx_SERIAL LPC11xx Serial Support
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* @details The LPC11xx Serial driver uses the UART peripheral in a
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* buffered, interrupt driven, implementation. The serial driver
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* also takes advantage of the LPC11xx UARTs deep hardware buffers.
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*
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* @section lpc11xx_serial_1 Supported HW resources
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* The serial driver can support any of the following hardware resources:
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* - UART.
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* .
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* @section lpc11xx_serial_2 LPC11xx Serial driver implementation features
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* - Clock stop for reduced power usage when the driver is in stop state.
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* - Fully interrupt driven.
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* - Programmable priority level.
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* - Takes advantage of the input and output FIFOs.
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* .
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* @ingroup LPC11xx
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*/
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/**
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* @defgroup LPC11xx_SPI LPC11xx SPI Support
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* @details The SPI driver supports the LPC11xx SSP peripherals in an interrupt
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* driven implementation.
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* @note Being the SPI a fast peripheral, much care must be taken to
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* not saturate the CPU bandwidth with an excessive IRQ rate. The
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* maximum transfer bit rate is likely limited by the IRQ
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* handling.
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*
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* @section lpc11xx_spi_1 Supported HW resources
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* - SSP0.
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* - SSP1 (where present).
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* .
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* @section lpc11xx_spi_2 LPC11xx SPI driver implementation features
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* - Clock stop for reduced power usage when the driver is in stop state.
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* - Each SSP can be independently enabled and programmed. Unused
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* peripherals are left in low power mode.
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* - Fully interrupt driven.
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* - Programmable interrupt priority levels for each SSP.
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* .
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* @ingroup LPC11xx
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*/
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