250 lines
8.9 KiB
C
250 lines
8.9 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file STM32/serial_lld.h
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* @brief STM32 low level serial driver header.
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* @addtogroup STM32_SERIAL
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* @{
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*/
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#ifndef _SERIAL_LLD_H_
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#define _SERIAL_LLD_H_
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#if CH_HAL_USE_SERIAL || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @brief USART1 driver enable switch.
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* @details If set to @p TRUE the support for USART1 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(USE_STM32_USART1) || defined(__DOXYGEN__)
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#define USE_STM32_USART1 TRUE
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#endif
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/**
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* @brief USART2 driver enable switch.
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* @details If set to @p TRUE the support for USART2 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(USE_STM32_USART2) || defined(__DOXYGEN__)
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#define USE_STM32_USART2 TRUE
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#endif
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/**
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* @brief USART3 driver enable switch.
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* @details If set to @p TRUE the support for USART3 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(USE_STM32_USART3) || defined(__DOXYGEN__)
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#define USE_STM32_USART3 TRUE
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#endif
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#if defined(STM32F10X_HD) || defined(STM32F10X_CL) || defined(__DOXYGEN__)
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/**
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* @brief UART4 driver enable switch.
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* @details If set to @p TRUE the support for UART4 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(USE_STM32_UART4) || defined(__DOXYGEN__)
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#define USE_STM32_UART4 TRUE
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#endif
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/**
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* @brief UART5 driver enable switch.
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* @details If set to @p TRUE the support for UART5 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(USE_STM32_USART3) || defined(__DOXYGEN__)
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#define USE_STM32_UART5 TRUE
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#endif
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#endif
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/**
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* @brief USART1 interrupt priority level setting.
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* @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_USART1_PRIORITY >
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* @p CORTEX_PRIORITY_PENDSV.
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*/
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#if !defined(STM32_USART1_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_USART1_PRIORITY CORTEX_PRIORITY(12)
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#endif
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/**
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* @brief USART2 interrupt priority level setting.
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* @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_USART2_PRIORITY >
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* @p CORTEX_PRIORITY_PENDSV.
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*/
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#if !defined(STM32_USART2_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_USART2_PRIORITY CORTEX_PRIORITY(12)
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#endif
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/**
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* @brief USART3 interrupt priority level setting.
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* @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_USART3_PRIORITY >
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* @p CORTEX_PRIORITY_PENDSV.
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*/
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#if !defined(STM32_USART3_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_USART3_PRIORITY CORTEX_PRIORITY(12)
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#endif
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#if defined(STM32F10X_HD) || defined(STM32F10X_CL) || defined(__DOXYGEN__)
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/**
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* @brief UART4 interrupt priority level setting.
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* @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_USART2_PRIORITY >
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* @p CORTEX_PRIORITY_PENDSV.
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*/
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#if !defined(STM32_UART4_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_UART4_PRIORITY CORTEX_PRIORITY(12)
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#endif
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/**
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* @brief UART5 interrupt priority level setting.
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* @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_USART2_PRIORITY >
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* @p CORTEX_PRIORITY_PENDSV.
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*/
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#if !defined(STM32_UART5_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_UART5_PRIORITY CORTEX_PRIORITY(12)
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#endif
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#endif
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief Serial Driver condition flags type.
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*/
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typedef uint32_t sdflags_t;
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/**
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* @brief STM32 Serial Driver configuration structure.
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* @details An instance of this structure must be passed to @p sdStart()
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* in order to configure and start a serial driver operations.
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*
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* @note This structure content is architecture dependent, each driver
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* implementation defines its own version and the custom static
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* initializers.
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*/
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typedef struct {
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/**
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* @brief Bit rate.
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*/
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uint32_t sc_speed;
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/**
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* @brief Initialization value for the CR1 register.
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*/
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uint16_t sc_cr1;
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/**
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* @brief Initialization value for the CR2 register.
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*/
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uint16_t sc_cr2;
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/**
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* @brief Initialization value for the CR3 register.
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*/
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uint16_t sc_cr3;
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} SerialConfig;
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/**
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* @brief @p SerialDriver specific data.
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*/
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#define _serial_driver_data \
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_base_asynchronous_channel_data \
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/* Driver state.*/ \
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sdstate_t state; \
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/* Current configuration data.*/ \
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const SerialConfig *config; \
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/* Input queue.*/ \
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InputQueue iqueue; \
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/* Output queue.*/ \
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OutputQueue oqueue; \
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/* Status Change @p EventSource.*/ \
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EventSource sevent; \
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/* I/O driver status flags.*/ \
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sdflags_t flags; \
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/* Input circular buffer.*/ \
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uint8_t ib[SERIAL_BUFFERS_SIZE]; \
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/* Output circular buffer.*/ \
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uint8_t ob[SERIAL_BUFFERS_SIZE]; \
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/* End of the mandatory fields.*/ \
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/* Pointer to the USART registers block.*/ \
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USART_TypeDef *usart;
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*
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* Extra USARTs definitions here (missing from the ST header file).
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*/
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#define USART_CR2_STOP1_BITS (0 << 12) /**< @brief CR2 1 stop bit value.*/
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#define USART_CR2_STOP0P5_BITS (1 << 12) /**< @brief CR2 0.5 stop bit value.*/
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#define USART_CR2_STOP2_BITS (2 << 12) /**< @brief CR2 2 stop bit value.*/
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#define USART_CR2_STOP1P5_BITS (3 << 12) /**< @brief CR2 1.5 stop bit value.*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#if USE_STM32_USART1 && !defined(__DOXYGEN__)
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extern SerialDriver SD1;
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#endif
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#if USE_STM32_USART2 && !defined(__DOXYGEN__)
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extern SerialDriver SD2;
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#endif
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#if USE_STM32_USART3 && !defined(__DOXYGEN__)
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extern SerialDriver SD3;
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#endif
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#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
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#if USE_STM32_UART4 && !defined(__DOXYGEN__)
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extern SerialDriver SD4;
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#endif
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#if USE_STM32_UART5 && !defined(__DOXYGEN__)
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extern SerialDriver SD5;
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#endif
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void sd_lld_init(void);
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void sd_lld_start(SerialDriver *sdp);
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void sd_lld_stop(SerialDriver *sdp);
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#ifdef __cplusplus
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}
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#endif
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#endif /* CH_HAL_USE_SERIAL */
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#endif /* _SERIAL_LLD_H_ */
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/** @} */
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