886 lines
27 KiB
C
886 lines
27 KiB
C
/*
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ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file STM32/SDMMCv1/sdc_lld.c
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* @brief STM32 SDC subsystem low level driver source.
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*
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* @addtogroup SDC
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* @{
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*/
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#include <string.h>
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#include "hal.h"
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#if HAL_USE_SDC || defined(__DOXYGEN__)
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#if !defined(STM32_SDMMCCLK)
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#error "STM32_SDMMCCLK not defined"
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#endif
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#if STM32_SDMMCCLK > 48000000
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#error "STM32_SDMMCCLK exceeding 48MHz"
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#endif
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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#define SDMMC_ICR_ALL_FLAGS \
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(SDMMC_ICR_CCRCFAILC | SDMMC_ICR_DCRCFAILC | \
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SDMMC_ICR_CTIMEOUTC | SDMMC_ICR_DTIMEOUTC | \
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SDMMC_ICR_TXUNDERRC | SDMMC_ICR_RXOVERRC | \
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SDMMC_ICR_CMDRENDC | SDMMC_ICR_CMDSENTC | \
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SDMMC_ICR_DATAENDC | SDMMC_ICR_DBCKENDC | \
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SDMMC_ICR_SDIOITC)
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#define SDMMC_STA_ERROR_MASK \
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(SDMMC_STA_CCRCFAIL | SDMMC_STA_DCRCFAIL | \
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SDMMC_STA_CTIMEOUT | SDMMC_STA_DTIMEOUT | \
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SDMMC_STA_TXUNDERR | SDMMC_STA_RXOVERR)
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#define SDMMC_CLKDIV_HS (2 - 2)
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#define SDMMC_CLKDIV_LS (120 - 2)
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#define SDMMC_WRITE_TIMEOUT \
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(((STM32_SDMMCCLK / (SDMMC_CLKDIV_HS + 2)) / 1000) * \
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STM32_SDC_SDMMC_WRITE_TIMEOUT)
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#define SDMMC_READ_TIMEOUT \
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(((STM32_SDMMCCLK / (SDMMC_CLKDIV_HS + 2)) / 1000) * \
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STM32_SDC_SDMMC_READ_TIMEOUT)
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#define DMA_CHANNEL \
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STM32_DMA_GETCHANNEL(STM32_SDC_SDMMC1_DMA_STREAM, \
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STM32_SDC_SDMMC1_DMA_CHN)
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/** @brief SDCD1 driver identifier.*/
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SDCDriver SDCD1;
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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#if STM32_SDC_SDMMC_UNALIGNED_SUPPORT
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/**
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* @brief Buffer for temporary storage during unaligned transfers.
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*/
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static union {
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uint32_t alignment;
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uint8_t buf[MMCSD_BLOCK_SIZE];
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} u;
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#endif /* STM32_SDC_SDMMC_UNALIGNED_SUPPORT */
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/**
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* @brief SDIO default configuration.
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*/
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static const SDCConfig sdc_default_cfg = {
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NULL,
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SDC_MODE_4BIT
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};
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/**
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* @brief Prepares to handle read transaction.
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* @details Designed for read special registers from card.
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*
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* @param[in] sdcp pointer to the @p SDCDriver object
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* @param[out] buf pointer to the read buffer
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* @param[in] bytes number of bytes to read
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*
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* @return The operation status.
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* @retval HAL_SUCCESS operation succeeded.
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* @retval HAL_FAILED operation failed.
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*
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* @notapi
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*/
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static bool sdc_lld_prepare_read_bytes(SDCDriver *sdcp,
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uint8_t *buf, uint32_t bytes) {
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osalDbgCheck(bytes < 0x1000000);
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sdcp->sdmmc->DTIMER = SDMMC_READ_TIMEOUT;
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/* Checks for errors and waits for the card to be ready for reading.*/
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if (_sdc_wait_for_transfer_state(sdcp))
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return HAL_FAILED;
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/* Prepares the DMA channel for writing.*/
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dmaStreamSetMemory0(sdcp->dma, buf);
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dmaStreamSetTransactionSize(sdcp->dma, bytes / sizeof (uint32_t));
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dmaStreamSetMode(sdcp->dma, sdcp->dmamode | STM32_DMA_CR_DIR_P2M);
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dmaStreamEnable(sdcp->dma);
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/* Setting up data transfer.*/
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sdcp->sdmmc->ICR = SDMMC_ICR_ALL_FLAGS;
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sdcp->sdmmc->MASK = SDMMC_MASK_DCRCFAILIE |
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SDMMC_MASK_DTIMEOUTIE |
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SDMMC_MASK_RXOVERRIE |
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SDMMC_MASK_DATAENDIE;
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sdcp->sdmmc->DLEN = bytes;
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/* Transaction starts just after DTEN bit setting.*/
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sdcp->sdmmc->DCTRL = SDMMC_DCTRL_DTDIR |
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SDMMC_DCTRL_DTMODE | /* multibyte data transfer */
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SDMMC_DCTRL_DMAEN |
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SDMMC_DCTRL_DTEN;
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return HAL_SUCCESS;
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}
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/**
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* @brief Prepares card to handle read transaction.
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*
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* @param[in] sdcp pointer to the @p SDCDriver object
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* @param[in] startblk first block to read
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* @param[in] n number of blocks to read
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* @param[in] resp pointer to the response buffer
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*
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* @return The operation status.
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* @retval HAL_SUCCESS operation succeeded.
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* @retval HAL_FAILED operation failed.
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*
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* @notapi
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*/
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static bool sdc_lld_prepare_read(SDCDriver *sdcp, uint32_t startblk,
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uint32_t n, uint32_t *resp) {
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/* Driver handles data in 512 bytes blocks (just like HC cards). But if we
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have not HC card than we must convert address from blocks to bytes.*/
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if (!(sdcp->cardmode & SDC_MODE_HIGH_CAPACITY))
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startblk *= MMCSD_BLOCK_SIZE;
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if (n > 1) {
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/* Send read multiple blocks command to card.*/
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if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_READ_MULTIPLE_BLOCK,
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startblk, resp) || MMCSD_R1_ERROR(resp[0]))
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return HAL_FAILED;
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}
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else{
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/* Send read single block command.*/
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if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_READ_SINGLE_BLOCK,
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startblk, resp) || MMCSD_R1_ERROR(resp[0]))
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return HAL_FAILED;
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}
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return HAL_SUCCESS;
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}
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/**
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* @brief Prepares card to handle write transaction.
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*
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* @param[in] sdcp pointer to the @p SDCDriver object
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* @param[in] startblk first block to read
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* @param[in] n number of blocks to write
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* @param[in] resp pointer to the response buffer
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*
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* @return The operation status.
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* @retval HAL_SUCCESS operation succeeded.
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* @retval HAL_FAILED operation failed.
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*
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* @notapi
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*/
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static bool sdc_lld_prepare_write(SDCDriver *sdcp, uint32_t startblk,
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uint32_t n, uint32_t *resp) {
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/* Driver handles data in 512 bytes blocks (just like HC cards). But if we
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have not HC card than we must convert address from blocks to bytes.*/
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if (!(sdcp->cardmode & SDC_MODE_HIGH_CAPACITY))
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startblk *= MMCSD_BLOCK_SIZE;
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if (n > 1) {
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/* Write multiple blocks command.*/
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if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_WRITE_MULTIPLE_BLOCK,
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startblk, resp) || MMCSD_R1_ERROR(resp[0]))
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return HAL_FAILED;
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}
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else{
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/* Write single block command.*/
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if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_WRITE_BLOCK,
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startblk, resp) || MMCSD_R1_ERROR(resp[0]))
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return HAL_FAILED;
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}
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return HAL_SUCCESS;
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}
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/**
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* @brief Wait end of data transaction and performs finalizations.
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*
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* @param[in] sdcp pointer to the @p SDCDriver object
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* @param[in] n number of blocks in transaction
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* @param[in] resp pointer to the response buffer
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*
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* @return The operation status.
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* @retval HAL_SUCCESS operation succeeded.
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* @retval HAL_FAILED operation failed.
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*/
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static bool sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n,
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uint32_t *resp) {
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/* Note the mask is checked before going to sleep because the interrupt
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may have occurred before reaching the critical zone.*/
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osalSysLock();
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if (sdcp->sdmmc->MASK != 0)
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osalThreadSuspendS(&sdcp->thread);
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if ((sdcp->sdmmc->STA & SDMMC_STA_DATAEND) == 0) {
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osalSysUnlock();
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return HAL_FAILED;
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}
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/* Waits for transfer completion at DMA level, then the stream is
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disabled and cleared.*/
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dmaWaitCompletion(sdcp->dma);
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sdcp->sdmmc->ICR = SDMMC_ICR_ALL_FLAGS;
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sdcp->sdmmc->DCTRL = 0;
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osalSysUnlock();
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/* Finalize transaction.*/
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if (n > 1)
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return sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_STOP_TRANSMISSION, 0, resp);
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return HAL_SUCCESS;
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}
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/**
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* @brief Gets SDC errors.
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*
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* @param[in] sdcp pointer to the @p SDCDriver object
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* @param[in] sta value of the STA register
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*
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* @notapi
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*/
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static void sdc_lld_collect_errors(SDCDriver *sdcp, uint32_t sta) {
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uint32_t errors = SDC_NO_ERROR;
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if (sta & SDMMC_STA_CCRCFAIL)
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errors |= SDC_CMD_CRC_ERROR;
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if (sta & SDMMC_STA_DCRCFAIL)
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errors |= SDC_DATA_CRC_ERROR;
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if (sta & SDMMC_STA_CTIMEOUT)
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errors |= SDC_COMMAND_TIMEOUT;
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if (sta & SDMMC_STA_DTIMEOUT)
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errors |= SDC_DATA_TIMEOUT;
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if (sta & SDMMC_STA_TXUNDERR)
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errors |= SDC_TX_UNDERRUN;
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if (sta & SDMMC_STA_RXOVERR)
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errors |= SDC_RX_OVERRUN;
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/* if (sta & SDMMC_STA_STBITERR)
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errors |= SDC_STARTBIT_ERROR;*/
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sdcp->errors |= errors;
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}
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/**
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* @brief Performs clean transaction stopping in case of errors.
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*
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* @param[in] sdcp pointer to the @p SDCDriver object
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* @param[in] n number of blocks in transaction
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* @param[in] resp pointer to the response buffer
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*
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* @notapi
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*/
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static void sdc_lld_error_cleanup(SDCDriver *sdcp,
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uint32_t n,
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uint32_t *resp) {
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uint32_t sta = sdcp->sdmmc->STA;
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dmaStreamDisable(sdcp->dma);
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sdcp->sdmmc->ICR = SDMMC_ICR_ALL_FLAGS;
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sdcp->sdmmc->MASK = 0;
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sdcp->sdmmc->DCTRL = 0;
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sdc_lld_collect_errors(sdcp, sta);
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if (n > 1)
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sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_STOP_TRANSMISSION, 0, resp);
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}
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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#if !defined(STM32_SDMMC1_HANDLER)
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#error "STM32_SDMMC1_HANDLER not defined"
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#endif
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/**
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* @brief SDIO IRQ handler.
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* @details It just wakes transaction thread. All error handling performs in
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* that thread.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(STM32_SDMMC1_HANDLER) {
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OSAL_IRQ_PROLOGUE();
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osalSysLockFromISR();
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/* Disables the source but the status flags are not reset because the
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read/write functions needs to check them.*/
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SDMMC1->MASK = 0;
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osalThreadResumeI(&SDCD1.thread, MSG_OK);
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osalSysUnlockFromISR();
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OSAL_IRQ_EPILOGUE();
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}
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Low level SDC driver initialization.
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*
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* @notapi
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*/
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void sdc_lld_init(void) {
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sdcObjectInit(&SDCD1);
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SDCD1.thread = NULL;
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SDCD1.dma = STM32_DMA_STREAM(STM32_SDC_SDMMC1_DMA_STREAM);
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SDCD1.sdmmc = SDMMC1;
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}
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/**
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* @brief Configures and activates the SDC peripheral.
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*
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* @param[in] sdcp pointer to the @p SDCDriver object
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*
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* @notapi
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*/
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void sdc_lld_start(SDCDriver *sdcp) {
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/* Checking configuration, using a default if NULL has been passed.*/
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if (sdcp->config == NULL) {
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sdcp->config = &sdc_default_cfg;
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}
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sdcp->dmamode = STM32_DMA_CR_CHSEL(DMA_CHANNEL) |
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STM32_DMA_CR_PL(STM32_SDC_SDMMC1_DMA_PRIORITY) |
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STM32_DMA_CR_PSIZE_WORD |
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STM32_DMA_CR_MSIZE_WORD |
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STM32_DMA_CR_MINC;
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#if STM32_DMA_ADVANCED
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sdcp->dmamode |= STM32_DMA_CR_PFCTRL |
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STM32_DMA_CR_PBURST_INCR4 |
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STM32_DMA_CR_MBURST_INCR4;
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#endif
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if (sdcp->state == BLK_STOP) {
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/* Note, the DMA must be enabled before the IRQs.*/
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bool b;
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b = dmaStreamAllocate(sdcp->dma, STM32_SDC_SDMMC1_IRQ_PRIORITY, NULL, NULL);
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osalDbgAssert(!b, "stream already allocated");
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dmaStreamSetPeripheral(sdcp->dma, &sdcp->sdmmc->FIFO);
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#if STM32_DMA_ADVANCED
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dmaStreamSetFIFO(sdcp->dma, STM32_DMA_FCR_DMDIS | STM32_DMA_FCR_FTH_FULL);
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#endif
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nvicEnableVector(STM32_SDMMC1_NUMBER, STM32_SDC_SDMMC1_IRQ_PRIORITY);
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rccEnableSDMMC1(FALSE);
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}
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/* Configuration, card clock is initially stopped.*/
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sdcp->sdmmc->POWER = 0;
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sdcp->sdmmc->CLKCR = 0;
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sdcp->sdmmc->DCTRL = 0;
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sdcp->sdmmc->DTIMER = 0;
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}
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/**
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* @brief Deactivates the SDC peripheral.
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*
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* @param[in] sdcp pointer to the @p SDCDriver object
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*
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* @notapi
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*/
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void sdc_lld_stop(SDCDriver *sdcp) {
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if (sdcp->state != BLK_STOP) {
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/* SDIO deactivation.*/
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sdcp->sdmmc->POWER = 0;
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sdcp->sdmmc->CLKCR = 0;
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sdcp->sdmmc->DCTRL = 0;
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sdcp->sdmmc->DTIMER = 0;
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/* Clock deactivation.*/
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nvicDisableVector(STM32_SDMMC1_NUMBER);
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dmaStreamRelease(sdcp->dma);
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rccDisableSDMMC1(FALSE);
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}
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}
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/**
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* @brief Starts the SDIO clock and sets it to init mode (400kHz or less).
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*
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* @param[in] sdcp pointer to the @p SDCDriver object
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*
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* @notapi
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*/
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void sdc_lld_start_clk(SDCDriver *sdcp) {
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/* Initial clock setting: 400kHz, 1bit mode.*/
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sdcp->sdmmc->CLKCR = SDMMC_CLKDIV_LS;
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sdcp->sdmmc->POWER |= SDMMC_POWER_PWRCTRL_0 | SDMMC_POWER_PWRCTRL_1;
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sdcp->sdmmc->CLKCR |= SDMMC_CLKCR_CLKEN;
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/* Clock activation delay.*/
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osalThreadSleep(OSAL_MS2ST(STM32_SDC_SDMMC_CLOCK_DELAY));
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}
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/**
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* @brief Sets the SDIO clock to data mode (25MHz or less).
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*
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* @param[in] sdcp pointer to the @p SDCDriver object
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* @param[in] clk the clock mode
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*
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* @notapi
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*/
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void sdc_lld_set_data_clk(SDCDriver *sdcp, sdcbusclk_t clk) {
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#if 0
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if (SDC_CLK_50MHz == clk) {
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sdcp->sdmmc->CLKCR = (sdcp->sdmmc->CLKCR & 0xFFFFFF00U) |
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SDMMC_CLKDIV_HS | SDMMC_CLKCR_BYPASS;
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}
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else
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sdcp->sdmmc->CLKCR = (sdcp->sdmmc->CLKCR & 0xFFFFFF00U) | SDMMC_CLKDIV_HS;
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#else
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(void)clk;
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sdcp->sdmmc->CLKCR = (sdcp->sdmmc->CLKCR & 0xFFFFFF00U) | SDMMC_CLKDIV_HS;
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#endif
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}
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/**
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* @brief Stops the SDIO clock.
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*
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* @param[in] sdcp pointer to the @p SDCDriver object
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*
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* @notapi
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*/
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void sdc_lld_stop_clk(SDCDriver *sdcp) {
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sdcp->sdmmc->CLKCR = 0;
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sdcp->sdmmc->POWER = 0;
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}
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/**
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* @brief Switches the bus to 4 bits mode.
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*
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* @param[in] sdcp pointer to the @p SDCDriver object
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* @param[in] mode bus mode
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*
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* @notapi
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*/
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void sdc_lld_set_bus_mode(SDCDriver *sdcp, sdcbusmode_t mode) {
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uint32_t clk = sdcp->sdmmc->CLKCR & ~SDMMC_CLKCR_WIDBUS;
|
|
|
|
switch (mode) {
|
|
case SDC_MODE_1BIT:
|
|
sdcp->sdmmc->CLKCR = clk;
|
|
break;
|
|
case SDC_MODE_4BIT:
|
|
sdcp->sdmmc->CLKCR = clk | SDMMC_CLKCR_WIDBUS_0;
|
|
break;
|
|
case SDC_MODE_8BIT:
|
|
sdcp->sdmmc->CLKCR = clk | SDMMC_CLKCR_WIDBUS_1;
|
|
break;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Sends an SDIO command with no response expected.
|
|
*
|
|
* @param[in] sdcp pointer to the @p SDCDriver object
|
|
* @param[in] cmd card command
|
|
* @param[in] arg command argument
|
|
*
|
|
* @notapi
|
|
*/
|
|
void sdc_lld_send_cmd_none(SDCDriver *sdcp, uint8_t cmd, uint32_t arg) {
|
|
|
|
sdcp->sdmmc->ARG = arg;
|
|
sdcp->sdmmc->CMD = (uint32_t)cmd | SDMMC_CMD_CPSMEN;
|
|
while ((sdcp->sdmmc->STA & SDMMC_STA_CMDSENT) == 0)
|
|
;
|
|
sdcp->sdmmc->ICR = SDMMC_ICR_CMDSENTC;
|
|
}
|
|
|
|
/**
|
|
* @brief Sends an SDIO command with a short response expected.
|
|
* @note The CRC is not verified.
|
|
*
|
|
* @param[in] sdcp pointer to the @p SDCDriver object
|
|
* @param[in] cmd card command
|
|
* @param[in] arg command argument
|
|
* @param[out] resp pointer to the response buffer (one word)
|
|
*
|
|
* @return The operation status.
|
|
* @retval HAL_SUCCESS operation succeeded.
|
|
* @retval HAL_FAILED operation failed.
|
|
*
|
|
* @notapi
|
|
*/
|
|
bool sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
|
|
uint32_t *resp) {
|
|
uint32_t sta;
|
|
|
|
sdcp->sdmmc->ARG = arg;
|
|
sdcp->sdmmc->CMD = (uint32_t)cmd | SDMMC_CMD_WAITRESP_0 | SDMMC_CMD_CPSMEN;
|
|
while (((sta = sdcp->sdmmc->STA) & (SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT |
|
|
SDMMC_STA_CCRCFAIL)) == 0)
|
|
;
|
|
sdcp->sdmmc->ICR = sta & (SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT |
|
|
SDMMC_STA_CCRCFAIL);
|
|
if ((sta & (SDMMC_STA_CTIMEOUT)) != 0) {
|
|
sdc_lld_collect_errors(sdcp, sta);
|
|
return HAL_FAILED;
|
|
}
|
|
*resp = sdcp->sdmmc->RESP1;
|
|
return HAL_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
* @brief Sends an SDIO command with a short response expected and CRC.
|
|
*
|
|
* @param[in] sdcp pointer to the @p SDCDriver object
|
|
* @param[in] cmd card command
|
|
* @param[in] arg command argument
|
|
* @param[out] resp pointer to the response buffer (one word)
|
|
*
|
|
* @return The operation status.
|
|
* @retval HAL_SUCCESS operation succeeded.
|
|
* @retval HAL_FAILED operation failed.
|
|
*
|
|
* @notapi
|
|
*/
|
|
bool sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
|
|
uint32_t *resp) {
|
|
uint32_t sta;
|
|
|
|
sdcp->sdmmc->ARG = arg;
|
|
sdcp->sdmmc->CMD = (uint32_t)cmd | SDMMC_CMD_WAITRESP_0 | SDMMC_CMD_CPSMEN;
|
|
while (((sta = sdcp->sdmmc->STA) & (SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT |
|
|
SDMMC_STA_CCRCFAIL)) == 0)
|
|
;
|
|
sdcp->sdmmc->ICR = sta & (SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT | SDMMC_STA_CCRCFAIL);
|
|
if ((sta & (SDMMC_STA_CTIMEOUT | SDMMC_STA_CCRCFAIL)) != 0) {
|
|
sdc_lld_collect_errors(sdcp, sta);
|
|
return HAL_FAILED;
|
|
}
|
|
*resp = sdcp->sdmmc->RESP1;
|
|
return HAL_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
* @brief Sends an SDIO command with a long response expected and CRC.
|
|
*
|
|
* @param[in] sdcp pointer to the @p SDCDriver object
|
|
* @param[in] cmd card command
|
|
* @param[in] arg command argument
|
|
* @param[out] resp pointer to the response buffer (four words)
|
|
*
|
|
* @return The operation status.
|
|
* @retval HAL_SUCCESS operation succeeded.
|
|
* @retval HAL_FAILED operation failed.
|
|
*
|
|
* @notapi
|
|
*/
|
|
bool sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
|
|
uint32_t *resp) {
|
|
uint32_t sta;
|
|
|
|
(void)sdcp;
|
|
|
|
sdcp->sdmmc->ARG = arg;
|
|
sdcp->sdmmc->CMD = (uint32_t)cmd | SDMMC_CMD_WAITRESP_0 | SDMMC_CMD_WAITRESP_1 |
|
|
SDMMC_CMD_CPSMEN;
|
|
while (((sta = sdcp->sdmmc->STA) & (SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT |
|
|
SDMMC_STA_CCRCFAIL)) == 0)
|
|
;
|
|
sdcp->sdmmc->ICR = sta & (SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT |
|
|
SDMMC_STA_CCRCFAIL);
|
|
if ((sta & (SDMMC_STA_ERROR_MASK)) != 0) {
|
|
sdc_lld_collect_errors(sdcp, sta);
|
|
return HAL_FAILED;
|
|
}
|
|
/* Save bytes in reverse order because MSB in response comes first.*/
|
|
*resp++ = sdcp->sdmmc->RESP4;
|
|
*resp++ = sdcp->sdmmc->RESP3;
|
|
*resp++ = sdcp->sdmmc->RESP2;
|
|
*resp = sdcp->sdmmc->RESP1;
|
|
return HAL_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
* @brief Reads special registers using data bus.
|
|
* @details Needs only during card detection procedure.
|
|
*
|
|
* @param[in] sdcp pointer to the @p SDCDriver object
|
|
* @param[out] buf pointer to the read buffer
|
|
* @param[in] bytes number of bytes to read
|
|
* @param[in] cmd card command
|
|
* @param[in] arg argument for command
|
|
*
|
|
* @return The operation status.
|
|
* @retval HAL_SUCCESS operation succeeded.
|
|
* @retval HAL_FAILED operation failed.
|
|
*
|
|
* @notapi
|
|
*/
|
|
bool sdc_lld_read_special(SDCDriver *sdcp, uint8_t *buf, size_t bytes,
|
|
uint8_t cmd, uint32_t arg) {
|
|
uint32_t resp[1];
|
|
|
|
if(sdc_lld_prepare_read_bytes(sdcp, buf, bytes))
|
|
goto error;
|
|
|
|
if (sdc_lld_send_cmd_short_crc(sdcp, cmd, arg, resp)
|
|
|| MMCSD_R1_ERROR(resp[0]))
|
|
goto error;
|
|
|
|
if (sdc_lld_wait_transaction_end(sdcp, 1, resp))
|
|
goto error;
|
|
|
|
return HAL_SUCCESS;
|
|
|
|
error:
|
|
sdc_lld_error_cleanup(sdcp, 1, resp);
|
|
return HAL_FAILED;
|
|
}
|
|
|
|
/**
|
|
* @brief Reads one or more blocks.
|
|
*
|
|
* @param[in] sdcp pointer to the @p SDCDriver object
|
|
* @param[in] startblk first block to read
|
|
* @param[out] buf pointer to the read buffer
|
|
* @param[in] blocks number of blocks to read
|
|
*
|
|
* @return The operation status.
|
|
* @retval HAL_SUCCESS operation succeeded.
|
|
* @retval HAL_FAILED operation failed.
|
|
*
|
|
* @notapi
|
|
*/
|
|
bool sdc_lld_read_aligned(SDCDriver *sdcp, uint32_t startblk,
|
|
uint8_t *buf, uint32_t blocks) {
|
|
uint32_t resp[1];
|
|
|
|
osalDbgCheck(blocks < 0x1000000 / MMCSD_BLOCK_SIZE);
|
|
|
|
sdcp->sdmmc->DTIMER = SDMMC_READ_TIMEOUT;
|
|
|
|
/* Checks for errors and waits for the card to be ready for reading.*/
|
|
if (_sdc_wait_for_transfer_state(sdcp))
|
|
return HAL_FAILED;
|
|
|
|
/* Prepares the DMA channel for writing.*/
|
|
dmaStreamSetMemory0(sdcp->dma, buf);
|
|
dmaStreamSetTransactionSize(sdcp->dma,
|
|
(blocks * MMCSD_BLOCK_SIZE) / sizeof (uint32_t));
|
|
dmaStreamSetMode(sdcp->dma, sdcp->dmamode | STM32_DMA_CR_DIR_P2M);
|
|
dmaStreamEnable(sdcp->dma);
|
|
|
|
/* Setting up data transfer.*/
|
|
sdcp->sdmmc->ICR = SDMMC_ICR_ALL_FLAGS;
|
|
sdcp->sdmmc->MASK = SDMMC_MASK_DCRCFAILIE |
|
|
SDMMC_MASK_DTIMEOUTIE |
|
|
SDMMC_MASK_RXOVERRIE |
|
|
SDMMC_MASK_DATAENDIE;
|
|
sdcp->sdmmc->DLEN = blocks * MMCSD_BLOCK_SIZE;
|
|
|
|
/* Transaction starts just after DTEN bit setting.*/
|
|
sdcp->sdmmc->DCTRL = SDMMC_DCTRL_DTDIR |
|
|
SDMMC_DCTRL_DBLOCKSIZE_3 |
|
|
SDMMC_DCTRL_DBLOCKSIZE_0 |
|
|
SDMMC_DCTRL_DMAEN |
|
|
SDMMC_DCTRL_DTEN;
|
|
|
|
if (sdc_lld_prepare_read(sdcp, startblk, blocks, resp) == TRUE)
|
|
goto error;
|
|
|
|
if (sdc_lld_wait_transaction_end(sdcp, blocks, resp) == TRUE)
|
|
goto error;
|
|
|
|
return HAL_SUCCESS;
|
|
|
|
error:
|
|
sdc_lld_error_cleanup(sdcp, blocks, resp);
|
|
return HAL_FAILED;
|
|
}
|
|
|
|
/**
|
|
* @brief Writes one or more blocks.
|
|
*
|
|
* @param[in] sdcp pointer to the @p SDCDriver object
|
|
* @param[in] startblk first block to write
|
|
* @param[out] buf pointer to the write buffer
|
|
* @param[in] n number of blocks to write
|
|
*
|
|
* @return The operation status.
|
|
* @retval HAL_SUCCESS operation succeeded.
|
|
* @retval HAL_FAILED operation failed.
|
|
*
|
|
* @notapi
|
|
*/
|
|
bool sdc_lld_write_aligned(SDCDriver *sdcp, uint32_t startblk,
|
|
const uint8_t *buf, uint32_t blocks) {
|
|
uint32_t resp[1];
|
|
|
|
osalDbgCheck(blocks < 0x1000000 / MMCSD_BLOCK_SIZE);
|
|
|
|
sdcp->sdmmc->DTIMER = SDMMC_WRITE_TIMEOUT;
|
|
|
|
/* Checks for errors and waits for the card to be ready for writing.*/
|
|
if (_sdc_wait_for_transfer_state(sdcp))
|
|
return HAL_FAILED;
|
|
|
|
/* Prepares the DMA channel for writing.*/
|
|
dmaStreamSetMemory0(sdcp->dma, buf);
|
|
dmaStreamSetTransactionSize(sdcp->dma,
|
|
(blocks * MMCSD_BLOCK_SIZE) / sizeof (uint32_t));
|
|
dmaStreamSetMode(sdcp->dma, sdcp->dmamode | STM32_DMA_CR_DIR_M2P);
|
|
dmaStreamEnable(sdcp->dma);
|
|
|
|
/* Setting up data transfer.*/
|
|
sdcp->sdmmc->ICR = SDMMC_ICR_ALL_FLAGS;
|
|
sdcp->sdmmc->MASK = SDMMC_MASK_DCRCFAILIE |
|
|
SDMMC_MASK_DTIMEOUTIE |
|
|
SDMMC_MASK_TXUNDERRIE |
|
|
SDMMC_MASK_DATAENDIE;
|
|
sdcp->sdmmc->DLEN = blocks * MMCSD_BLOCK_SIZE;
|
|
|
|
/* Talk to card what we want from it.*/
|
|
if (sdc_lld_prepare_write(sdcp, startblk, blocks, resp) == TRUE)
|
|
goto error;
|
|
|
|
/* Transaction starts just after DTEN bit setting.*/
|
|
sdcp->sdmmc->DCTRL = SDMMC_DCTRL_DBLOCKSIZE_3 |
|
|
SDMMC_DCTRL_DBLOCKSIZE_0 |
|
|
SDMMC_DCTRL_DMAEN |
|
|
SDMMC_DCTRL_DTEN;
|
|
|
|
if (sdc_lld_wait_transaction_end(sdcp, blocks, resp) == TRUE)
|
|
goto error;
|
|
|
|
return HAL_SUCCESS;
|
|
|
|
error:
|
|
sdc_lld_error_cleanup(sdcp, blocks, resp);
|
|
return HAL_FAILED;
|
|
}
|
|
|
|
/**
|
|
* @brief Reads one or more blocks.
|
|
*
|
|
* @param[in] sdcp pointer to the @p SDCDriver object
|
|
* @param[in] startblk first block to read
|
|
* @param[out] buf pointer to the read buffer
|
|
* @param[in] blocks number of blocks to read
|
|
*
|
|
* @return The operation status.
|
|
* @retval HAL_SUCCESS operation succeeded.
|
|
* @retval HAL_FAILED operation failed.
|
|
*
|
|
* @notapi
|
|
*/
|
|
bool sdc_lld_read(SDCDriver *sdcp, uint32_t startblk,
|
|
uint8_t *buf, uint32_t blocks) {
|
|
|
|
#if STM32_SDC_SDMMC_UNALIGNED_SUPPORT
|
|
if (((unsigned)buf & 3) != 0) {
|
|
uint32_t i;
|
|
for (i = 0; i < blocks; i++) {
|
|
if (sdc_lld_read_aligned(sdcp, startblk, u.buf, 1))
|
|
return HAL_FAILED;
|
|
memcpy(buf, u.buf, MMCSD_BLOCK_SIZE);
|
|
buf += MMCSD_BLOCK_SIZE;
|
|
startblk++;
|
|
}
|
|
return HAL_SUCCESS;
|
|
}
|
|
#endif /* STM32_SDC_SDMMC_UNALIGNED_SUPPORT */
|
|
return sdc_lld_read_aligned(sdcp, startblk, buf, blocks);
|
|
}
|
|
|
|
/**
|
|
* @brief Writes one or more blocks.
|
|
*
|
|
* @param[in] sdcp pointer to the @p SDCDriver object
|
|
* @param[in] startblk first block to write
|
|
* @param[out] buf pointer to the write buffer
|
|
* @param[in] blocks number of blocks to write
|
|
*
|
|
* @return The operation status.
|
|
* @retval HAL_SUCCESS operation succeeded.
|
|
* @retval HAL_FAILED operation failed.
|
|
*
|
|
* @notapi
|
|
*/
|
|
bool sdc_lld_write(SDCDriver *sdcp, uint32_t startblk,
|
|
const uint8_t *buf, uint32_t blocks) {
|
|
|
|
#if STM32_SDC_SDMMC_UNALIGNED_SUPPORT
|
|
if (((unsigned)buf & 3) != 0) {
|
|
uint32_t i;
|
|
for (i = 0; i < blocks; i++) {
|
|
memcpy(u.buf, buf, MMCSD_BLOCK_SIZE);
|
|
buf += MMCSD_BLOCK_SIZE;
|
|
if (sdc_lld_write_aligned(sdcp, startblk, u.buf, 1))
|
|
return HAL_FAILED;
|
|
startblk++;
|
|
}
|
|
return HAL_SUCCESS;
|
|
}
|
|
#endif /* STM32_SDC_SDMMC_UNALIGNED_SUPPORT */
|
|
return sdc_lld_write_aligned(sdcp, startblk, buf, blocks);
|
|
}
|
|
|
|
/**
|
|
* @brief Waits for card idle condition.
|
|
*
|
|
* @param[in] sdcp pointer to the @p SDCDriver object
|
|
*
|
|
* @return The operation status.
|
|
* @retval HAL_SUCCESS the operation succeeded.
|
|
* @retval HAL_FAILED the operation failed.
|
|
*
|
|
* @api
|
|
*/
|
|
bool sdc_lld_sync(SDCDriver *sdcp) {
|
|
|
|
/* TODO: Implement.*/
|
|
(void)sdcp;
|
|
return HAL_SUCCESS;
|
|
}
|
|
|
|
#endif /* HAL_USE_SDC */
|
|
|
|
/** @} */
|