2417 lines
170 KiB
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2417 lines
170 KiB
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<td class="blob-line-code"><div class="code-body highlight"><pre><div class='line' id='LC1'><span class="cm">/*</span></div><div class='line' id='LC2'><span class="cm"> ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,</span></div><div class='line' id='LC3'><span class="cm"> 2011,2012 Giovanni Di Sirio.</span></div><div class='line' id='LC4'><br/></div><div class='line' id='LC5'><span class="cm"> This file is part of ChibiOS/RT.</span></div><div class='line' id='LC6'><br/></div><div class='line' id='LC7'><span class="cm"> ChibiOS/RT is free software; you can redistribute it and/or modify</span></div><div class='line' id='LC8'><span class="cm"> it under the terms of the GNU General Public License as published by</span></div><div class='line' id='LC9'><span class="cm"> the Free Software Foundation; either version 3 of the License, or</span></div><div class='line' id='LC10'><span class="cm"> (at your option) any later version.</span></div><div class='line' id='LC11'><br/></div><div class='line' id='LC12'><span class="cm"> ChibiOS/RT is distributed in the hope that it will be useful,</span></div><div class='line' id='LC13'><span class="cm"> but WITHOUT ANY WARRANTY; without even the implied warranty of</span></div><div class='line' id='LC14'><span class="cm"> MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span></div><div class='line' id='LC15'><span class="cm"> GNU General Public License for more details.</span></div><div class='line' id='LC16'><br/></div><div class='line' id='LC17'><span class="cm"> You should have received a copy of the GNU General Public License</span></div><div class='line' id='LC18'><span class="cm"> along with this program. If not, see <http://www.gnu.org/licenses/>.</span></div><div class='line' id='LC19'><span class="cm">*/</span></div><div class='line' id='LC20'><br/></div><div class='line' id='LC21'><span class="cm">/**</span></div><div class='line' id='LC22'><span class="cm"> * @file STM32/DACv1/dac_lld.h</span></div><div class='line' id='LC23'><span class="cm"> * @brief STM32 DAC subsystem low level driver header.</span></div><div class='line' id='LC24'><span class="cm"> *</span></div><div class='line' id='LC25'><span class="cm"> * @addtogroup DAC</span></div><div class='line' id='LC26'><span class="cm"> * @{</span></div><div class='line' id='LC27'><span class="cm"> */</span></div><div class='line' id='LC28'><br/></div><div class='line' id='LC29'><span class="cp">#ifndef _DAC_LLD_H_</span></div><div class='line' id='LC30'><span class="cp">#define _DAC_LLD_H_</span></div><div class='line' id='LC31'><br/></div><div class='line' id='LC32'><span class="cp">#include "stm32_tim.h"</span></div><div class='line' id='LC33'><br/></div><div class='line' id='LC34'><span class="cp">#if HAL_USE_DAC || defined(__DOXYGEN__)</span></div><div class='line' id='LC35'><br/></div><div class='line' id='LC36'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC37'><span class="cm">/* Driver constants. */</span></div><div class='line' id='LC38'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC39'><br/></div><div class='line' id='LC40'><span class="cp">#define STM32_DAC_CR_EN DAC_CR_EN1</span></div><div class='line' id='LC41'><span class="cp">#define STM32_DAC_CR_DMAEN DAC_CR_DMAEN1</span></div><div class='line' id='LC42'><span class="cp">#define STM32_DAC_CR_TEN DAC_CR_TEN1</span></div><div class='line' id='LC43'><br/></div><div class='line' id='LC44'><span class="cp">#define STM32_DAC_CR_MASK (uint32_t)0x00000FFE</span></div><div class='line' id='LC45'><br/></div><div class='line' id='LC46'><span class="cp">#define STM32_DAC_CR_BOFF_ENABLE (uint32_t)0x00000000</span></div><div class='line' id='LC47'><span class="cp">#define STM32_DAC_CR_BOFF_DISABLE DAC_CR_BOFF1</span></div><div class='line' id='LC48'><br/></div><div class='line' id='LC49'><span class="cp">#define STM32_DAC_CR_TSEL_NONE (uint32_t)0x00000000</span></div><div class='line' id='LC50'><span class="cp">#define STM32_DAC_CR_TSEL_TIM2 DAC_CR_TEN1 | DAC_CR_TSEL1_2</span></div><div class='line' id='LC51'><span class="cp">#define STM32_DAC_CR_TSEL_TIM4 DAC_CR_TEN1 | DAC_CR_TEN0 | DAC_CR_TSEL1_2</span></div><div class='line' id='LC52'><span class="cp">#define STM32_DAC_CR_TSEL_TIM5 DAC_CR_TEN1 | DAC_CR_TEN0 | DAC_CR_TSEL1_1</span></div><div class='line' id='LC53'><span class="cp">#define STM32_DAC_CR_TSEL_TIM6 DAC_CR_TEN1</span></div><div class='line' id='LC54'><span class="cp">#define STM32_DAC_CR_TSEL_TIM7 DAC_CR_TEN1 | DAC_CR_TSEL1_1</span></div><div class='line' id='LC55'><span class="cp">#define STM32_DAC_CR_TSEL_TIM3 DAC_CR_TEN1 | DAC_CR_TSEL1_0</span></div><div class='line' id='LC56'><span class="cp">#define STM32_DAC_CR_TSEL_TIM18 DAC_CR_TEN1 | DAC_CR_TSEL1_0 | DAC_CR_TSEL1_1</span></div><div class='line' id='LC57'><span class="cp">#define STM32_DAC_CR_TSEL_EXT_IT9 DAC_CR_TEN1 | DAC_CR_TEN1 | DAC_CR_TSEL1_2</span></div><div class='line' id='LC58'><span class="cp">#define STM32_DAC_CR_TSEL_SOFT DAC_CR_TEN1 | DAC_CR_TEN0 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_2</span></div><div class='line' id='LC59'><br/></div><div class='line' id='LC60'><span class="cp">#define STM32_DAC_CR_WAVE_NONE (uint32_t)0x00000000</span></div><div class='line' id='LC61'><span class="cp">#define STM32_DAC_CR_WAVE_NOISE DAC_CR_WAVE1_0</span></div><div class='line' id='LC62'><span class="cp">#define STM32_DAC_CR_WAVE_TRIANGLE DAC_CR_WAVE1_1</span></div><div class='line' id='LC63'><br/></div><div class='line' id='LC64'><span class="cp">#define STM32_DAC_MAMP_1 (uint32_t)0x00000000</span></div><div class='line' id='LC65'><span class="cp">#define STM32_DAC_MAMP_3 DAC_CR_MAMP1_0</span></div><div class='line' id='LC66'><span class="cp">#define STM32_DAC_MAMP_7 DAC_CR_MAMP1_1</span></div><div class='line' id='LC67'><span class="cp">#define STM32_DAC_MAMP_15 DAC_CR_MAMP1_0 | DAC_CR_MAMP1_1</span></div><div class='line' id='LC68'><span class="cp">#define STM32_DAC_MAMP_31 DAC_CR_MAMP1_2</span></div><div class='line' id='LC69'><span class="cp">#define STM32_DAC_MAMP_63 DAC_CR_MAMP1_0 | DAC_CR_MAMP1_2</span></div><div class='line' id='LC70'><span class="cp">#define STM32_DAC_MAMP_127 DAC_CR_MAMP1_1 | DAC_CR_MAMP1_2</span></div><div class='line' id='LC71'><span class="cp">#define STM32_DAC_MAMP_255 DAC_CR_MAMP1_0 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_2</span></div><div class='line' id='LC72'><span class="cp">#define STM32_DAC_MAMP_511 DAC_CR_MAMP1_3</span></div><div class='line' id='LC73'><span class="cp">#define STM32_DAC_MAMP_1023 DAC_CR_MAMP1_0 | DAC_CR_MAMP1_3</span></div><div class='line' id='LC74'><span class="cp">#define STM32_DAC_MAMP_2047 DAC_CR_MAMP1_1 | DAC_CR_MAMP1_3</span></div><div class='line' id='LC75'><span class="cp">#define STM32_DAC_MAMP_4095 DAC_CR_MAMP1_0 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_2</span></div><div class='line' id='LC76'><br/></div><div class='line' id='LC77'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC78'><span class="cm">/* Driver pre-compile time settings. */</span></div><div class='line' id='LC79'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC80'><br/></div><div class='line' id='LC81'><span class="cm">/**</span></div><div class='line' id='LC82'><span class="cm"> * @name Configuration options</span></div><div class='line' id='LC83'><span class="cm"> * @{</span></div><div class='line' id='LC84'><span class="cm"> */</span></div><div class='line' id='LC85'><span class="cm">/**</span></div><div class='line' id='LC86'><span class="cm"> * @brief DAC CHN1 driver enable switch.</span></div><div class='line' id='LC87'><span class="cm"> * @details If set to @p TRUE the support for DAC CHN1 is included.</span></div><div class='line' id='LC88'><span class="cm"> * @note The default is @p TRUE.</span></div><div class='line' id='LC89'><span class="cm"> */</span></div><div class='line' id='LC90'><span class="cp">#if !defined(STM32_DAC_USE_CHN1) || defined(__DOXYGEN__)</span></div><div class='line' id='LC91'><span class="cp">#define STM32_DAC_USE_CHN1 FALSE</span></div><div class='line' id='LC92'><span class="cp">#endif</span></div><div class='line' id='LC93'><br/></div><div class='line' id='LC94'><span class="cm">/**</span></div><div class='line' id='LC95'><span class="cm"> * @brief DAC CHN2 driver enable switch.</span></div><div class='line' id='LC96'><span class="cm"> * @details If set to @p TRUE the support for DAC CHN2 is included.</span></div><div class='line' id='LC97'><span class="cm"> * @note The default is @p TRUE.</span></div><div class='line' id='LC98'><span class="cm"> */</span></div><div class='line' id='LC99'><span class="cp">#if !defined(STM32_DAC_USE_CHN2) || defined(__DOXYGEN__)</span></div><div class='line' id='LC100'><span class="cp">#define STM32_DAC_USE_CHN2 FALSE</span></div><div class='line' id='LC101'><span class="cp">#endif</span></div><div class='line' id='LC102'><br/></div><div class='line' id='LC103'><span class="cm">/**</span></div><div class='line' id='LC104'><span class="cm"> * @brief DAC CHN3 driver enable switch.</span></div><div class='line' id='LC105'><span class="cm"> * @details If set to @p TRUE the support for DAC CHN3 is included.</span></div><div class='line' id='LC106'><span class="cm"> * @note The default is @p TRUE.</span></div><div class='line' id='LC107'><span class="cm"> */</span></div><div class='line' id='LC108'><span class="cp">#if !defined(STM32_DAC_USE_CHN3) || defined(__DOXYGEN__)</span></div><div class='line' id='LC109'><span class="cp">#define STM32_DAC_USE_CHN3 FALSE</span></div><div class='line' id='LC110'><span class="cp">#endif</span></div><div class='line' id='LC111'><br/></div><div class='line' id='LC112'><span class="cm">/**</span></div><div class='line' id='LC113'><span class="cm"> * @brief DAC CHN1 interrupt priority level setting.</span></div><div class='line' id='LC114'><span class="cm"> */</span></div><div class='line' id='LC115'><span class="cp">#if !defined(STM32_DAC_CHN1_IRQ_PRIORITY) || defined(__DOXYGEN__)</span></div><div class='line' id='LC116'><span class="cp">#define STM32_DAC_CHN1_IRQ_PRIORITY 10</span></div><div class='line' id='LC117'><span class="cp">#endif</span></div><div class='line' id='LC118'><br/></div><div class='line' id='LC119'><span class="cm">/**</span></div><div class='line' id='LC120'><span class="cm"> * @brief DAC CHN2 interrupt priority level setting.</span></div><div class='line' id='LC121'><span class="cm"> */</span></div><div class='line' id='LC122'><span class="cp">#if !defined(STM32_DAC_CHN2_IRQ_PRIORITY) || defined(__DOXYGEN__)</span></div><div class='line' id='LC123'><span class="cp">#define STM32_DAC_CHN2_IRQ_PRIORITY 10</span></div><div class='line' id='LC124'><span class="cp">#endif</span></div><div class='line' id='LC125'><br/></div><div class='line' id='LC126'><span class="cm">/**</span></div><div class='line' id='LC127'><span class="cm"> * @brief DAC CHN3 interrupt priority level setting.</span></div><div class='line' id='LC128'><span class="cm"> */</span></div><div class='line' id='LC129'><span class="cp">#if !defined(STM32_DAC_CHN3_IRQ_PRIORITY) || defined(__DOXYGEN__)</span></div><div class='line' id='LC130'><span class="cp">#define STM32_DAC_CHN3_IRQ_PRIORITY 10</span></div><div class='line' id='LC131'><span class="cp">#endif</span></div><div class='line' id='LC132'><br/></div><div class='line' id='LC133'><span class="cm">/**</span></div><div class='line' id='LC134'><span class="cm"> * @brief DAC CHN1 DMA priority (0..3|lowest..highest).</span></div><div class='line' id='LC135'><span class="cm"> */</span></div><div class='line' id='LC136'><span class="cp">#if !defined(STM32_DAC_CHN1_DMA_PRIORITY) || defined(__DOXYGEN__)</span></div><div class='line' id='LC137'><span class="cp">#define STM32_DAC_CHN1_DMA_PRIORITY 2</span></div><div class='line' id='LC138'><span class="cp">#endif</span></div><div class='line' id='LC139'><br/></div><div class='line' id='LC140'><span class="cm">/**</span></div><div class='line' id='LC141'><span class="cm"> * @brief DAC CHN2 DMA priority (0..3|lowest..highest).</span></div><div class='line' id='LC142'><span class="cm"> */</span></div><div class='line' id='LC143'><span class="cp">#if !defined(STM32_DAC_CHN2_DMA_PRIORITY) || defined(__DOXYGEN__)</span></div><div class='line' id='LC144'><span class="cp">#define STM32_DAC_CHN2_DMA_PRIORITY 2</span></div><div class='line' id='LC145'><span class="cp">#endif</span></div><div class='line' id='LC146'><br/></div><div class='line' id='LC147'><span class="cm">/**</span></div><div class='line' id='LC148'><span class="cm"> * @brief DAC CHN3 DMA priority (0..3|lowest..highest).</span></div><div class='line' id='LC149'><span class="cm"> */</span></div><div class='line' id='LC150'><span class="cp">#if !defined(STM32_DAC_CHN3_DMA_PRIORITY) || defined(__DOXYGEN__)</span></div><div class='line' id='LC151'><span class="cp">#define STM32_DAC_CHN2_DMA_PRIORITY 2</span></div><div class='line' id='LC152'><span class="cp">#endif</span></div><div class='line' id='LC153'><br/></div><div class='line' id='LC154'><span class="cm">/**</span></div><div class='line' id='LC155'><span class="cm"> * @brief DAC DMA error hook.</span></div><div class='line' id='LC156'><span class="cm"> */</span></div><div class='line' id='LC157'><span class="cp">#if !defined(STM32_DAC_DMA_ERROR_HOOK) || defined(__DOXYGEN__)</span></div><div class='line' id='LC158'><span class="cp">#define STM32_DAC_DMA_ERROR_HOOK(dacp) osalSysHalt()</span></div><div class='line' id='LC159'><span class="cp">#endif</span></div><div class='line' id='LC160'><br/></div><div class='line' id='LC161'><span class="cm">/**</span></div><div class='line' id='LC162'><span class="cm"> * @brief DMA stream used for DAC CHN1 TX operations.</span></div><div class='line' id='LC163'><span class="cm"> * @note This option is only available on platforms with enhanced DMA.</span></div><div class='line' id='LC164'><span class="cm"> */</span></div><div class='line' id='LC165'><span class="cp">#if !defined(STM32_DAC_CHN1_DMA_STREAM) || defined(__DOXYGEN__)</span></div><div class='line' id='LC166'><span class="cp">#define STM32_DAC_CHN1_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)</span></div><div class='line' id='LC167'><span class="cp">#endif</span></div><div class='line' id='LC168'><br/></div><div class='line' id='LC169'><span class="cm">/**</span></div><div class='line' id='LC170'><span class="cm"> * @brief DMA stream used for DAC CHN2 TX operations.</span></div><div class='line' id='LC171'><span class="cm"> * @note This option is only available on platforms with enhanced DMA.</span></div><div class='line' id='LC172'><span class="cm"> */</span></div><div class='line' id='LC173'><span class="cp">#if !defined(STM32_DAC_CHN2_DMA_STREAM) || defined(__DOXYGEN__)</span></div><div class='line' id='LC174'><span class="cp">#define STM32_DAC_CHN2_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)</span></div><div class='line' id='LC175'><span class="cp">#endif</span></div><div class='line' id='LC176'><br/></div><div class='line' id='LC177'><span class="cm">/**</span></div><div class='line' id='LC178'><span class="cm"> * @brief DMA stream used for DAC CHN3 TX operations.</span></div><div class='line' id='LC179'><span class="cm"> * @note This option is only available on platforms with enhanced DMA.</span></div><div class='line' id='LC180'><span class="cm"> */</span></div><div class='line' id='LC181'><span class="cp">#if !defined(STM32_DAC_CHN3_DMA_STREAM) || defined(__DOXYGEN__)</span></div><div class='line' id='LC182'><span class="cp">#define STM32_DAC_CHN3_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)</span></div><div class='line' id='LC183'><span class="cp">#endif</span></div><div class='line' id='LC184'><br/></div><div class='line' id='LC185'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC186'><span class="cm">/* Derived constants and error checks. */</span></div><div class='line' id='LC187'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC188'><br/></div><div class='line' id='LC189'><span class="cp">#if STM32_DAC_USE_CHN1 && !STM32_HAS_DAC_CHN1</span></div><div class='line' id='LC190'><span class="cp">#error "DAC CHN1 not present in the selected device"</span></div><div class='line' id='LC191'><span class="cp">#endif</span></div><div class='line' id='LC192'><br/></div><div class='line' id='LC193'><span class="cp">#if STM32_DAC_USE_CHN2 && !STM32_HAS_DAC_CHN2</span></div><div class='line' id='LC194'><span class="cp">#error "DAC CHN2 not present in the selected device"</span></div><div class='line' id='LC195'><span class="cp">#endif</span></div><div class='line' id='LC196'><br/></div><div class='line' id='LC197'><span class="cp">#if STM32_DAC_USE_CHN3 && !STM32_HAS_DAC_CHN3</span></div><div class='line' id='LC198'><span class="cp">#error "DAC CHN3 not present in the selected device"</span></div><div class='line' id='LC199'><span class="cp">#endif</span></div><div class='line' id='LC200'><br/></div><div class='line' id='LC201'><span class="cp">#if !STM32_DAC_USE_CHN1 && !STM32_DAC_USE_CHN2 && !STM32_DAC_USE_CHN3</span></div><div class='line' id='LC202'><span class="cp">#error "DAC driver activated but no DAC peripheral assigned"</span></div><div class='line' id='LC203'><span class="cp">#endif</span></div><div class='line' id='LC204'><br/></div><div class='line' id='LC205'><span class="cp">#if STM32_DAC_USE_CHN1 && \</span></div><div class='line' id='LC206'><span class="cp"> !STM32_DMA_IS_VALID_ID(STM32_DAC_CHN1_DMA_STREAM, STM32_DAC_CHN1_DMA_MSK)</span></div><div class='line' id='LC207'><span class="cp">#error "invalid DMA stream associated to DAC CHN1"</span></div><div class='line' id='LC208'><span class="cp">#endif</span></div><div class='line' id='LC209'><br/></div><div class='line' id='LC210'><span class="cp">#if STM32_DAC_USE_CHN2 && \</span></div><div class='line' id='LC211'><span class="cp"> !STM32_DMA_IS_VALID_ID(STM32_DAC_CHN2_DMA_STREAM, STM32_DAC_CHN2_DMA_MSK)</span></div><div class='line' id='LC212'><span class="cp">#error "invalid DMA stream associated to DAC CHN2"</span></div><div class='line' id='LC213'><span class="cp">#endif</span></div><div class='line' id='LC214'><br/></div><div class='line' id='LC215'><span class="cp">#if STM32_DAC_USE_CHN3 && \</span></div><div class='line' id='LC216'><span class="cp"> !STM32_DMA_IS_VALID_ID(STM32_DAC_CHN3_DMA_STREAM, STM32_DAC_CHN3_DMA_MSK)</span></div><div class='line' id='LC217'><span class="cp">#error "invalid DMA stream associated to DAC CHN3"</span></div><div class='line' id='LC218'><span class="cp">#endif</span></div><div class='line' id='LC219'><br/></div><div class='line' id='LC220'><span class="cp">#if !defined(STM32_DMA_REQUIRED)</span></div><div class='line' id='LC221'><span class="cp">#define STM32_DMA_REQUIRED</span></div><div class='line' id='LC222'><span class="cp">#endif</span></div><div class='line' id='LC223'><br/></div><div class='line' id='LC224'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC225'><span class="cm">/* Driver data structures and types. */</span></div><div class='line' id='LC226'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC227'><br/></div><div class='line' id='LC228'><span class="cm">/**</span></div><div class='line' id='LC229'><span class="cm"> * @brief Type of a structure representing an DAC driver.</span></div><div class='line' id='LC230'><span class="cm"> */</span></div><div class='line' id='LC231'><span class="k">typedef</span> <span class="k">struct</span> <span class="n">DACDriver</span> <span class="n">DACDriver</span><span class="p">;</span></div><div class='line' id='LC232'><br/></div><div class='line' id='LC233'><span class="cm">/**</span></div><div class='line' id='LC234'><span class="cm"> * @brief Type representing a DAC sample.</span></div><div class='line' id='LC235'><span class="cm"> */</span></div><div class='line' id='LC236'><span class="k">typedef</span> <span class="kt">uint16_t</span> <span class="kt">dacsample_t</span><span class="p">;</span></div><div class='line' id='LC237'><br/></div><div class='line' id='LC238'><span class="cm">/**</span></div><div class='line' id='LC239'><span class="cm"> * @brief DAC notification callback type.</span></div><div class='line' id='LC240'><span class="cm"> *</span></div><div class='line' id='LC241'><span class="cm"> * @param[in] dacp pointer to the @p DACDriver object triggering the</span></div><div class='line' id='LC242'><span class="cm"> * callback</span></div><div class='line' id='LC243'><span class="cm"> */</span></div><div class='line' id='LC244'><span class="k">typedef</span> <span class="nf">void</span> <span class="p">(</span><span class="o">*</span><span class="kt">daccallback_t</span><span class="p">)(</span><span class="n">DACDriver</span> <span class="o">*</span><span class="n">dacp</span><span class="p">);</span></div><div class='line' id='LC245'><br/></div><div class='line' id='LC246'><span class="k">typedef</span> <span class="k">enum</span> <span class="p">{</span> </div><div class='line' id='LC247'> <span class="n">DAC_DHRM_12BIT_RIGHT</span> <span class="o">=</span> <span class="mi">0</span><span class="p">,</span></div><div class='line' id='LC248'> <span class="n">DAC_DHRM_12BIT_LEFT</span> <span class="o">=</span> <span class="mi">1</span><span class="p">,</span></div><div class='line' id='LC249'> <span class="n">DAC_DHRM_8BIT_RIGHT</span> <span class="o">=</span> <span class="mi">2</span><span class="p">,</span></div><div class='line' id='LC250'><span class="cp">#if defined(STM32_HAS_DAC_CHN2) && STM32_HAS_DAC_CHN2 && !defined(__DOXYGEN__)</span></div><div class='line' id='LC251'> <span class="n">DAC_DHRM_12BIT_RIGHT_DUAL</span> <span class="o">=</span> <span class="mi">3</span><span class="p">,</span></div><div class='line' id='LC252'> <span class="n">DAC_DHRM_12BIT_LEFT_DUAL</span> <span class="o">=</span> <span class="mi">4</span><span class="p">,</span></div><div class='line' id='LC253'> <span class="n">DAC_DHRM_8BIT_RIGHT_DUAL</span> <span class="o">=</span> <span class="mi">5</span></div><div class='line' id='LC254'><span class="cp">#endif</span></div><div class='line' id='LC255'><span class="p">}</span> <span class="kt">dacdhrmode_t</span><span class="p">;</span></div><div class='line' id='LC256'><br/></div><div class='line' id='LC257'><span class="cm">/**</span></div><div class='line' id='LC258'><span class="cm"> * @brief DAC Conversion group structure.</span></div><div class='line' id='LC259'><span class="cm"> */</span></div><div class='line' id='LC260'><span class="k">typedef</span> <span class="k">struct</span> <span class="p">{</span></div><div class='line' id='LC261'> <span class="cm">/**</span></div><div class='line' id='LC262'><span class="cm"> * @brief Number of DAC channels.</span></div><div class='line' id='LC263'><span class="cm"> */</span></div><div class='line' id='LC264'> <span class="kt">uint16_t</span> <span class="n">num_channels</span><span class="p">;</span></div><div class='line' id='LC265'> <span class="cm">/**</span></div><div class='line' id='LC266'><span class="cm"> * @brief Operation complete callback or @p NULL.</span></div><div class='line' id='LC267'><span class="cm"> */</span></div><div class='line' id='LC268'> <span class="kt">daccallback_t</span> <span class="n">end_cb</span><span class="p">;</span></div><div class='line' id='LC269'> <span class="cm">/**</span></div><div class='line' id='LC270'><span class="cm"> * @brief Error handling callback or @p NULL.</span></div><div class='line' id='LC271'><span class="cm"> */</span></div><div class='line' id='LC272'> <span class="kt">daccallback_t</span> <span class="n">error_cb</span><span class="p">;</span></div><div class='line' id='LC273'> </div><div class='line' id='LC274'><span class="p">}</span> <span class="n">DACConversionGroup</span><span class="p">;</span></div><div class='line' id='LC275'><br/></div><div class='line' id='LC276'><span class="cm">/**</span></div><div class='line' id='LC277'><span class="cm"> * @brief Driver configuration structure.</span></div><div class='line' id='LC278'><span class="cm"> */</span></div><div class='line' id='LC279'><span class="k">typedef</span> <span class="k">struct</span> <span class="p">{</span></div><div class='line' id='LC280'> <span class="cm">/**</span></div><div class='line' id='LC281'><span class="cm"> * @brief Timer frequency in Hz.</span></div><div class='line' id='LC282'><span class="cm"> */</span></div><div class='line' id='LC283'> <span class="kt">uint32_t</span> <span class="n">frequency</span><span class="p">;</span></div><div class='line' id='LC284'> <span class="cm">/* End of the mandatory fields.*/</span></div><div class='line' id='LC285'> <span class="cm">/**</span></div><div class='line' id='LC286'><span class="cm"> * @brief DAC data holding register mode.</span></div><div class='line' id='LC287'><span class="cm"> */</span></div><div class='line' id='LC288'> <span class="kt">dacdhrmode_t</span> <span class="n">dhrm</span><span class="p">;</span></div><div class='line' id='LC289'> <span class="cm">/**</span></div><div class='line' id='LC290'><span class="cm"> * @brief DAC initialization data.</span></div><div class='line' id='LC291'><span class="cm"> */</span></div><div class='line' id='LC292'> <span class="kt">uint32_t</span> <span class="n">cr_flags</span><span class="p">;</span></div><div class='line' id='LC293'><span class="p">}</span> <span class="n">DACConfig</span><span class="p">;</span></div><div class='line' id='LC294'><br/></div><div class='line' id='LC295'><span class="cm">/**</span></div><div class='line' id='LC296'><span class="cm"> * @brief Structure representing a DAC driver.</span></div><div class='line' id='LC297'><span class="cm"> */</span></div><div class='line' id='LC298'><span class="k">struct</span> <span class="n">DACDriver</span> <span class="p">{</span></div><div class='line' id='LC299'> <span class="cm">/**</span></div><div class='line' id='LC300'><span class="cm"> * @brief Driver state.</span></div><div class='line' id='LC301'><span class="cm"> */</span></div><div class='line' id='LC302'> <span class="kt">dacstate_t</span> <span class="n">state</span><span class="p">;</span></div><div class='line' id='LC303'> <span class="cm">/**</span></div><div class='line' id='LC304'><span class="cm"> * @brief Conversion group.</span></div><div class='line' id='LC305'><span class="cm"> */</span></div><div class='line' id='LC306'> <span class="k">const</span> <span class="n">DACConversionGroup</span> <span class="o">*</span><span class="n">grpp</span><span class="p">;</span></div><div class='line' id='LC307'> <span class="cm">/**</span></div><div class='line' id='LC308'><span class="cm"> * @brief Samples buffer pointer.</span></div><div class='line' id='LC309'><span class="cm"> */</span></div><div class='line' id='LC310'> <span class="k">const</span> <span class="kt">dacsample_t</span> <span class="o">*</span><span class="n">samples</span><span class="p">;</span></div><div class='line' id='LC311'> <span class="cm">/**</span></div><div class='line' id='LC312'><span class="cm"> * @brief Samples buffer size.</span></div><div class='line' id='LC313'><span class="cm"> */</span></div><div class='line' id='LC314'> <span class="kt">uint16_t</span> <span class="n">depth</span><span class="p">;</span></div><div class='line' id='LC315'> <span class="cm">/**</span></div><div class='line' id='LC316'><span class="cm"> * @brief Current configuration data.</span></div><div class='line' id='LC317'><span class="cm"> */</span></div><div class='line' id='LC318'> <span class="k">const</span> <span class="n">DACConfig</span> <span class="o">*</span><span class="n">config</span><span class="p">;</span></div><div class='line' id='LC319'><span class="cp">#if DAC_USE_WAIT || defined(__DOXYGEN__)</span></div><div class='line' id='LC320'> <span class="cm">/**</span></div><div class='line' id='LC321'><span class="cm"> * @brief Waiting thread.</span></div><div class='line' id='LC322'><span class="cm"> */</span></div><div class='line' id='LC323'> <span class="kt">thread_reference_t</span> <span class="kr">thread</span><span class="p">;</span></div><div class='line' id='LC324'><span class="cp">#endif </span><span class="cm">/* DAC_USE_WAIT */</span><span class="cp"></span></div><div class='line' id='LC325'><span class="cp">#if DAC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)</span></div><div class='line' id='LC326'> <span class="cm">/**</span></div><div class='line' id='LC327'><span class="cm"> * @brief Mutex protecting the bus.</span></div><div class='line' id='LC328'><span class="cm"> */</span></div><div class='line' id='LC329'> <span class="kt">mutex_t</span> <span class="n">mutex</span><span class="p">;</span></div><div class='line' id='LC330'><span class="cp">#endif </span><span class="cm">/* DAC_USE_MUTUAL_EXCLUSION */</span><span class="cp"></span></div><div class='line' id='LC331'><span class="cp">#if defined(DAC_DRIVER_EXT_FIELDS)</span></div><div class='line' id='LC332'> <span class="n">DAC_DRIVER_EXT_FIELDS</span></div><div class='line' id='LC333'><span class="cp">#endif</span></div><div class='line' id='LC334'> <span class="cm">/* End of the mandatory fields.*/</span></div><div class='line' id='LC335'> <span class="cm">/**</span></div><div class='line' id='LC336'><span class="cm"> * @brief Pointer to the DAC registers block.</span></div><div class='line' id='LC337'><span class="cm"> */</span></div><div class='line' id='LC338'> <span class="n">DAC_TypeDef</span> <span class="o">*</span><span class="n">dac</span><span class="p">;</span></div><div class='line' id='LC339'> <span class="cm">/**</span></div><div class='line' id='LC340'><span class="cm"> * @brief Pointer to the TIMx registers block.</span></div><div class='line' id='LC341'><span class="cm"> */</span></div><div class='line' id='LC342'> <span class="kt">stm32_tim_t</span> <span class="o">*</span><span class="n">tim</span><span class="p">;</span></div><div class='line' id='LC343'> <span class="cm">/**</span></div><div class='line' id='LC344'><span class="cm"> * @brief The Timer IRQ priority.</span></div><div class='line' id='LC345'><span class="cm"> */</span></div><div class='line' id='LC346'> <span class="kt">uint32_t</span> <span class="n">irqprio</span><span class="p">;</span></div><div class='line' id='LC347'> <span class="cm">/**</span></div><div class='line' id='LC348'><span class="cm"> * @brief Transmit DMA stream.</span></div><div class='line' id='LC349'><span class="cm"> */</span></div><div class='line' id='LC350'> <span class="k">const</span> <span class="kt">stm32_dma_stream_t</span> <span class="o">*</span><span class="n">dma</span><span class="p">;</span></div><div class='line' id='LC351'> <span class="cm">/**</span></div><div class='line' id='LC352'><span class="cm"> * @brief TX DMA mode bit mask.</span></div><div class='line' id='LC353'><span class="cm"> */</span></div><div class='line' id='LC354'> <span class="kt">uint32_t</span> <span class="n">dmamode</span><span class="p">;</span></div><div class='line' id='LC355'> <span class="cm">/**</span></div><div class='line' id='LC356'><span class="cm"> * @brief Timer base clock.</span></div><div class='line' id='LC357'><span class="cm"> */</span></div><div class='line' id='LC358'> <span class="kt">uint32_t</span> <span class="n">clock</span><span class="p">;</span></div><div class='line' id='LC359'><span class="p">};</span></div><div class='line' id='LC360'><br/></div><div class='line' id='LC361'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC362'><span class="cm">/* Driver macros. */</span></div><div class='line' id='LC363'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC364'><br/></div><div class='line' id='LC365'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC366'><span class="cm">/* External declarations. */</span></div><div class='line' id='LC367'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC368'><br/></div><div class='line' id='LC369'><span class="cp">#if STM32_DAC_USE_CHN1 && !defined(__DOXYGEN__)</span></div><div class='line' id='LC370'><span class="k">extern</span> <span class="n">DACDriver</span> <span class="n">DACD1</span><span class="p">;</span></div><div class='line' id='LC371'><span class="cp">#endif</span></div><div class='line' id='LC372'><br/></div><div class='line' id='LC373'><span class="cp">#if STM32_DAC_USE_CHN2 && !defined(__DOXYGEN__)</span></div><div class='line' id='LC374'><span class="k">extern</span> <span class="n">DACDriver</span> <span class="n">DACD2</span><span class="p">;</span></div><div class='line' id='LC375'><span class="cp">#endif</span></div><div class='line' id='LC376'><br/></div><div class='line' id='LC377'><span class="cp">#if STM32_DAC_USE_CHN3 && !defined(__DOXYGEN__)</span></div><div class='line' id='LC378'><span class="k">extern</span> <span class="n">DACDriver</span> <span class="n">DACD3</span><span class="p">;</span></div><div class='line' id='LC379'><span class="cp">#endif</span></div><div class='line' id='LC380'><br/></div><div class='line' id='LC381'><span class="cp">#ifdef __cplusplus</span></div><div class='line' id='LC382'><span class="k">extern</span> <span class="s">"C"</span> <span class="p">{</span></div><div class='line' id='LC383'><span class="cp">#endif</span></div><div class='line' id='LC384'> <span class="kt">void</span> <span class="n">dac_lld_init</span><span class="p">(</span><span class="kt">void</span><span class="p">);</span></div><div class='line' id='LC385'> <span class="kt">void</span> <span class="nf">dac_lld_start</span><span class="p">(</span><span class="n">DACDriver</span> <span class="o">*</span><span class="n">dacp</span><span class="p">);</span></div><div class='line' id='LC386'> <span class="kt">void</span> <span class="nf">dac_lld_stop</span><span class="p">(</span><span class="n">DACDriver</span> <span class="o">*</span><span class="n">dacp</span><span class="p">);</span></div><div class='line' id='LC387'> <span class="kt">void</span> <span class="nf">dac_lld_start_conversion</span><span class="p">(</span><span class="n">DACDriver</span> <span class="o">*</span><span class="n">dacp</span><span class="p">);</span></div><div class='line' id='LC388'> <span class="kt">void</span> <span class="nf">dac_lld_stop_conversion</span><span class="p">(</span><span class="n">DACDriver</span> <span class="o">*</span><span class="n">dacp</span><span class="p">);</span></div><div class='line' id='LC389'><span class="cp">#ifdef __cplusplus</span></div><div class='line' id='LC390'><span class="p">}</span></div><div class='line' id='LC391'><span class="cp">#endif</span></div><div class='line' id='LC392'><br/></div><div class='line' id='LC393'><span class="cp">#endif </span><span class="cm">/* HAL_USE_DAC */</span><span class="cp"></span></div><div class='line' id='LC394'><br/></div><div class='line' id='LC395'><span class="cp">#endif </span><span class="cm">/* _DAC_LLD_H_ */</span><span class="cp"></span></div><div class='line' id='LC396'><br/></div><div class='line' id='LC397'><span class="cm">/** @} */</span></div></pre></div></td>
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