2371 lines
187 KiB
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2371 lines
187 KiB
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<td class="blob-line-code"><div class="code-body highlight"><pre><div class='line' id='LC1'><span class="cm">/*</span></div><div class='line' id='LC2'><span class="cm"> ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,</span></div><div class='line' id='LC3'><span class="cm"> 2011,2012 Giovanni Di Sirio.</span></div><div class='line' id='LC4'><br/></div><div class='line' id='LC5'><span class="cm"> This file is part of ChibiOS/RT.</span></div><div class='line' id='LC6'><br/></div><div class='line' id='LC7'><span class="cm"> ChibiOS/RT is free software; you can redistribute it and/or modify</span></div><div class='line' id='LC8'><span class="cm"> it under the terms of the GNU General Public License as published by</span></div><div class='line' id='LC9'><span class="cm"> the Free Software Foundation; either version 3 of the License, or</span></div><div class='line' id='LC10'><span class="cm"> (at your option) any later version.</span></div><div class='line' id='LC11'><br/></div><div class='line' id='LC12'><span class="cm"> ChibiOS/RT is distributed in the hope that it will be useful,</span></div><div class='line' id='LC13'><span class="cm"> but WITHOUT ANY WARRANTY; without even the implied warranty of</span></div><div class='line' id='LC14'><span class="cm"> MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span></div><div class='line' id='LC15'><span class="cm"> GNU General Public License for more details.</span></div><div class='line' id='LC16'><br/></div><div class='line' id='LC17'><span class="cm"> You should have received a copy of the GNU General Public License</span></div><div class='line' id='LC18'><span class="cm"> along with this program. If not, see <http://www.gnu.org/licenses/>.</span></div><div class='line' id='LC19'><span class="cm">*/</span></div><div class='line' id='LC20'><br/></div><div class='line' id='LC21'><span class="cm">/**</span></div><div class='line' id='LC22'><span class="cm"> * @file STM32/DACv1/dac_lld.c</span></div><div class='line' id='LC23'><span class="cm"> * @brief STM32 DAC subsystem low level driver source.</span></div><div class='line' id='LC24'><span class="cm"> *</span></div><div class='line' id='LC25'><span class="cm"> * @addtogroup DAC</span></div><div class='line' id='LC26'><span class="cm"> * @{</span></div><div class='line' id='LC27'><span class="cm"> */</span></div><div class='line' id='LC28'><br/></div><div class='line' id='LC29'><span class="cp">#include "hal.h"</span></div><div class='line' id='LC30'><br/></div><div class='line' id='LC31'><span class="cp">#if HAL_USE_DAC || defined(__DOXYGEN__)</span></div><div class='line' id='LC32'><br/></div><div class='line' id='LC33'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC34'><span class="cm">/* Driver local definitions. */</span></div><div class='line' id='LC35'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC36'><br/></div><div class='line' id='LC37'><span class="cp">#if !defined(DAC1)</span></div><div class='line' id='LC38'><span class="cp">#define DAC1 DAC</span></div><div class='line' id='LC39'><span class="cp">#define rccEnableDAC1 rccEnableDAC</span></div><div class='line' id='LC40'><span class="cp">#define rccDisableDAC1 rccDisableDAC</span></div><div class='line' id='LC41'><span class="cp">#endif</span></div><div class='line' id='LC42'><br/></div><div class='line' id='LC43'><span class="cp">#define DAC_CHN1_DMA_CHANNEL \</span></div><div class='line' id='LC44'><span class="cp"> STM32_DMA_GETCHANNEL(STM32_DAC_CHN1_DMA_STREAM, \</span></div><div class='line' id='LC45'><span class="cp"> STM32_DAC_CHN1_DMA_CHN)</span></div><div class='line' id='LC46'><br/></div><div class='line' id='LC47'><span class="cp">#define DAC_CHN2_DMA_CHANNEL \</span></div><div class='line' id='LC48'><span class="cp"> STM32_DMA_GETCHANNEL(STM32_DAC_CHN2_DMA_STREAM, \</span></div><div class='line' id='LC49'><span class="cp"> STM32_DAC_CHN2_DMA_CHN)</span></div><div class='line' id='LC50'><span class="cp"> </span></div><div class='line' id='LC51'><span class="cp">#define DAC_CHN3_DMA_CHANNEL \</span></div><div class='line' id='LC52'><span class="cp"> STM32_DMA_GETCHANNEL(STM32_DAC_CHN3_DMA_STREAM, \</span></div><div class='line' id='LC53'><span class="cp"> STM32_DAC_CHN3_DMA_CHN)</span></div><div class='line' id='LC54'><br/></div><div class='line' id='LC55'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC56'><span class="cm">/* Driver exported variables. */</span></div><div class='line' id='LC57'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC58'><br/></div><div class='line' id='LC59'><span class="cm">/** @brief CHN1 driver identifier.*/</span></div><div class='line' id='LC60'><span class="cp">#if STM32_DAC_USE_CHN1 || defined(__DOXYGEN__)</span></div><div class='line' id='LC61'><span class="n">DACDriver</span> <span class="n">DACD1</span><span class="p">;</span></div><div class='line' id='LC62'><span class="cp">#endif</span></div><div class='line' id='LC63'><br/></div><div class='line' id='LC64'><span class="cm">/** @brief CHN2 driver identifier.*/</span></div><div class='line' id='LC65'><span class="cp">#if STM32_DAC_USE_CHN2 || defined(__DOXYGEN__)</span></div><div class='line' id='LC66'><span class="n">DACDriver</span> <span class="n">DACD2</span><span class="p">;</span></div><div class='line' id='LC67'><span class="cp">#endif</span></div><div class='line' id='LC68'><br/></div><div class='line' id='LC69'><span class="cm">/** @brief CHN3 driver identifier.*/</span></div><div class='line' id='LC70'><span class="cp">#if STM32_DAC_USE_CHN3 || defined(__DOXYGEN__)</span></div><div class='line' id='LC71'><span class="n">DACDriver</span> <span class="n">DACD3</span><span class="p">;</span></div><div class='line' id='LC72'><span class="cp">#endif</span></div><div class='line' id='LC73'><br/></div><div class='line' id='LC74'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC75'><span class="cm">/* Driver local variables. */</span></div><div class='line' id='LC76'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC77'><br/></div><div class='line' id='LC78'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC79'><span class="cm">/* Driver local functions. */</span></div><div class='line' id='LC80'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC81'><br/></div><div class='line' id='LC82'><br/></div><div class='line' id='LC83'><span class="cm">/**</span></div><div class='line' id='LC84'><span class="cm"> * @brief Shared end/half-of-tx service routine.</span></div><div class='line' id='LC85'><span class="cm"> *</span></div><div class='line' id='LC86'><span class="cm"> * @param[in] dacp pointer to the @p DACDriver object</span></div><div class='line' id='LC87'><span class="cm"> * @param[in] flags pre-shifted content of the ISR register</span></div><div class='line' id='LC88'><span class="cm"> */</span></div><div class='line' id='LC89'><span class="k">static</span> <span class="kt">void</span> <span class="nf">dac_lld_serve_tx_interrupt</span><span class="p">(</span><span class="n">DACDriver</span> <span class="o">*</span><span class="n">dacp</span><span class="p">,</span> <span class="kt">uint32_t</span> <span class="n">flags</span><span class="p">)</span> <span class="p">{</span></div><div class='line' id='LC90'><span class="cp">#if defined(STM32_DAC_DMA_ERROR_HOOK)</span></div><div class='line' id='LC91'> <span class="p">(</span><span class="kt">void</span><span class="p">)</span><span class="n">dacp</span><span class="p">;</span></div><div class='line' id='LC92'> <span class="k">if</span> <span class="p">((</span><span class="n">flags</span> <span class="o">&</span> <span class="p">(</span><span class="n">STM32_DMA_ISR_TEIF</span> <span class="o">|</span> <span class="n">STM32_DMA_ISR_DMEIF</span><span class="p">))</span> <span class="o">!=</span> <span class="mi">0</span><span class="p">)</span> <span class="p">{</span></div><div class='line' id='LC93'> <span class="cm">/* DMA errors handling.*/</span></div><div class='line' id='LC94'> <span class="c1">//~ _dac_isr_error_code(dacp, flags);</span></div><div class='line' id='LC95'> <span class="p">}</span></div><div class='line' id='LC96'> <span class="k">else</span> <span class="p">{</span></div><div class='line' id='LC97'> <span class="k">if</span> <span class="p">((</span><span class="n">flags</span> <span class="o">&</span> <span class="n">STM32_DMA_ISR_HTIF</span><span class="p">)</span> <span class="o">!=</span> <span class="mi">0</span><span class="p">)</span> <span class="p">{</span></div><div class='line' id='LC98'> <span class="cm">/* Half transfer processing.*/</span></div><div class='line' id='LC99'> <span class="c1">//~ _dac_isr_half_code(dacp);</span></div><div class='line' id='LC100'> <span class="p">}</span></div><div class='line' id='LC101'> <span class="k">if</span> <span class="p">((</span><span class="n">flags</span> <span class="o">&</span> <span class="n">STM32_DMA_ISR_TCIF</span><span class="p">)</span> <span class="o">!=</span> <span class="mi">0</span><span class="p">)</span> <span class="p">{</span></div><div class='line' id='LC102'> <span class="cm">/* Transfer complete processing.*/</span></div><div class='line' id='LC103'> <span class="c1">//~ _dac_isr_full_code(dacp);</span></div><div class='line' id='LC104'> <span class="p">}</span></div><div class='line' id='LC105'> <span class="p">}</span></div><div class='line' id='LC106'><span class="cp">#else</span></div><div class='line' id='LC107'> <span class="p">(</span><span class="kt">void</span><span class="p">)</span><span class="n">dacp</span><span class="p">;</span></div><div class='line' id='LC108'> <span class="p">(</span><span class="kt">void</span><span class="p">)</span><span class="n">flags</span><span class="p">;</span></div><div class='line' id='LC109'><span class="cp">#endif</span></div><div class='line' id='LC110'><span class="p">}</span></div><div class='line' id='LC111'><br/></div><div class='line' id='LC112'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC113'><span class="cm">/* Driver interrupt handlers. */</span></div><div class='line' id='LC114'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC115'><br/></div><div class='line' id='LC116'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC117'><span class="cm">/* Driver exported functions. */</span></div><div class='line' id='LC118'><span class="cm">/*===========================================================================*/</span></div><div class='line' id='LC119'><br/></div><div class='line' id='LC120'><span class="cm">/**</span></div><div class='line' id='LC121'><span class="cm"> * @brief Low level DAC driver initialization.</span></div><div class='line' id='LC122'><span class="cm"> *</span></div><div class='line' id='LC123'><span class="cm"> * @notapi</span></div><div class='line' id='LC124'><span class="cm"> */</span></div><div class='line' id='LC125'><span class="kt">void</span> <span class="nf">dac_lld_init</span><span class="p">(</span><span class="kt">void</span><span class="p">)</span> <span class="p">{</span></div><div class='line' id='LC126'><br/></div><div class='line' id='LC127'><span class="cp">#if STM32_DAC_USE_CHN1</span></div><div class='line' id='LC128'> <span class="n">dacObjectInit</span><span class="p">(</span><span class="o">&</span><span class="n">DACD1</span><span class="p">);</span></div><div class='line' id='LC129'> <span class="n">DACD1</span><span class="p">.</span><span class="n">dac</span> <span class="o">=</span> <span class="n">DAC1</span><span class="p">;</span></div><div class='line' id='LC130'> <span class="n">DACD1</span><span class="p">.</span><span class="n">tim</span> <span class="o">=</span> <span class="n">STM32_TIM6</span><span class="p">;</span></div><div class='line' id='LC131'> <span class="n">DACD1</span><span class="p">.</span><span class="n">irqprio</span> <span class="o">=</span> <span class="n">STM32_DAC_CHN1_IRQ_PRIORITY</span><span class="p">;</span></div><div class='line' id='LC132'> <span class="n">DACD1</span><span class="p">.</span><span class="n">dma</span> <span class="o">=</span> <span class="n">STM32_DMA_STREAM</span><span class="p">(</span><span class="n">STM32_DAC_CHN1_DMA_STREAM</span><span class="p">);</span></div><div class='line' id='LC133'> <span class="n">DACD1</span><span class="p">.</span><span class="n">dmamode</span> <span class="o">=</span> <span class="n">STM32_DMA_CR_CHSEL</span><span class="p">(</span><span class="n">DAC_CHN1_DMA_CHANNEL</span><span class="p">)</span> <span class="o">|</span> \</div><div class='line' id='LC134'> <span class="n">STM32_DMA_CR_PL</span><span class="p">(</span><span class="n">STM32_DAC_CHN1_DMA_PRIORITY</span><span class="p">)</span> <span class="o">|</span> \</div><div class='line' id='LC135'> <span class="n">STM32_DMA_CR_DIR_M2P</span> <span class="o">|</span> \</div><div class='line' id='LC136'> <span class="n">STM32_DMA_CR_DMEIE</span> <span class="o">|</span> \</div><div class='line' id='LC137'> <span class="n">STM32_DMA_CR_TEIE</span> <span class="o">|</span> \</div><div class='line' id='LC138'> <span class="n">STM32_DMA_CR_MINC</span> <span class="o">|</span> <span class="n">STM32_DMA_CR_TCIE</span><span class="p">;</span></div><div class='line' id='LC139'><span class="cp">#endif</span></div><div class='line' id='LC140'><br/></div><div class='line' id='LC141'><span class="cp">#if STM32_DAC_USE_CHN2</span></div><div class='line' id='LC142'> <span class="n">dacObjectInit</span><span class="p">(</span><span class="o">&</span><span class="n">DACD2</span><span class="p">);</span></div><div class='line' id='LC143'> <span class="n">DACD2</span><span class="p">.</span><span class="n">dac</span> <span class="o">=</span> <span class="n">DAC1</span><span class="p">;</span></div><div class='line' id='LC144'> <span class="n">DACD2</span><span class="p">.</span><span class="n">tim</span> <span class="o">=</span> <span class="n">STM32_TIM7</span><span class="p">;</span></div><div class='line' id='LC145'> <span class="n">DACD2</span><span class="p">.</span><span class="n">irqprio</span> <span class="o">=</span> <span class="n">STM32_DAC_CHN2_IRQ_PRIORITY</span><span class="p">;</span></div><div class='line' id='LC146'> <span class="n">DACD2</span><span class="p">.</span><span class="n">dma</span> <span class="o">=</span> <span class="n">STM32_DMA_STREAM</span><span class="p">(</span><span class="n">STM32_DAC_CHN2_DMA_STREAM</span><span class="p">);</span></div><div class='line' id='LC147'> <span class="n">DACD2</span><span class="p">.</span><span class="n">dmamode</span> <span class="o">=</span> <span class="n">STM32_DMA_CR_CHSEL</span><span class="p">(</span><span class="n">DAC_CHN2_DMA_CHANNEL</span><span class="p">)</span> <span class="o">|</span> \</div><div class='line' id='LC148'> <span class="n">STM32_DMA_CR_PL</span><span class="p">(</span><span class="n">STM32_DAC_CHN2_DMA_PRIORITY</span><span class="p">)</span> <span class="o">|</span> \</div><div class='line' id='LC149'> <span class="n">STM32_DMA_CR_DIR_M2P</span> <span class="o">|</span> \</div><div class='line' id='LC150'> <span class="n">STM32_DMA_CR_DMEIE</span> <span class="o">|</span> \</div><div class='line' id='LC151'> <span class="n">STM32_DMA_CR_TEIE</span> <span class="o">|</span> \</div><div class='line' id='LC152'> <span class="n">STM32_DMA_CR_MINC</span> <span class="o">|</span> <span class="n">STM32_DMA_CR_TCIE</span><span class="p">;</span></div><div class='line' id='LC153'><span class="cp">#endif</span></div><div class='line' id='LC154'><br/></div><div class='line' id='LC155'><span class="cp">#if STM32_DAC_USE_CHN3</span></div><div class='line' id='LC156'> <span class="n">dacObjectInit</span><span class="p">(</span><span class="o">&</span><span class="n">DACD3</span><span class="p">);</span></div><div class='line' id='LC157'> <span class="n">DACD3</span><span class="p">.</span><span class="n">dac</span> <span class="o">=</span> <span class="n">DAC2</span><span class="p">;</span></div><div class='line' id='LC158'> <span class="n">DACD3</span><span class="p">.</span><span class="n">tim</span> <span class="o">=</span> <span class="n">STM32_TIM18</span><span class="p">;</span></div><div class='line' id='LC159'> <span class="n">DACD3</span><span class="p">.</span><span class="n">irqprio</span> <span class="o">=</span> <span class="n">STM32_DAC_CHN3_IRQ_PRIORITY</span><span class="p">;</span></div><div class='line' id='LC160'> <span class="n">DACD3</span><span class="p">.</span><span class="n">dma</span> <span class="o">=</span> <span class="n">STM32_DMA_STREAM</span><span class="p">(</span><span class="n">STM32_DAC_CHN3_DMA_STREAM</span><span class="p">);</span></div><div class='line' id='LC161'> <span class="n">DACD3</span><span class="p">.</span><span class="n">dmamode</span> <span class="o">=</span> <span class="n">STM32_DMA_CR_CHSEL</span><span class="p">(</span><span class="n">DAC_CHN3_DMA_CHANNEL</span><span class="p">)</span> <span class="o">|</span> \</div><div class='line' id='LC162'> <span class="n">STM32_DMA_CR_PL</span><span class="p">(</span><span class="n">STM32_DAC_CHN2_DMA_PRIORITY</span><span class="p">)</span> <span class="o">|</span> \</div><div class='line' id='LC163'> <span class="n">STM32_DMA_CR_DIR_M2P</span> <span class="o">|</span> \</div><div class='line' id='LC164'> <span class="n">STM32_DMA_CR_DMEIE</span> <span class="o">|</span> \</div><div class='line' id='LC165'> <span class="n">STM32_DMA_CR_TEIE</span> <span class="o">|</span> \</div><div class='line' id='LC166'> <span class="n">STM32_DMA_CR_MINC</span> <span class="o">|</span> <span class="n">STM32_DMA_CR_TCIE</span><span class="p">;</span></div><div class='line' id='LC167'><span class="cp">#endif</span></div><div class='line' id='LC168'><span class="p">}</span></div><div class='line' id='LC169'><br/></div><div class='line' id='LC170'><span class="cm">/**</span></div><div class='line' id='LC171'><span class="cm"> * @brief Configures and activates the DAC peripheral.</span></div><div class='line' id='LC172'><span class="cm"> *</span></div><div class='line' id='LC173'><span class="cm"> * @param[in] dacp pointer to the @p DACDriver object</span></div><div class='line' id='LC174'><span class="cm"> *</span></div><div class='line' id='LC175'><span class="cm"> * @notapi</span></div><div class='line' id='LC176'><span class="cm"> */</span></div><div class='line' id='LC177'><span class="kt">void</span> <span class="nf">dac_lld_start</span><span class="p">(</span><span class="n">DACDriver</span> <span class="o">*</span><span class="n">dacp</span><span class="p">)</span> <span class="p">{</span></div><div class='line' id='LC178'> <span class="kt">uint32_t</span> <span class="n">arr</span><span class="p">,</span> <span class="n">regshift</span><span class="p">,</span> <span class="n">trgo</span><span class="p">,</span> <span class="n">dataoffset</span><span class="p">;</span></div><div class='line' id='LC179'> <span class="kt">bool</span> <span class="n">b</span><span class="p">;</span></div><div class='line' id='LC180'> <span class="cm">/* If in stopped state then enables the DAC and DMA clocks.*/</span></div><div class='line' id='LC181'> <span class="k">if</span> <span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">state</span> <span class="o">==</span> <span class="n">DAC_STOP</span><span class="p">)</span> <span class="p">{</span></div><div class='line' id='LC182'><span class="cp">#if STM32_DAC_USE_CHN1</span></div><div class='line' id='LC183'> <span class="k">if</span> <span class="p">(</span><span class="o">&</span><span class="n">DACD1</span> <span class="o">==</span> <span class="n">dacp</span><span class="p">)</span> <span class="p">{</span></div><div class='line' id='LC184'> <span class="n">rccEnableDAC1</span><span class="p">(</span><span class="n">FALSE</span><span class="p">);</span></div><div class='line' id='LC185'> <span class="cm">/* DAC1 CR data is at bits 0:15 */</span></div><div class='line' id='LC186'> <span class="n">regshift</span> <span class="o">=</span> <span class="mi">0</span><span class="p">;</span></div><div class='line' id='LC187'> <span class="n">dataoffset</span> <span class="o">=</span> <span class="mi">0</span><span class="p">;</span></div><div class='line' id='LC188'> <span class="cm">/* Timer setup */</span></div><div class='line' id='LC189'> <span class="n">rccEnableTIM6</span><span class="p">(</span><span class="n">FALSE</span><span class="p">);</span></div><div class='line' id='LC190'> <span class="n">rccResetTIM6</span><span class="p">();</span></div><div class='line' id='LC191'> <span class="n">trgo</span> <span class="o">=</span> <span class="n">STM32_DAC_CR_TSEL_TIM6</span><span class="p">;</span></div><div class='line' id='LC192'> <span class="p">}</span></div><div class='line' id='LC193'><span class="cp">#endif</span></div><div class='line' id='LC194'><span class="cp">#if STM32_DAC_USE_CHN2</span></div><div class='line' id='LC195'> <span class="k">if</span> <span class="p">(</span><span class="o">&</span><span class="n">DACD2</span> <span class="o">==</span> <span class="n">dacp</span><span class="p">)</span> <span class="p">{</span></div><div class='line' id='LC196'> <span class="n">rccEnableDAC1</span><span class="p">(</span><span class="n">FALSE</span><span class="p">);</span></div><div class='line' id='LC197'> <span class="cm">/* DAC2 CR data is at bits 16:31 */</span></div><div class='line' id='LC198'> <span class="n">regshift</span> <span class="o">=</span> <span class="mi">16</span><span class="p">;</span></div><div class='line' id='LC199'> <span class="n">dataoffset</span> <span class="o">=</span> <span class="o">&</span><span class="n">dacp</span><span class="o">-></span><span class="n">dac</span><span class="o">-></span><span class="n">DHR12R2</span> <span class="o">-</span> <span class="o">&</span><span class="n">dacp</span><span class="o">-></span><span class="n">dac</span><span class="o">-></span><span class="n">DHR12R1</span><span class="p">;</span></div><div class='line' id='LC200'> <span class="cm">/* Timer setup */</span></div><div class='line' id='LC201'> <span class="n">rccEnableTIM7</span><span class="p">(</span><span class="n">FALSE</span><span class="p">);</span></div><div class='line' id='LC202'> <span class="n">rccResetTIM7</span><span class="p">();</span></div><div class='line' id='LC203'> <span class="n">trgo</span> <span class="o">=</span> <span class="n">STM32_DAC_CR_TSEL_TIM7</span><span class="p">;</span></div><div class='line' id='LC204'> <span class="p">}</span></div><div class='line' id='LC205'><span class="cp">#endif</span></div><div class='line' id='LC206'><span class="cp">#if STM32_DAC_USE_CHN3</span></div><div class='line' id='LC207'> <span class="k">if</span> <span class="p">(</span><span class="o">&</span><span class="n">DACD3</span> <span class="o">==</span> <span class="n">dacp</span><span class="p">)</span> <span class="p">{</span></div><div class='line' id='LC208'> <span class="n">rccEnableDAC2</span><span class="p">(</span><span class="n">FALSE</span><span class="p">);</span></div><div class='line' id='LC209'> <span class="cm">/* DAC3 CR data is at bits 0:15 */</span></div><div class='line' id='LC210'> <span class="n">regshift</span> <span class="o">=</span> <span class="mi">0</span><span class="p">;</span></div><div class='line' id='LC211'> <span class="n">dataoffset</span> <span class="o">=</span> <span class="mi">0</span><span class="p">;</span></div><div class='line' id='LC212'> <span class="cm">/* Timer setup */</span></div><div class='line' id='LC213'> <span class="n">rccEnableTIM18</span><span class="p">(</span><span class="n">FALSE</span><span class="p">);</span></div><div class='line' id='LC214'> <span class="n">rccResetTIM18</span><span class="p">();</span></div><div class='line' id='LC215'> <span class="n">trgo</span> <span class="o">=</span> <span class="n">STM32_DAC_CR_TSEL_TIM18</span><span class="p">;</span></div><div class='line' id='LC216'> <span class="p">}</span></div><div class='line' id='LC217'><span class="cp">#endif</span></div><div class='line' id='LC218'><span class="cp">#if STM32_DAC_USE_CHN1 || STM32_DAC_USE_CHN2 || STM32_DAC_USE_CHN3</span></div><div class='line' id='LC219'> <span class="n">dacp</span><span class="o">-></span><span class="n">clock</span> <span class="o">=</span> <span class="n">STM32_TIMCLK1</span><span class="p">;</span></div><div class='line' id='LC220'> <span class="n">arr</span> <span class="o">=</span> <span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">clock</span> <span class="o">/</span> <span class="n">dacp</span><span class="o">-></span><span class="n">config</span><span class="o">-></span><span class="n">frequency</span><span class="p">);</span></div><div class='line' id='LC221'> <span class="n">osalDbgAssert</span><span class="p">((</span><span class="n">arr</span> <span class="o"><=</span> <span class="mh">0xFFFF</span><span class="p">),</span></div><div class='line' id='LC222'> <span class="s">"invalid frequency"</span><span class="p">);</span></div><div class='line' id='LC223'><br/></div><div class='line' id='LC224'> <span class="cm">/* Timer configuration.*/</span></div><div class='line' id='LC225'> <span class="n">dacp</span><span class="o">-></span><span class="n">tim</span><span class="o">-></span><span class="n">CR1</span> <span class="o">=</span> <span class="mi">0</span><span class="p">;</span> <span class="cm">/* Initially stopped. */</span></div><div class='line' id='LC226'> <span class="n">dacp</span><span class="o">-></span><span class="n">tim</span><span class="o">-></span><span class="n">PSC</span> <span class="o">=</span> <span class="mi">0</span><span class="p">;</span> <span class="cm">/* Prescaler value. */</span></div><div class='line' id='LC227'> <span class="n">dacp</span><span class="o">-></span><span class="n">tim</span><span class="o">-></span><span class="n">DIER</span> <span class="o">=</span> <span class="mi">0</span><span class="p">;</span></div><div class='line' id='LC228'> <span class="n">dacp</span><span class="o">-></span><span class="n">tim</span><span class="o">-></span><span class="n">ARR</span> <span class="o">=</span> <span class="n">arr</span><span class="p">;</span></div><div class='line' id='LC229'> <span class="n">dacp</span><span class="o">-></span><span class="n">tim</span><span class="o">-></span><span class="n">EGR</span> <span class="o">=</span> <span class="n">TIM_EGR_UG</span><span class="p">;</span> <span class="cm">/* Update event. */</span></div><div class='line' id='LC230'> <span class="n">dacp</span><span class="o">-></span><span class="n">tim</span><span class="o">-></span><span class="n">CR2</span> <span class="o">&=</span> <span class="p">(</span><span class="kt">uint16_t</span><span class="p">)</span><span class="o">~</span><span class="n">TIM_CR2_MMS</span><span class="p">;</span></div><div class='line' id='LC231'> <span class="n">dacp</span><span class="o">-></span><span class="n">tim</span><span class="o">-></span><span class="n">CR2</span> <span class="o">|=</span> <span class="p">(</span><span class="kt">uint16_t</span><span class="p">)</span><span class="n">TIM_CR2_MMS_1</span><span class="p">;</span> <span class="cm">/* Enable TRGO updates. */</span></div><div class='line' id='LC232'> <span class="n">dacp</span><span class="o">-></span><span class="n">tim</span><span class="o">-></span><span class="n">CNT</span> <span class="o">=</span> <span class="mi">0</span><span class="p">;</span> <span class="cm">/* Reset counter. */</span></div><div class='line' id='LC233'> <span class="n">dacp</span><span class="o">-></span><span class="n">tim</span><span class="o">-></span><span class="n">SR</span> <span class="o">=</span> <span class="mi">0</span><span class="p">;</span> <span class="cm">/* Clear pending IRQs. */</span></div><div class='line' id='LC234'> <span class="cm">/* Update Event IRQ enabled. */</span></div><div class='line' id='LC235'> <span class="cm">/* Timer start.*/</span></div><div class='line' id='LC236'> <span class="n">dacp</span><span class="o">-></span><span class="n">tim</span><span class="o">-></span><span class="n">CR1</span> <span class="o">=</span> <span class="n">TIM_CR1_CEN</span><span class="p">;</span></div><div class='line' id='LC237'><br/></div><div class='line' id='LC238'> <span class="cm">/* DAC configuration */</span></div><div class='line' id='LC239'> <span class="n">dacp</span><span class="o">-></span><span class="n">dac</span><span class="o">-></span><span class="n">CR</span> <span class="o">|=</span> <span class="p">(</span> <span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">dac</span><span class="o">-></span><span class="n">CR</span> <span class="o">&</span> <span class="o">~</span><span class="n">STM32_DAC_CR_MASK</span><span class="p">)</span> <span class="o">|</span> \</div><div class='line' id='LC240'> <span class="p">(</span><span class="n">STM32_DAC_CR_EN</span> <span class="o">|</span> <span class="n">STM32_DAC_CR_DMAEN</span> <span class="o">|</span> <span class="n">dacp</span><span class="o">-></span><span class="n">config</span><span class="o">-></span><span class="n">cr_flags</span><span class="p">)</span> <span class="p">)</span> <span class="o"><<</span> <span class="n">regshift</span><span class="p">;</span></div><div class='line' id='LC241'> </div><div class='line' id='LC242'> <span class="cm">/* DMA setup. */</span></div><div class='line' id='LC243'> <span class="n">b</span> <span class="o">=</span> <span class="n">dmaStreamAllocate</span><span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">dma</span><span class="p">,</span></div><div class='line' id='LC244'> <span class="n">dacp</span><span class="o">-></span><span class="n">irqprio</span><span class="p">,</span></div><div class='line' id='LC245'> <span class="p">(</span><span class="kt">stm32_dmaisr_t</span><span class="p">)</span><span class="n">dac_lld_serve_tx_interrupt</span><span class="p">,</span></div><div class='line' id='LC246'> <span class="p">(</span><span class="kt">void</span> <span class="o">*</span><span class="p">)</span><span class="n">dacp</span><span class="p">);</span></div><div class='line' id='LC247'> <span class="n">osalDbgAssert</span><span class="p">(</span><span class="o">!</span><span class="n">b</span><span class="p">,</span> <span class="s">"stream already allocated"</span><span class="p">);</span></div><div class='line' id='LC248'> <span class="k">switch</span> <span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">config</span><span class="o">-></span><span class="n">dhrm</span><span class="p">)</span> <span class="p">{</span></div><div class='line' id='LC249'> <span class="cm">/* Sets the DAC data register */</span></div><div class='line' id='LC250'> <span class="k">case</span> <span class="n">DAC_DHRM_12BIT_RIGHT</span>:</div><div class='line' id='LC251'> <span class="n">dmaStreamSetPeripheral</span><span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">dma</span><span class="p">,</span> <span class="o">&</span><span class="n">dacp</span><span class="o">-></span><span class="n">dac</span><span class="o">-></span><span class="n">DHR12R1</span> <span class="o">+</span> <span class="n">dataoffset</span><span class="p">);</span></div><div class='line' id='LC252'> <span class="n">dacp</span><span class="o">-></span><span class="n">dmamode</span> <span class="o">=</span> <span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">dmamode</span> <span class="o">&</span> <span class="o">~</span><span class="n">STM32_DMA_CR_SIZE_MASK</span><span class="p">)</span> <span class="o">|</span></div><div class='line' id='LC253'> <span class="n">STM32_DMA_CR_PSIZE_HWORD</span> <span class="o">|</span> <span class="n">STM32_DMA_CR_MSIZE_HWORD</span><span class="p">;</span></div><div class='line' id='LC254'> <span class="k">break</span><span class="p">;</span></div><div class='line' id='LC255'> <span class="k">case</span> <span class="n">DAC_DHRM_12BIT_LEFT</span>:</div><div class='line' id='LC256'> <span class="n">dmaStreamSetPeripheral</span><span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">dma</span><span class="p">,</span> <span class="o">&</span><span class="n">dacp</span><span class="o">-></span><span class="n">dac</span><span class="o">-></span><span class="n">DHR12L1</span> <span class="o">+</span> <span class="n">dataoffset</span><span class="p">);</span></div><div class='line' id='LC257'> <span class="n">dacp</span><span class="o">-></span><span class="n">dmamode</span> <span class="o">=</span> <span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">dmamode</span> <span class="o">&</span> <span class="o">~</span><span class="n">STM32_DMA_CR_SIZE_MASK</span><span class="p">)</span> <span class="o">|</span></div><div class='line' id='LC258'> <span class="n">STM32_DMA_CR_PSIZE_HWORD</span> <span class="o">|</span> <span class="n">STM32_DMA_CR_MSIZE_HWORD</span><span class="p">;</span></div><div class='line' id='LC259'> <span class="k">break</span><span class="p">;</span></div><div class='line' id='LC260'> <span class="k">case</span> <span class="n">DAC_DHRM_8BIT_RIGHT</span>:</div><div class='line' id='LC261'> <span class="n">dmaStreamSetPeripheral</span><span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">dma</span><span class="p">,</span> <span class="o">&</span><span class="n">dacp</span><span class="o">-></span><span class="n">dac</span><span class="o">-></span><span class="n">DHR8R1</span> <span class="o">+</span> <span class="n">dataoffset</span><span class="p">);</span></div><div class='line' id='LC262'> <span class="n">dacp</span><span class="o">-></span><span class="n">dmamode</span> <span class="o">=</span> <span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">dmamode</span> <span class="o">&</span> <span class="o">~</span><span class="n">STM32_DMA_CR_SIZE_MASK</span><span class="p">)</span> <span class="o">|</span></div><div class='line' id='LC263'> <span class="n">STM32_DMA_CR_PSIZE_BYTE</span> <span class="o">|</span> <span class="n">STM32_DMA_CR_MSIZE_BYTE</span><span class="p">;</span></div><div class='line' id='LC264'> <span class="k">break</span><span class="p">;</span></div><div class='line' id='LC265'><span class="cp">#if defined(STM32_HAS_DAC_CHN2) && STM32_HAS_DAC_CHN2</span></div><div class='line' id='LC266'> <span class="k">case</span> <span class="n">DAC_DHRM_12BIT_RIGHT_DUAL</span>:</div><div class='line' id='LC267'> <span class="n">dmaStreamSetPeripheral</span><span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">dma</span><span class="p">,</span> <span class="o">&</span><span class="n">dacp</span><span class="o">-></span><span class="n">dac</span><span class="o">-></span><span class="n">DHR12RD</span><span class="p">);</span></div><div class='line' id='LC268'> <span class="n">dacp</span><span class="o">-></span><span class="n">dmamode</span> <span class="o">=</span> <span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">dmamode</span> <span class="o">&</span> <span class="o">~</span><span class="n">STM32_DMA_CR_SIZE_MASK</span><span class="p">)</span> <span class="o">|</span></div><div class='line' id='LC269'> <span class="n">STM32_DMA_CR_PSIZE_HWORD</span> <span class="o">|</span> <span class="n">STM32_DMA_CR_MSIZE_HWORD</span><span class="p">;</span></div><div class='line' id='LC270'> <span class="k">break</span><span class="p">;</span></div><div class='line' id='LC271'> <span class="k">case</span> <span class="n">DAC_DHRM_12BIT_LEFT_DUAL</span>:</div><div class='line' id='LC272'> <span class="n">dmaStreamSetPeripheral</span><span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">dma</span><span class="p">,</span> <span class="o">&</span><span class="n">dacp</span><span class="o">-></span><span class="n">dac</span><span class="o">-></span><span class="n">DHR12LD</span><span class="p">);</span></div><div class='line' id='LC273'> <span class="n">dacp</span><span class="o">-></span><span class="n">dmamode</span> <span class="o">=</span> <span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">dmamode</span> <span class="o">&</span> <span class="o">~</span><span class="n">STM32_DMA_CR_SIZE_MASK</span><span class="p">)</span> <span class="o">|</span></div><div class='line' id='LC274'> <span class="n">STM32_DMA_CR_PSIZE_HWORD</span> <span class="o">|</span> <span class="n">STM32_DMA_CR_MSIZE_HWORD</span><span class="p">;</span></div><div class='line' id='LC275'> <span class="k">break</span><span class="p">;</span></div><div class='line' id='LC276'> <span class="k">case</span> <span class="n">DAC_DHRM_8BIT_RIGHT_DUAL</span>:</div><div class='line' id='LC277'> <span class="n">dmaStreamSetPeripheral</span><span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">dma</span><span class="p">,</span> <span class="o">&</span><span class="n">dacp</span><span class="o">-></span><span class="n">dac</span><span class="o">-></span><span class="n">DHR8RD</span><span class="p">);</span></div><div class='line' id='LC278'> <span class="n">dacp</span><span class="o">-></span><span class="n">dmamode</span> <span class="o">=</span> <span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">dmamode</span> <span class="o">&</span> <span class="o">~</span><span class="n">STM32_DMA_CR_SIZE_MASK</span><span class="p">)</span> <span class="o">|</span></div><div class='line' id='LC279'> <span class="n">STM32_DMA_CR_PSIZE_BYTE</span> <span class="o">|</span> <span class="n">STM32_DMA_CR_MSIZE_BYTE</span><span class="p">;</span></div><div class='line' id='LC280'> <span class="k">break</span><span class="p">;</span></div><div class='line' id='LC281'><span class="cp">#endif</span></div><div class='line' id='LC282'> <span class="p">}</span></div><div class='line' id='LC283'> </div><div class='line' id='LC284'> <span class="n">dacp</span><span class="o">-></span><span class="n">dac</span><span class="o">-></span><span class="n">CR</span> <span class="o">|=</span> <span class="n">trgo</span> <span class="o"><<</span> <span class="n">regshift</span><span class="p">;</span> <span class="cm">/* Enable timer trigger */</span></div><div class='line' id='LC285'><span class="cp">#endif</span></div><div class='line' id='LC286'> <span class="p">}</span></div><div class='line' id='LC287'><span class="p">}</span></div><div class='line' id='LC288'><br/></div><div class='line' id='LC289'><span class="cm">/**</span></div><div class='line' id='LC290'><span class="cm"> * @brief Deactivates the DAC peripheral.</span></div><div class='line' id='LC291'><span class="cm"> *</span></div><div class='line' id='LC292'><span class="cm"> * @param[in] dacp pointer to the @p DACDriver object</span></div><div class='line' id='LC293'><span class="cm"> *</span></div><div class='line' id='LC294'><span class="cm"> * @notapi</span></div><div class='line' id='LC295'><span class="cm"> */</span></div><div class='line' id='LC296'><span class="kt">void</span> <span class="nf">dac_lld_stop</span><span class="p">(</span><span class="n">DACDriver</span> <span class="o">*</span><span class="n">dacp</span><span class="p">)</span> <span class="p">{</span></div><div class='line' id='LC297'><br/></div><div class='line' id='LC298'> <span class="cm">/* If in ready state then disables the DAC clock.*/</span></div><div class='line' id='LC299'> <span class="k">if</span> <span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">state</span> <span class="o">==</span> <span class="n">DAC_READY</span><span class="p">)</span> <span class="p">{</span></div><div class='line' id='LC300'><br/></div><div class='line' id='LC301'> <span class="cm">/* DMA disable.*/</span></div><div class='line' id='LC302'> <span class="n">dmaStreamRelease</span><span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">dma</span><span class="p">);</span></div><div class='line' id='LC303'><br/></div><div class='line' id='LC304'><span class="cp">#if STM32_DAC_USE_CHN1</span></div><div class='line' id='LC305'> <span class="k">if</span> <span class="p">(</span><span class="o">&</span><span class="n">DACD1</span> <span class="o">==</span> <span class="n">dacp</span><span class="p">)</span> <span class="p">{</span></div><div class='line' id='LC306'> <span class="n">dacp</span><span class="o">-></span><span class="n">dac</span><span class="o">-></span><span class="n">CR</span> <span class="o">&=</span> <span class="o">~</span><span class="n">STM32_DAC_CR_EN</span><span class="p">;</span> <span class="cm">/* DAC1 disable.*/</span></div><div class='line' id='LC307'> <span class="p">}</span></div><div class='line' id='LC308'><span class="cp">#endif</span></div><div class='line' id='LC309'><span class="cp">#if STM32_DAC_USE_CHN2</span></div><div class='line' id='LC310'> <span class="k">if</span> <span class="p">(</span><span class="o">&</span><span class="n">DACD2</span> <span class="o">==</span> <span class="n">dacp</span><span class="p">)</span> <span class="p">{</span></div><div class='line' id='LC311'> <span class="n">dacp</span><span class="o">-></span><span class="n">dac</span><span class="o">-></span><span class="n">CR</span> <span class="o">&=</span> <span class="o">~</span><span class="n">STM32_DAC_CR_EN</span> <span class="o"><<</span> <span class="mi">16</span><span class="p">;</span> <span class="cm">/* DAC1 disable.*/</span></div><div class='line' id='LC312'> <span class="p">}</span></div><div class='line' id='LC313'><span class="cp">#endif</span></div><div class='line' id='LC314'><span class="cp">#if STM32_DAC_USE_CHN3</span></div><div class='line' id='LC315'> <span class="k">if</span> <span class="p">(</span><span class="o">&</span><span class="n">DACD3</span> <span class="o">==</span> <span class="n">dacp</span><span class="p">)</span> <span class="p">{</span></div><div class='line' id='LC316'> <span class="n">dacp</span><span class="o">-></span><span class="n">dac</span><span class="o">-></span><span class="n">CR</span> <span class="o">&=</span> <span class="o">~</span><span class="n">STM32_DAC_CR_EN</span><span class="p">;</span> <span class="cm">/* DAC2 disable.*/</span></div><div class='line' id='LC317'> <span class="n">rccDisableDAC2</span><span class="p">(</span><span class="n">FALSE</span><span class="p">);</span> <span class="cm">/* DAC Clock disable.*/</span></div><div class='line' id='LC318'> <span class="p">}</span></div><div class='line' id='LC319'><span class="cp">#endif</span></div><div class='line' id='LC320'> <span class="n">dacp</span><span class="o">-></span><span class="n">tim</span><span class="o">-></span><span class="n">CR1</span> <span class="o">&=</span> <span class="o">~</span><span class="n">TIM_CR1_CEN</span><span class="p">;</span> <span class="cm">/* Disable associated timer */</span></div><div class='line' id='LC321'> <span class="n">dacp</span><span class="o">-></span><span class="n">state</span> <span class="o">=</span> <span class="n">DAC_STOP</span><span class="p">;</span></div><div class='line' id='LC322'><br/></div><div class='line' id='LC323'> <span class="k">if</span> <span class="p">(</span><span class="o">!</span><span class="p">(</span><span class="n">DAC1</span><span class="o">-></span><span class="n">CR</span> <span class="o">&</span> <span class="p">(</span><span class="n">STM32_DAC_CR_EN</span> <span class="o">|</span> <span class="n">STM32_DAC_CR_EN</span> <span class="o"><<</span> <span class="mi">16</span><span class="p">)))</span> <span class="p">{</span></div><div class='line' id='LC324'> <span class="cm">/* DAC Clock disable only if all channels are off.*/</span></div><div class='line' id='LC325'> <span class="n">rccDisableDAC1</span><span class="p">(</span><span class="n">FALSE</span><span class="p">);</span></div><div class='line' id='LC326'> <span class="p">}</span></div><div class='line' id='LC327'> <span class="p">}</span></div><div class='line' id='LC328'><span class="p">}</span></div><div class='line' id='LC329'><br/></div><div class='line' id='LC330'><span class="cm">/**</span></div><div class='line' id='LC331'><span class="cm"> * @brief Sends data over the DAC bus.</span></div><div class='line' id='LC332'><span class="cm"> * @details This asynchronous function starts a transmit operation.</span></div><div class='line' id='LC333'><span class="cm"> * @post At the end of the operation the configured callback is invoked.</span></div><div class='line' id='LC334'><span class="cm"> *</span></div><div class='line' id='LC335'><span class="cm"> * @param[in] dacp pointer to the @p DACDriver object</span></div><div class='line' id='LC336'><span class="cm"> * @param[in] n number of words to send</span></div><div class='line' id='LC337'><span class="cm"> * @param[in] txbuf the pointer to the transmit buffer</span></div><div class='line' id='LC338'><span class="cm"> *</span></div><div class='line' id='LC339'><span class="cm"> * @notapi</span></div><div class='line' id='LC340'><span class="cm"> */</span></div><div class='line' id='LC341'><span class="kt">void</span> <span class="nf">dac_lld_start_conversion</span><span class="p">(</span><span class="n">DACDriver</span> <span class="o">*</span><span class="n">dacp</span><span class="p">)</span> <span class="p">{</span></div><div class='line' id='LC342'> <span class="n">osalDbgAssert</span><span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">samples</span><span class="p">,</span> </div><div class='line' id='LC343'> <span class="s">"dacp->samples is NULL pointer"</span><span class="p">);</span></div><div class='line' id='LC344'> <span class="n">dmaStreamSetMemory0</span><span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">dma</span><span class="p">,</span> <span class="n">dacp</span><span class="o">-></span><span class="n">samples</span><span class="p">);</span></div><div class='line' id='LC345'> <span class="n">dmaStreamSetTransactionSize</span><span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">dma</span><span class="p">,</span> <span class="n">dacp</span><span class="o">-></span><span class="n">depth</span><span class="p">);</span></div><div class='line' id='LC346'> <span class="n">dmaStreamSetMode</span><span class="p">(</span><span class="n">dacp</span><span class="o">-></span><span class="n">dma</span><span class="p">,</span> <span class="n">dacp</span><span class="o">-></span><span class="n">dmamode</span> <span class="o">|</span> <span class="n">STM32_DMA_CR_EN</span> <span class="o">|</span></div><div class='line' id='LC347'> <span class="n">STM32_DMA_CR_CIRC</span><span class="p">);</span></div><div class='line' id='LC348'><span class="p">}</span></div><div class='line' id='LC349'><span class="cp">#endif </span><span class="cm">/* HAL_USE_DAC */</span><span class="cp"></span></div><div class='line' id='LC350'><br/></div><div class='line' id='LC351'><span class="cm">/** @} */</span></div></pre></div></td>
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