370 lines
12 KiB
C
370 lines
12 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file STM32/SPIv2/spi_lld.h
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* @brief STM32 SPI subsystem low level driver header.
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*
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* @addtogroup SPI
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* @{
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*/
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#ifndef _SPI_LLD_H_
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#define _SPI_LLD_H_
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#if HAL_USE_SPI || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @name Configuration options
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* @{
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*/
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/**
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* @brief SPI1 driver enable switch.
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* @details If set to @p TRUE the support for SPI1 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(STM32_SPI_USE_SPI1) || defined(__DOXYGEN__)
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#define STM32_SPI_USE_SPI1 FALSE
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#endif
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/**
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* @brief SPI2 driver enable switch.
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* @details If set to @p TRUE the support for SPI2 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(STM32_SPI_USE_SPI2) || defined(__DOXYGEN__)
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#define STM32_SPI_USE_SPI2 FALSE
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#endif
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/**
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* @brief SPI3 driver enable switch.
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* @details If set to @p TRUE the support for SPI3 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(STM32_SPI_USE_SPI3) || defined(__DOXYGEN__)
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#define STM32_SPI_USE_SPI3 FALSE
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#endif
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/**
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* @brief SPI1 interrupt priority level setting.
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*/
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#if !defined(STM32_SPI_SPI1_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_SPI_SPI1_IRQ_PRIORITY 10
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#endif
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/**
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* @brief SPI2 interrupt priority level setting.
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*/
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#if !defined(STM32_SPI_SPI2_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_SPI_SPI2_IRQ_PRIORITY 10
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#endif
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/**
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* @brief SPI3 interrupt priority level setting.
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*/
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#if !defined(STM32_SPI_SPI3_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_SPI_SPI3_IRQ_PRIORITY 10
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#endif
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/**
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* @brief SPI1 DMA priority (0..3|lowest..highest).
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* @note The priority level is used for both the TX and RX DMA streams but
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* because of the streams ordering the RX stream has always priority
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* over the TX stream.
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*/
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#if !defined(STM32_SPI_SPI1_DMA_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_SPI_SPI1_DMA_PRIORITY 1
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#endif
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/**
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* @brief SPI2 DMA priority (0..3|lowest..highest).
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* @note The priority level is used for both the TX and RX DMA streams but
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* because of the streams ordering the RX stream has always priority
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* over the TX stream.
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*/
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#if !defined(STM32_SPI_SPI2_DMA_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_SPI_SPI2_DMA_PRIORITY 1
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#endif
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/**
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* @brief SPI3 DMA priority (0..3|lowest..highest).
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* @note The priority level is used for both the TX and RX DMA streams but
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* because of the streams ordering the RX stream has always priority
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* over the TX stream.
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*/
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#if !defined(STM32_SPI_SPI3_DMA_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_SPI_SPI3_DMA_PRIORITY 1
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#endif
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/**
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* @brief SPI DMA error hook.
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*/
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#if !defined(STM32_SPI_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
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#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
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#endif
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/** @} */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#if STM32_SPI_USE_SPI1 && !STM32_HAS_SPI1
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#error "SPI1 not present in the selected device"
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#endif
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#if STM32_SPI_USE_SPI2 && !STM32_HAS_SPI2
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#error "SPI2 not present in the selected device"
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#endif
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#if STM32_SPI_USE_SPI3 && !STM32_HAS_SPI3
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#error "SPI3 not present in the selected device"
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#endif
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#if !STM32_SPI_USE_SPI1 && !STM32_SPI_USE_SPI2 && !STM32_SPI_USE_SPI3
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#error "SPI driver activated but no SPI peripheral assigned"
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#endif
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#if STM32_SPI_USE_SPI1 && \
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!CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SPI_SPI1_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to SPI1"
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#endif
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#if STM32_SPI_USE_SPI2 && \
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!CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SPI_SPI2_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to SPI2"
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#endif
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#if STM32_SPI_USE_SPI3 && \
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!CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SPI_SPI3_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to SPI3"
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#endif
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#if STM32_SPI_USE_SPI1 && \
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!STM32_DMA_IS_VALID_PRIORITY(STM32_SPI_SPI1_DMA_PRIORITY)
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#error "Invalid DMA priority assigned to SPI1"
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#endif
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#if STM32_SPI_USE_SPI2 && \
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!STM32_DMA_IS_VALID_PRIORITY(STM32_SPI_SPI2_DMA_PRIORITY)
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#error "Invalid DMA priority assigned to SPI2"
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#endif
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#if STM32_SPI_USE_SPI3 && \
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!STM32_DMA_IS_VALID_PRIORITY(STM32_SPI_SPI3_DMA_PRIORITY)
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#error "Invalid DMA priority assigned to SPI3"
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#endif
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/* The following checks are only required when there is a DMA able to
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reassign streams to different channels.*/
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#if STM32_ADVANCED_DMA
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/* Check on the presence of the DMA streams settings in mcuconf.h.*/
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#if STM32_SPI_USE_SPI1 && (!defined(STM32_SPI_SPI1_RX_DMA_STREAM) || \
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!defined(STM32_SPI_SPI1_TX_DMA_STREAM))
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#error "SPI1 DMA streams not defined"
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#endif
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#if STM32_SPI_USE_SPI2 && (!defined(STM32_SPI_SPI2_RX_DMA_STREAM) || \
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!defined(STM32_SPI_SPI2_TX_DMA_STREAM))
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#error "SPI2 DMA streams not defined"
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#endif
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#if STM32_SPI_USE_SPI3 && (!defined(STM32_SPI_SPI3_RX_DMA_STREAM) || \
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!defined(STM32_SPI_SPI3_TX_DMA_STREAM))
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#error "SPI3 DMA streams not defined"
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#endif
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/* Check on the validity of the assigned DMA channels.*/
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#if STM32_SPI_USE_SPI1 && \
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!STM32_DMA_IS_VALID_ID(STM32_SPI_SPI1_RX_DMA_STREAM, STM32_SPI1_RX_DMA_MSK)
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#error "invalid DMA stream associated to SPI1 RX"
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#endif
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#if STM32_SPI_USE_SPI1 && \
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!STM32_DMA_IS_VALID_ID(STM32_SPI_SPI1_TX_DMA_STREAM, STM32_SPI1_TX_DMA_MSK)
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#error "invalid DMA stream associated to SPI1 TX"
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#endif
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#if STM32_SPI_USE_SPI2 && \
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!STM32_DMA_IS_VALID_ID(STM32_SPI_SPI2_RX_DMA_STREAM, STM32_SPI2_RX_DMA_MSK)
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#error "invalid DMA stream associated to SPI2 RX"
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#endif
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#if STM32_SPI_USE_SPI2 && \
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!STM32_DMA_IS_VALID_ID(STM32_SPI_SPI2_TX_DMA_STREAM, STM32_SPI2_TX_DMA_MSK)
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#error "invalid DMA stream associated to SPI2 TX"
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#endif
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#if STM32_SPI_USE_SPI3 && \
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!STM32_DMA_IS_VALID_ID(STM32_SPI_SPI3_RX_DMA_STREAM, STM32_SPI3_RX_DMA_MSK)
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#error "invalid DMA stream associated to SPI3 RX"
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#endif
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#if STM32_SPI_USE_SPI3 && \
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!STM32_DMA_IS_VALID_ID(STM32_SPI_SPI3_TX_DMA_STREAM, STM32_SPI3_TX_DMA_MSK)
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#error "invalid DMA stream associated to SPI3 TX"
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#endif
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#endif /* STM32_ADVANCED_DMA */
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#if !defined(STM32_DMA_REQUIRED)
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#define STM32_DMA_REQUIRED
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief Type of a structure representing an SPI driver.
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*/
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typedef struct SPIDriver SPIDriver;
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/**
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* @brief SPI notification callback type.
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*
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* @param[in] spip pointer to the @p SPIDriver object triggering the
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* callback
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*/
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typedef void (*spicallback_t)(SPIDriver *spip);
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/**
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* @brief Driver configuration structure.
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*/
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typedef struct {
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/**
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* @brief Operation complete callback or @p NULL.
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*/
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spicallback_t end_cb;
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/* End of the mandatory fields.*/
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/**
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* @brief The chip select line port.
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*/
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ioportid_t ssport;
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/**
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* @brief The chip select line pad number.
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*/
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uint16_t sspad;
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/**
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* @brief SPI CR1 register initialization data.
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*/
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uint16_t cr1;
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/**
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* @brief SPI CR2 register initialization data.
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*/
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uint16_t cr2;
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} SPIConfig;
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/**
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* @brief Structure representing a SPI driver.
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*/
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struct SPIDriver{
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/**
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* @brief Driver state.
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*/
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spistate_t state;
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/**
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* @brief Current configuration data.
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*/
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const SPIConfig *config;
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#if SPI_USE_WAIT || defined(__DOXYGEN__)
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/**
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* @brief Waiting thread.
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*/
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thread_reference_t thread;
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#endif /* SPI_USE_WAIT */
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#if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
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/**
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* @brief Mutex protecting the peripheral.
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*/
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mutex_t mutex;
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#endif /* SPI_USE_MUTUAL_EXCLUSION */
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#if defined(SPI_DRIVER_EXT_FIELDS)
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SPI_DRIVER_EXT_FIELDS
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#endif
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/* End of the mandatory fields.*/
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/**
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* @brief Pointer to the SPIx registers block.
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*/
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SPI_TypeDef *spi;
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/**
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* @brief Receive DMA stream.
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*/
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const stm32_dma_stream_t *dmarx;
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/**
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* @brief Transmit DMA stream.
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*/
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const stm32_dma_stream_t *dmatx;
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/**
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* @brief RX DMA mode bit mask.
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*/
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uint32_t rxdmamode;
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/**
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* @brief TX DMA mode bit mask.
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*/
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uint32_t txdmamode;
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};
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#if STM32_SPI_USE_SPI1 && !defined(__DOXYGEN__)
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extern SPIDriver SPID1;
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#endif
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#if STM32_SPI_USE_SPI2 && !defined(__DOXYGEN__)
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extern SPIDriver SPID2;
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#endif
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#if STM32_SPI_USE_SPI3 && !defined(__DOXYGEN__)
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extern SPIDriver SPID3;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void spi_lld_init(void);
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void spi_lld_start(SPIDriver *spip);
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void spi_lld_stop(SPIDriver *spip);
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void spi_lld_select(SPIDriver *spip);
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void spi_lld_unselect(SPIDriver *spip);
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void spi_lld_ignore(SPIDriver *spip, size_t n);
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void spi_lld_exchange(SPIDriver *spip, size_t n,
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const void *txbuf, void *rxbuf);
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void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf);
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void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf);
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uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_SPI */
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#endif /* _SPI_LLD_H_ */
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/** @} */
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