78 lines
3.6 KiB
Plaintext
78 lines
3.6 KiB
Plaintext
Status:
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- = Planned.
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X = In progress, some work done.
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* = Done.
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? = Not sure if worth the effort or useful at all.
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N = Decided against.
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Within 2.3.x (hopefully)
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* Add an USB abstract device driver class.
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* USB driver implementation for STM32F102/STM32F103.
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* Add a Serial over USB generic device driver implementing a USB Communication
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Device Class and offering a Serial-like interface to the applications.
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* Add I-class APIs for mailboxes.
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* Modify chEvtBroadcast() to accept a flags mask as parameter.
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* Add a "transmission end" event to the serial device driver model.
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X Implement the "transmission end" serial driver event on those platforms
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supporting the feature.
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* Swap TIME_IMMEDIATE and TIME_INFINITE values.
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* Improvements to the message passing mechanism in order to allow "delayed,
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out of order, responses".
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* New device driver models: GPT.
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X GPT implementation and long duration "IRQ storm" stress test applications
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for all the supported critical platforms.
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- Add UART4 support to the STM32 UART driver (CL line only, HD has a nasty
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shared interrupt).
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- Add ADC3 support to the STM32 ADC driver.
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? Make thread functions return void and add a CH_THREAD macro for threads
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declaration in order to hide compiler-specific optimizations for thread
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functions.
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- Introduce compiler-info macros to the port layer, improve the test reports
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with the compiler info.
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- Test suite overhaul, the API should be more generic in order to be used
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with different subsystems and not just the kernel.
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- Device drivers for STM8/STM8L (ADC, PWM, bring them on par with STM32).
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- Device drivers for LPC1xxx (ADC, PWM, bring them on par with STM32).
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- Implement USB Mass Storage Class support and demo using the MMC_SPI driver
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as back-end.
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X File System infrastructure.
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- Official FatFs wrapper using the new infrastructure, dedicated test suite.
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X Transactional flash file system implementation.
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X I2C device driver class support and at least one implementation.
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X Shared DMA channels support in the STM32/STM8L HALs.
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X RAM ISR vectors support in the STM32 HAL.
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- New device driver models: Clock, Systick, RTC, WDG, DAC, Power Monitor.
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Later but within 2.x.x
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- Batch testing of the ARM7/ARMCMx port using OpenOCD, with reports.
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- Debug-related features and tools.
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? Add a *very simple* ADC API for single one shot sampling (implement it as
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an injected conversion on the STM32).
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- Improved Makefile system.
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- Serial over UART complex driver driver, evaluate from the performance
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results if to make obsolete the current dedicated Serial driver.
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- LPC17xx family support.
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- Official segmented interrupts support and abstraction in CMx port.
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- USB driver implementation for STM32F105/STM32F107.
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- MAC driver revision in order to support copy-less operations, this will
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require changes to lwIP or a new TCP/IP stack however.
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- MAC driver for STM32F107 (hardware missing).
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- Update C++ wrapper (Heap, Pools, Mailboxes and any new feature).
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- Threads Pools manager in the library.
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- Add a switch to enable/disable the priority inheritance algorithm in mutexes.
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- Dedicated TCP/IP stack.
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? ISO7816 driver over UART driver, both reader and card side (hardware
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missing).
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- Merge the Coldfire branch in mainline (hardware missing).
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- Merge the H8S branch in mainline (hardware missing).
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Ideas for 3.x.x:
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- MMU/MPU support.
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- High resolution timers and tickless kernel.
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- Multicore support.
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Side projects:
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X ChibiOS Wizard, UML modeling and ChibiOS applications code and
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documentation generator.
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- Visual debugger/monitor interfaced through OpenOCD.
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