254 lines
6.9 KiB
C
254 lines
6.9 KiB
C
/*
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ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file STM32F0xx/ext_lld_isr.c
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* @brief STM32F0xx EXT subsystem low level driver ISR code.
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*
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* @addtogroup EXT
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* @{
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*/
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#include "hal.h"
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#if HAL_USE_EXT || defined(__DOXYGEN__)
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#include "ext_lld_isr.h"
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/**
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* @brief EXTI[0]...EXTI[1] interrupt handler.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(Vector54) {
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uint32_t pr;
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OSAL_IRQ_PROLOGUE();
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pr = EXTI->PR & ((1 << 0) | (1 << 1));
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EXTI->PR = pr;
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if (pr & (1 << 0))
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EXTD1.config->channels[0].cb(&EXTD1, 0);
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if (pr & (1 << 1))
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EXTD1.config->channels[1].cb(&EXTD1, 1);
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OSAL_IRQ_EPILOGUE();
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}
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/**
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* @brief EXTI[2]...EXTI[3] interrupt handler.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(Vector58) {
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uint32_t pr;
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OSAL_IRQ_PROLOGUE();
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pr = EXTI->PR & ((1 << 2) | (1 << 3));
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EXTI->PR = pr;
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if (pr & (1 << 2))
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EXTD1.config->channels[2].cb(&EXTD1, 2);
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if (pr & (1 << 3))
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EXTD1.config->channels[3].cb(&EXTD1, 3);
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OSAL_IRQ_EPILOGUE();
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}
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/**
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* @brief EXTI[4]...EXTI[15] interrupt handler.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(Vector5C) {
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uint32_t pr;
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OSAL_IRQ_PROLOGUE();
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pr = EXTI->PR & ((1 << 4) | (1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) |
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(1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) | (1 << 13) |
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(1 << 14) | (1 << 15));
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EXTI->PR = pr;
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if (pr & (1 << 4))
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EXTD1.config->channels[4].cb(&EXTD1, 4);
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if (pr & (1 << 5))
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EXTD1.config->channels[5].cb(&EXTD1, 5);
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if (pr & (1 << 6))
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EXTD1.config->channels[6].cb(&EXTD1, 6);
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if (pr & (1 << 7))
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EXTD1.config->channels[7].cb(&EXTD1, 7);
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if (pr & (1 << 8))
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EXTD1.config->channels[8].cb(&EXTD1, 8);
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if (pr & (1 << 9))
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EXTD1.config->channels[9].cb(&EXTD1, 9);
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if (pr & (1 << 10))
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EXTD1.config->channels[10].cb(&EXTD1, 10);
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if (pr & (1 << 11))
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EXTD1.config->channels[11].cb(&EXTD1, 11);
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if (pr & (1 << 12))
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EXTD1.config->channels[12].cb(&EXTD1, 12);
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if (pr & (1 << 13))
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EXTD1.config->channels[13].cb(&EXTD1, 13);
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if (pr & (1 << 14))
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EXTD1.config->channels[14].cb(&EXTD1, 14);
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if (pr & (1 << 15))
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EXTD1.config->channels[15].cb(&EXTD1, 15);
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OSAL_IRQ_EPILOGUE();
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}
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#if !defined(STM32F030) || defined(__DOXYGEN__)
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/**
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* @brief EXTI[16] interrupt handler (PVD).
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(Vector44) {
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OSAL_IRQ_PROLOGUE();
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EXTI->PR = (1 << 16);
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EXTD1.config->channels[16].cb(&EXTD1, 16);
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OSAL_IRQ_EPILOGUE();
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}
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#endif
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#if !defined(STM32_DISABLE_EXTI171920_HANDLER)
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/**
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* @brief EXTI[17],EXTI[19],EXTI[20] interrupt handler (RTC).
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(Vector48) {
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uint32_t pr;
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OSAL_IRQ_PROLOGUE();
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pr = EXTI->PR & EXTI->IMR & ((1 << 17) | (1 << 19) | (1 << 20));
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EXTI->PR = pr;
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if (pr & (1 << 17))
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EXTD1.config->channels[17].cb(&EXTD1, 17);
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if (pr & (1 << 19))
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EXTD1.config->channels[19].cb(&EXTD1, 19);
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if (pr & (1 << 20))
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EXTD1.config->channels[20].cb(&EXTD1, 20);
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OSAL_IRQ_EPILOGUE();
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}
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#endif
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#endif /* HAL_USE_EXT */
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#if (HAL_USE_EXT || HAL_USE_ADC) || defined(__DOXYGEN__)
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#if !defined(STM32F030) || defined(__DOXYGEN__)
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#if !defined(STM32_DISABLE_EXTI2122_HANDLER)
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/**
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* @brief EXTI[21],EXTI[22] interrupt handler (ADC, COMP).
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* @note This handler is shared with the ADC so it is handled
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* a bit differently.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(Vector70) {
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OSAL_IRQ_PROLOGUE();
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#if HAL_USE_EXT
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{
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uint32_t pr;
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pr = EXTI->PR & EXTI->IMR & ((1 << 21) | (1 << 22));
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EXTI->PR = pr;
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if (pr & (1 << 21))
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EXTD1.config->channels[21].cb(&EXTD1, 21);
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if (pr & (1 << 22))
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EXTD1.config->channels[21].cb(&EXTD1, 22);
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}
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#endif
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#if HAL_USE_ADC
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adc_lld_serve_interrupt(&ADCD1);
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#endif
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OSAL_IRQ_EPILOGUE();
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}
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#endif
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#endif /* !defined(STM32F030) */
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#endif /* HAL_USE_EXT || HAL_USE_ADC */
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#if HAL_USE_EXT || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Enables EXTI IRQ sources.
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*
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* @notapi
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*/
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void ext_lld_exti_irq_enable(void) {
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nvicEnableVector(EXTI0_1_IRQn, STM32_EXT_EXTI0_1_IRQ_PRIORITY);
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nvicEnableVector(EXTI2_3_IRQn, STM32_EXT_EXTI2_3_IRQ_PRIORITY);
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nvicEnableVector(EXTI4_15_IRQn, STM32_EXT_EXTI4_15_IRQ_PRIORITY);
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#if !defined(STM32F030)
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nvicEnableVector(PVD_IRQn, STM32_EXT_EXTI16_IRQ_PRIORITY);
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nvicEnableVector(ADC1_COMP_IRQn, STM32_EXT_EXTI21_22_IRQ_PRIORITY);
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#endif
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nvicEnableVector(RTC_IRQn, STM32_EXT_EXTI17_20_IRQ_PRIORITY);
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}
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/**
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* @brief Disables EXTI IRQ sources.
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*
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* @notapi
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*/
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void ext_lld_exti_irq_disable(void) {
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nvicDisableVector(EXTI0_1_IRQn);
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nvicDisableVector(EXTI2_3_IRQn);
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nvicDisableVector(EXTI4_15_IRQn);
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#if !defined(STM32F030)
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nvicDisableVector(PVD_IRQn);
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nvicDisableVector(ADC1_COMP_IRQn);
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#endif
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nvicDisableVector(RTC_IRQn);
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}
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#endif /* HAL_USE_EXT */
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/** @} */
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