652 lines
24 KiB
XML
652 lines
24 KiB
XML
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
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<SchemaVersion>1.1</SchemaVersion>
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<Header>### uVision Project, (C) Keil Software</Header>
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<Targets>
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<Target>
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<TargetName>Demo</TargetName>
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<ToolsetNumber>0x4</ToolsetNumber>
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<ToolsetName>ARM-ADS</ToolsetName>
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<TargetOption>
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<TargetCommonOption>
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<Device>STM32F407VG</Device>
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<Vendor>STMicroelectronics</Vendor>
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<Cpu>IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) CPUTYPE("Cortex-M4") FPU2</Cpu>
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<FlashUtilSpec></FlashUtilSpec>
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<StartupFile>"Startup\ST\STM32F4xx\startup_stm32f4xx.s" ("STM32F4xx Startup Code")</StartupFile>
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<FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000)</FlashDriverDll>
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<DeviceId>6103</DeviceId>
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<RegisterFile>stm32f4xx.h</RegisterFile>
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<MemoryEnv></MemoryEnv>
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<Cmp></Cmp>
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<Asm></Asm>
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<Linker></Linker>
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<OHString></OHString>
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<InfinionOptionDll></InfinionOptionDll>
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<SLE66CMisc></SLE66CMisc>
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<SLE66AMisc></SLE66AMisc>
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<SLE66LinkerMisc></SLE66LinkerMisc>
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<SFDFile>SFD\ST\STM32F4xx\STM32F4xx.sfr</SFDFile>
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<bCustSvd>0</bCustSvd>
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<UseEnv>0</UseEnv>
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<BinPath></BinPath>
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<IncludePath></IncludePath>
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<LibPath></LibPath>
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<RegisterFilePath>ST\STM32F4xx\</RegisterFilePath>
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<DBRegisterFilePath>ST\STM32F4xx\</DBRegisterFilePath>
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<TargetStatus>
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<Error>0</Error>
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<ExitCodeStop>0</ExitCodeStop>
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<ButtonStop>0</ButtonStop>
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<NotGenerated>0</NotGenerated>
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<InvalidFlash>1</InvalidFlash>
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</TargetStatus>
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<OutputDirectory>.\obj\</OutputDirectory>
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<OutputName>ch</OutputName>
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<CreateExecutable>1</CreateExecutable>
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<CreateLib>0</CreateLib>
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<CreateHexFile>0</CreateHexFile>
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<DebugInformation>1</DebugInformation>
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<BrowseInformation>1</BrowseInformation>
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<ListingPath>.\lst\</ListingPath>
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<HexFormatSelection>1</HexFormatSelection>
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<Merge32K>0</Merge32K>
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<CreateBatchFile>0</CreateBatchFile>
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<BeforeCompile>
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<RunUserProg1>0</RunUserProg1>
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<RunUserProg2>0</RunUserProg2>
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<UserProg1Name></UserProg1Name>
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<UserProg2Name></UserProg2Name>
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<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
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<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
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<nStopU1X>0</nStopU1X>
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<nStopU2X>0</nStopU2X>
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</BeforeCompile>
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<BeforeMake>
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<RunUserProg1>0</RunUserProg1>
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<RunUserProg2>0</RunUserProg2>
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<UserProg1Name></UserProg1Name>
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<UserProg2Name></UserProg2Name>
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<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
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<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
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<nStopB1X>0</nStopB1X>
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<nStopB2X>0</nStopB2X>
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</BeforeMake>
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<AfterMake>
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<RunUserProg1>0</RunUserProg1>
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<RunUserProg2>0</RunUserProg2>
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<UserProg1Name></UserProg1Name>
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<UserProg2Name></UserProg2Name>
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<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
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<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
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</AfterMake>
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<SelectedForBatchBuild>0</SelectedForBatchBuild>
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<SVCSIdString></SVCSIdString>
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</TargetCommonOption>
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<CommonProperty>
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<UseCPPCompiler>0</UseCPPCompiler>
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<RVCTCodeConst>0</RVCTCodeConst>
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<RVCTZI>0</RVCTZI>
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<RVCTOtherData>0</RVCTOtherData>
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<ModuleSelection>0</ModuleSelection>
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<IncludeInBuild>1</IncludeInBuild>
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<AlwaysBuild>0</AlwaysBuild>
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<GenerateAssemblyFile>0</GenerateAssemblyFile>
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<AssembleAssemblyFile>0</AssembleAssemblyFile>
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<PublicsOnly>0</PublicsOnly>
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<StopOnExitCode>3</StopOnExitCode>
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<CustomArgument></CustomArgument>
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<IncludeLibraryModules></IncludeLibraryModules>
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<ComprImg>1</ComprImg>
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</CommonProperty>
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<DllOption>
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<SimDllName>SARMCM3.DLL</SimDllName>
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<SimDllArguments>-MPU</SimDllArguments>
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<SimDlgDll>DCM.DLL</SimDlgDll>
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<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
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<TargetDllName>SARMCM3.DLL</TargetDllName>
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<TargetDllArguments>-MPU</TargetDllArguments>
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<TargetDlgDll>TCM.DLL</TargetDlgDll>
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<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
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</DllOption>
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<DebugOption>
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<OPTHX>
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<HexSelection>1</HexSelection>
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<HexRangeLowAddress>0</HexRangeLowAddress>
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<HexRangeHighAddress>0</HexRangeHighAddress>
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<HexOffset>0</HexOffset>
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<Oh166RecLen>16</Oh166RecLen>
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</OPTHX>
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<Simulator>
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<UseSimulator>0</UseSimulator>
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<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
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<RunToMain>1</RunToMain>
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<RestoreBreakpoints>1</RestoreBreakpoints>
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<RestoreWatchpoints>1</RestoreWatchpoints>
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<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
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<RestoreFunctions>1</RestoreFunctions>
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<RestoreToolbox>1</RestoreToolbox>
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<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
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<RestoreSysVw>1</RestoreSysVw>
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</Simulator>
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<Target>
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<UseTarget>1</UseTarget>
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<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
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<RunToMain>1</RunToMain>
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<RestoreBreakpoints>1</RestoreBreakpoints>
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<RestoreWatchpoints>1</RestoreWatchpoints>
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<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
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<RestoreFunctions>0</RestoreFunctions>
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<RestoreToolbox>1</RestoreToolbox>
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<RestoreTracepoints>0</RestoreTracepoints>
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<RestoreSysVw>1</RestoreSysVw>
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<UsePdscDebugDescription>1</UsePdscDebugDescription>
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</Target>
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<RunDebugAfterBuild>0</RunDebugAfterBuild>
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<TargetSelection>8</TargetSelection>
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<SimDlls>
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<CpuDll></CpuDll>
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<CpuDllArguments></CpuDllArguments>
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<PeripheralDll></PeripheralDll>
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<PeripheralDllArguments></PeripheralDllArguments>
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<InitializationFile></InitializationFile>
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</SimDlls>
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<TargetDlls>
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<CpuDll></CpuDll>
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<CpuDllArguments></CpuDllArguments>
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<PeripheralDll></PeripheralDll>
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<PeripheralDllArguments></PeripheralDllArguments>
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<InitializationFile></InitializationFile>
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<Driver>STLink\ST-LINKIII-KEIL.dll</Driver>
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</TargetDlls>
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</DebugOption>
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<Utilities>
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<Flash1>
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<UseTargetDll>1</UseTargetDll>
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<UseExternalTool>0</UseExternalTool>
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<RunIndependent>0</RunIndependent>
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<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
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<Capability>1</Capability>
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<DriverSelection>4100</DriverSelection>
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</Flash1>
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<bUseTDR>1</bUseTDR>
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<Flash2>STLink\ST-LINKIII-KEIL.dll</Flash2>
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<Flash3>"" ()</Flash3>
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<Flash4></Flash4>
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<pFcarmOut></pFcarmOut>
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<pFcarmGrp></pFcarmGrp>
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<pFcArmRoot></pFcArmRoot>
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<FcArmLst>0</FcArmLst>
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</Utilities>
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<TargetArmAds>
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<ArmAdsMisc>
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<GenerateListings>0</GenerateListings>
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<asHll>1</asHll>
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<asAsm>1</asAsm>
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<asMacX>1</asMacX>
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<asSyms>1</asSyms>
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<asFals>1</asFals>
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<asDbgD>1</asDbgD>
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<asForm>1</asForm>
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<ldLst>0</ldLst>
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<ldmm>1</ldmm>
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<ldXref>1</ldXref>
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<BigEnd>0</BigEnd>
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<AdsALst>1</AdsALst>
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<AdsACrf>1</AdsACrf>
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<AdsANop>0</AdsANop>
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<AdsANot>0</AdsANot>
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<AdsLLst>1</AdsLLst>
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<AdsLmap>1</AdsLmap>
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<AdsLcgr>1</AdsLcgr>
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<AdsLsym>1</AdsLsym>
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<AdsLszi>1</AdsLszi>
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<AdsLtoi>1</AdsLtoi>
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<AdsLsun>1</AdsLsun>
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<AdsLven>1</AdsLven>
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<AdsLsxf>1</AdsLsxf>
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<RvctClst>0</RvctClst>
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<GenPPlst>0</GenPPlst>
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<AdsCpuType>"Cortex-M4"</AdsCpuType>
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<RvctDeviceName></RvctDeviceName>
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<mOS>0</mOS>
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<uocRom>0</uocRom>
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<uocRam>0</uocRam>
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<hadIROM>1</hadIROM>
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<hadIRAM>1</hadIRAM>
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<hadXRAM>0</hadXRAM>
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<uocXRam>0</uocXRam>
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<RvdsVP>2</RvdsVP>
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<hadIRAM2>1</hadIRAM2>
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<hadIROM2>0</hadIROM2>
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<StupSel>8</StupSel>
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<useUlib>0</useUlib>
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<EndSel>0</EndSel>
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<uLtcg>0</uLtcg>
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<RoSelD>3</RoSelD>
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<RwSelD>3</RwSelD>
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<CodeSel>0</CodeSel>
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<OptFeed>0</OptFeed>
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<NoZi1>0</NoZi1>
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<NoZi2>0</NoZi2>
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<NoZi3>0</NoZi3>
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<NoZi4>0</NoZi4>
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<NoZi5>0</NoZi5>
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<Ro1Chk>0</Ro1Chk>
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<Ro2Chk>0</Ro2Chk>
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<Ro3Chk>0</Ro3Chk>
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<Ir1Chk>1</Ir1Chk>
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<Ir2Chk>0</Ir2Chk>
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<Ra1Chk>0</Ra1Chk>
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<Ra2Chk>0</Ra2Chk>
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<Ra3Chk>0</Ra3Chk>
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<Im1Chk>1</Im1Chk>
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<Im2Chk>1</Im2Chk>
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<OnChipMemories>
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<Ocm1>
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<Type>0</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</Ocm1>
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<Ocm2>
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<Type>0</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</Ocm2>
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<Ocm3>
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<Type>0</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</Ocm3>
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<Ocm4>
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<Type>0</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</Ocm4>
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<Ocm5>
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<Type>0</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</Ocm5>
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<Ocm6>
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<Type>0</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</Ocm6>
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<IRAM>
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<Type>0</Type>
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<StartAddress>0x20000000</StartAddress>
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<Size>0x20000</Size>
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</IRAM>
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<IROM>
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<Type>1</Type>
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<StartAddress>0x8000000</StartAddress>
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<Size>0x100000</Size>
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</IROM>
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<XRAM>
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<Type>0</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</XRAM>
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<OCR_RVCT1>
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<Type>1</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</OCR_RVCT1>
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<OCR_RVCT2>
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<Type>1</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</OCR_RVCT2>
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<OCR_RVCT3>
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<Type>1</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</OCR_RVCT3>
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<OCR_RVCT4>
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<Type>1</Type>
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<StartAddress>0x8000000</StartAddress>
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<Size>0x100000</Size>
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</OCR_RVCT4>
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<OCR_RVCT5>
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<Type>1</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</OCR_RVCT5>
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<OCR_RVCT6>
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<Type>0</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</OCR_RVCT6>
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<OCR_RVCT7>
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<Type>0</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</OCR_RVCT7>
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<OCR_RVCT8>
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<Type>0</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</OCR_RVCT8>
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<OCR_RVCT9>
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<Type>0</Type>
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<StartAddress>0x20000000</StartAddress>
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<Size>0x20000</Size>
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</OCR_RVCT9>
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<OCR_RVCT10>
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<Type>0</Type>
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<StartAddress>0x20020000</StartAddress>
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<Size>0x1</Size>
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</OCR_RVCT10>
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</OnChipMemories>
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<RvctStartVector></RvctStartVector>
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</ArmAdsMisc>
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<Cads>
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<interw>1</interw>
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<Optim>4</Optim>
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<oTime>1</oTime>
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<SplitLS>0</SplitLS>
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<OneElfS>0</OneElfS>
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<Strict>0</Strict>
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<EnumInt>0</EnumInt>
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<PlainCh>0</PlainCh>
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<Ropi>0</Ropi>
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<Rwpi>0</Rwpi>
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<wLevel>0</wLevel>
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<uThumb>0</uThumb>
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<uSurpInc>0</uSurpInc>
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<uC99>0</uC99>
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<useXO>0</useXO>
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<VariousControls>
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<MiscControls>--c99 -USTM32F40_41xxx</MiscControls>
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<Define>__heap_base__=Image$$$$RW_IRAM1$$$$ZI$$$$Limit __heap_end__=Image$$$$RW_IRAM2$$$$Base</Define>
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<Undefine></Undefine>
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<IncludePath>..\;..\..\..\..\..\os\common\ports\ARMCMx\devices\STM32F4xx;..\..\..\..\..\os\ext\CMSIS\include;..\..\..\..\..\os\ext\CMSIS\ST;..\..\..\..\..\os\rt\ports\ARMCMx;..\..\..\..\..\os\rt\ports\ARMCMx\compilers\RVCT;..\..\..\..\..\os\rt\include;..\..\..\..\..\os\hal\osal\rt;..\..\..\..\..\os\hal\include;..\..\..\..\..\os\hal\boards\ST_STM32F4_DISCOVERY;..\..\..\..\..\os\hal\lib\streams;..\..\..\..\..\os\hal\ports\common\ARMCMx;..\..\..\..\..\os\hal\ports\STM32\STM32F4xx;..\..\..\..\..\os\hal\ports\STM32\LLD;..\..\..\..\..\os\hal\ports\STM32\LLD\GPIOv2;..\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1;..\..\..\..\..\os\hal\ports\STM32\LLD\USARTv1;..\..\..\..\..\testhal\common</IncludePath>
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</VariousControls>
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</Cads>
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<Aads>
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<interw>1</interw>
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<Ropi>0</Ropi>
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<Rwpi>0</Rwpi>
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<thumb>0</thumb>
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<SplitLS>0</SplitLS>
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<SwStkChk>0</SwStkChk>
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<NoWarn>0</NoWarn>
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<uSurpInc>0</uSurpInc>
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<useXO>0</useXO>
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<VariousControls>
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<MiscControls>--cpreproc</MiscControls>
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<Define></Define>
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<Undefine></Undefine>
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<IncludePath>..\;..\..\..\..\..\os\common\ports\ARMCMx\devices\STM32F4xx;..\..\..\..\..\os\rt\ports\ARMCMx</IncludePath>
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</VariousControls>
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</Aads>
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<LDads>
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<umfTarg>1</umfTarg>
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<Ropi>0</Ropi>
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<Rwpi>0</Rwpi>
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<noStLib>0</noStLib>
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<RepFail>1</RepFail>
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<useFile>0</useFile>
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<TextAddressRange>0x08000000</TextAddressRange>
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<DataAddressRange>0x20000000</DataAddressRange>
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<pXoBase></pXoBase>
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<ScatterFile></ScatterFile>
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<IncludeLibs></IncludeLibs>
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<IncludeLibsPath></IncludeLibsPath>
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<Misc></Misc>
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<LinkerInputFile></LinkerInputFile>
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<DisabledWarnings></DisabledWarnings>
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</LDads>
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</TargetArmAds>
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</TargetOption>
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<Groups>
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<Group>
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<GroupName>board</GroupName>
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<Files>
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<File>
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<FileName>board.c</FileName>
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<FileType>1</FileType>
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<FilePath>..\..\..\..\..\os\hal\boards\ST_STM32F4_DISCOVERY\board.c</FilePath>
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</File>
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</Files>
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</Group>
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<Group>
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<GroupName>port</GroupName>
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<Files>
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<File>
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<FileName>vectors.s</FileName>
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<FileType>2</FileType>
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<FilePath>..\..\..\..\..\os\common\ports\ARMCMx\compilers\RVCT\vectors.s</FilePath>
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</File>
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<File>
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<FileName>cstartup.s</FileName>
|
|
<FileType>2</FileType>
|
|
<FilePath>..\..\..\..\..\os\common\ports\ARMCMx\compilers\RVCT\cstartup.s</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chcore.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\ports\ARMCMx\chcore.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chcore_v7m.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\ports\ARMCMx\chcore_v7m.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chcoreasm_v7m.s</FileName>
|
|
<FileType>2</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\ports\ARMCMx\compilers\RVCT\chcoreasm_v7m.s</FilePath>
|
|
</File>
|
|
</Files>
|
|
</Group>
|
|
<Group>
|
|
<GroupName>kernel</GroupName>
|
|
<Files>
|
|
<File>
|
|
<FileName>chvt.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\src\chvt.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chcond.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\src\chcond.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chdebug.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\src\chdebug.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chdynamic.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\src\chdynamic.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chevents.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\src\chevents.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chheap.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\src\chheap.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chmboxes.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\src\chmboxes.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chmemcore.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\src\chmemcore.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chmempools.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\src\chmempools.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chmsg.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\src\chmsg.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chmtx.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\src\chmtx.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chqueues.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\src\chqueues.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chregistry.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\src\chregistry.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chschd.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\src\chschd.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chsem.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\src\chsem.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chstats.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\src\chstats.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chsys.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\src\chsys.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chthreads.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\src\chthreads.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chtm.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\rt\src\chtm.c</FilePath>
|
|
</File>
|
|
</Files>
|
|
</Group>
|
|
<Group>
|
|
<GroupName>hal</GroupName>
|
|
<Files>
|
|
<File>
|
|
<FileName>serial.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\hal\src\serial.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>gpt.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\hal\src\gpt.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>hal.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\hal\src\hal.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>st.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\hal\src\st.c</FilePath>
|
|
</File>
|
|
</Files>
|
|
</Group>
|
|
<Group>
|
|
<GroupName>platform</GroupName>
|
|
<Files>
|
|
<File>
|
|
<FileName>hal_lld.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\hal\ports\STM32\STM32F4xx\hal_lld.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>pal_lld.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\hal\ports\STM32\LLD\GPIOv2\pal_lld.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>gpt_lld.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\gpt_lld.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>serial_lld.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\hal\ports\STM32\LLD\USARTv1\serial_lld.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>st_lld.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\st_lld.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>nvic.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\hal\ports\common\ARMCMx\nvic.c</FilePath>
|
|
</File>
|
|
</Files>
|
|
</Group>
|
|
<Group>
|
|
<GroupName>demo</GroupName>
|
|
<Files>
|
|
<File>
|
|
<FileName>main.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\main.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>mcuconf.h</FileName>
|
|
<FileType>5</FileType>
|
|
<FilePath>..\mcuconf.h</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chconf.h</FileName>
|
|
<FileType>5</FileType>
|
|
<FilePath>..\chconf.h</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>halconf.h</FileName>
|
|
<FileType>5</FileType>
|
|
<FilePath>..\halconf.h</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>irq_storm.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\common\irq_storm.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>chprintf.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\hal\lib\streams\chprintf.c</FilePath>
|
|
</File>
|
|
<File>
|
|
<FileName>memstreams.c</FileName>
|
|
<FileType>1</FileType>
|
|
<FilePath>..\..\..\..\..\os\hal\lib\streams\memstreams.c</FilePath>
|
|
</File>
|
|
</Files>
|
|
</Group>
|
|
</Groups>
|
|
</Target>
|
|
</Targets>
|
|
|
|
</Project>
|