222 lines
6.7 KiB
C
222 lines
6.7 KiB
C
/*
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SPC5 HAL - Copyright (C) 2013 STMicroelectronics
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file eMIOS_v1/spc5_emios.c
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* @brief SPC5xx low level ICU and PWM drivers common code.
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*
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* @addtogroup ICU - PWM
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* @{
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*/
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#include "ch.h"
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#include "hal.h"
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#if HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
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#include "spc5_emios.h"
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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/**
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* @brief Number of active eMIOSx Channels.
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*/
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static uint32_t emios0_active_channels;
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static uint32_t emios1_active_channels;
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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#if SPC5_HAS_EMIOS0
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void reset_emios0_active_channels() {
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emios0_active_channels = 0;
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}
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uint32_t get_emios0_active_channels() {
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return emios0_active_channels;
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}
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void increase_emios0_active_channels() {
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emios0_active_channels++;
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}
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void decrease_emios0_active_channels() {
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emios0_active_channels--;
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}
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#if HAL_USE_ICU
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void icu_active_emios0_clock(ICUDriver *icup) {
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/* If this is the first Channel activated then the eMIOS0 is enabled.*/
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if (emios0_active_channels == 1) {
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halSPCSetPeripheralClockMode(SPC5_EMIOS0_PCTL,
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SPC5_EMIOS0_START_PCTL);
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/* Disable all unified channels.*/
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icup->emiosp->MCR.B.GPREN = 0;
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icup->emiosp->MCR.R = EMIOSMCR_GPRE(SPC5_EMIOS0_GPRE_VALUE);
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icup->emiosp->MCR.R |= EMIOSMCR_GPREN;
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icup->emiosp->MCR.B.GTBE = 1U;
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icup->emiosp->UCDIS.R = 0xFFFFFFFF;
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}
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}
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void icu_deactive_emios0_clock(ICUDriver *icup) {
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/* If it is the last active channels then the eMIOS0 is disabled.*/
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if (emios0_active_channels == 0) {
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if (icup->emiosp->UCDIS.R == 0) {
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halSPCSetPeripheralClockMode(SPC5_EMIOS0_PCTL,
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SPC5_EMIOS0_STOP_PCTL);
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}
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}
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}
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#endif
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#if HAL_USE_PWM
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void pwm_active_emios0_clock(PWMDriver *pwmp) {
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/* If this is the first Channel activated then the eMIOS0 is enabled.*/
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if (emios0_active_channels == 1) {
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halSPCSetPeripheralClockMode(SPC5_EMIOS0_PCTL,
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SPC5_EMIOS0_START_PCTL);
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/* Disable all unified channels.*/
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pwmp->emiosp->MCR.B.GPREN = 0;
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pwmp->emiosp->MCR.R = EMIOSMCR_GPRE(SPC5_EMIOS0_GPRE_VALUE);
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pwmp->emiosp->MCR.R |= EMIOSMCR_GPREN;
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pwmp->emiosp->MCR.B.GTBE = 1U;
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pwmp->emiosp->UCDIS.R = 0xFFFFFFFF;
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}
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}
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void pwm_deactive_emios0_clock(PWMDriver *pwmp) {
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/* If it is the last active channels then the eMIOS0 is disabled.*/
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if (emios0_active_channels == 0) {
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if (pwmp->emiosp->UCDIS.R == 0) {
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halSPCSetPeripheralClockMode(SPC5_EMIOS0_PCTL,
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SPC5_EMIOS0_STOP_PCTL);
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}
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}
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}
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#endif
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#endif
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#if SPC5_HAS_EMIOS1
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void reset_emios1_active_channels() {
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emios1_active_channels = 0;
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}
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uint32_t get_emios1_active_channels() {
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return emios1_active_channels;
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}
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void increase_emios1_active_channels() {
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emios1_active_channels++;
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}
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void decrease_emios1_active_channels() {
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emios1_active_channels--;
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}
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#if HAL_USE_ICU
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void icu_active_emios1_clock(ICUDriver *icup) {
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/* If this is the first Channel activated then the eMIOS1 is enabled.*/
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if (emios1_active_channels == 1) {
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halSPCSetPeripheralClockMode(SPC5_EMIOS1_PCTL,
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SPC5_EMIOS1_START_PCTL);
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/* Disable all unified channels.*/
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icup->emiosp->MCR.B.GPREN = 0;
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icup->emiosp->MCR.R = EMIOSMCR_GPRE(SPC5_EMIOS1_GPRE_VALUE);
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icup->emiosp->MCR.R |= EMIOSMCR_GPREN;
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icup->emiosp->MCR.B.GTBE = 1U;
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icup->emiosp->UCDIS.R = 0xFFFFFFFF;
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}
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}
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void icu_deactive_emios1_clock(ICUDriver *icup) {
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/* If it is the last active channels then the eMIOS1 is disabled.*/
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if (emios1_active_channels == 0) {
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if (icup->emiosp->UCDIS.R == 0) {
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halSPCSetPeripheralClockMode(SPC5_EMIOS1_PCTL,
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SPC5_EMIOS1_STOP_PCTL);
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}
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}
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}
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#endif
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#if HAL_USE_PWM
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void pwm_active_emios1_clock(PWMDriver *pwmp) {
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/* If this is the first Channel activated then the eMIOS1 is enabled.*/
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if (emios1_active_channels == 1) {
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halSPCSetPeripheralClockMode(SPC5_EMIOS1_PCTL,
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SPC5_EMIOS1_START_PCTL);
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/* Disable all unified channels.*/
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pwmp->emiosp->MCR.B.GPREN = 0;
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pwmp->emiosp->MCR.R = EMIOSMCR_GPRE(SPC5_EMIOS1_GPRE_VALUE);
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pwmp->emiosp->MCR.R |= EMIOSMCR_GPREN;
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pwmp->emiosp->MCR.B.GTBE = 1U;
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pwmp->emiosp->UCDIS.R = 0xFFFFFFFF;
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}
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}
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void pwm_deactive_emios1_clock(PWMDriver *pwmp) {
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/* If it is the last active channels then the eMIOS1 is disabled.*/
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if (emios1_active_channels == 0) {
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if (pwmp->emiosp->UCDIS.R == 0) {
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halSPCSetPeripheralClockMode(SPC5_EMIOS1_PCTL,
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SPC5_EMIOS1_STOP_PCTL);
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}
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}
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}
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#endif
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#endif
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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#endif /* HAL_USE_ICU || HAL_USE_PWM */
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/** @} */
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