511 lines
12 KiB
C
511 lines
12 KiB
C
/*
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SPC5 HAL - Copyright (C) 2013 STMicroelectronics
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file SPC5xx/spc5_linflex.h
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* @brief LINFlex helper driver header.
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*
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* @addtogroup SPC5xx_LINFLEX
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* @{
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*/
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#ifndef _SPC5_LINFLEX_H_
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#define _SPC5_LINFLEX_H_
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/**
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* @name LINIER register bits definitions
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* @{
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*/
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#define SPC5_LINIER_HRIE (1U << 0)
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#define SPC5_LINIER_DTIE (1U << 1)
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#define SPC5_LINIER_DRIE (1U << 2)
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#define SPC5_LINIER_DBEIE (1U << 3)
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#define SPC5_LINIER_DBFIE (1U << 4)
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#define SPC5_LINIER_WUIE (1U << 5)
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#define SPC5_LINIER_LSIE (1U << 6)
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#define SPC5_LINIER_BOIE (1U << 7)
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#define SPC5_LINIER_FEIE (1U << 8)
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#define SPC5_LINIER_HEIE (1U << 11)
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#define SPC5_LINIER_CEIE (1U << 12)
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#define SPC5_LINIER_BEIE (1U << 13)
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#define SPC5_LINIER_OCIE (1U << 14)
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#define SPC5_LINIER_SZIE (1U << 15)
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/** @} */
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/**
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* @name UARTSR register bits definitions
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* @{
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*/
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#define SPC5_UARTSR_NF (1U << 0)
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#define SPC5_UARTSR_DTF (1U << 1)
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#define SPC5_UARTSR_DRF (1U << 2)
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#define SPC5_UARTSR_WUF (1U << 5)
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#define SPC5_UARTSR_RPS (1U << 6)
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#define SPC5_UARTSR_BOF (1U << 7)
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#define SPC5_UARTSR_FEF (1U << 8)
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#define SPC5_UARTSR_RMB (1U << 9)
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#define SPC5_UARTSR_PE0 (1U << 10)
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#define SPC5_UARTSR_PE1 (1U << 11)
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#define SPC5_UARTSR_PE2 (1U << 12)
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#define SPC5_UARTSR_PE3 (1U << 13)
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#define SPC5_UARTSR_OCF (1U << 14)
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#define SPC5_UARTSR_SZF (1U << 15)
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/** @} */
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/**
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* @name UARTCR register bits definitions
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* @{
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*/
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#define SPC5_UARTCR_UART (1U << 0)
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#define SPC5_UARTCR_WL (1U << 1)
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#define SPC5_UARTCR_PCE (1U << 2)
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#define SPC5_UARTCR_OP (1U << 3)
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#define SPC5_UARTCR_TXEN (1U << 4)
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#define SPC5_UARTCR_RXEN (1U << 5)
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/** @} */
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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struct spc5_linflex {
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int16_t LINFLEX_reserved1;
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union {
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vuint16_t R;
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struct {
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vuint16_t CCD :1;
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vuint16_t CFD :1;
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vuint16_t LASE :1;
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vuint16_t AWUM :1;
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vuint16_t MBL :4;
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vuint16_t BF :1;
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vuint16_t SFTM :1;
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vuint16_t LBKM :1;
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vuint16_t MME :1;
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vuint16_t SBDT :1;
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vuint16_t RBLM :1;
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vuint16_t SLEEP :1;
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vuint16_t INIT :1;
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} B;
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} LINCR1;
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int16_t LINFLEX_reserved2;
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union {
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vuint16_t R;
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struct {
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vuint16_t SZIE :1;
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vuint16_t OCIE :1;
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vuint16_t BEIE :1;
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vuint16_t CEIE :1;
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vuint16_t HEIE :1;
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vuint16_t :2;
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vuint16_t FEIE :1;
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vuint16_t BOIE :1;
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vuint16_t LSIE :1;
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vuint16_t WUIE :1;
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vuint16_t DBFIE :1;
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vuint16_t DBEIE :1;
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vuint16_t DRIE :1;
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vuint16_t DTIE :1;
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vuint16_t HRIE :1;
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} B;
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} LINIER;
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int16_t LINFLEX_reserved3;
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union {
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vuint16_t R;
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struct {
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vuint16_t LINS :4;
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vuint16_t :2;
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vuint16_t RMB :1;
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vuint16_t :1;
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vuint16_t RBSY :1;
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vuint16_t RPS :1;
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vuint16_t WUF :1;
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vuint16_t DBFF :1;
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vuint16_t DBEF :1;
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vuint16_t DRF :1;
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vuint16_t DTF :1;
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vuint16_t HRF :1;
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} B;
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} LINSR;
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int16_t LINFLEX_reserved4;
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union {
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vuint16_t R;
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struct {
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vuint16_t SZF :1;
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vuint16_t OCF :1;
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vuint16_t BEF :1;
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vuint16_t CEF :1;
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vuint16_t SFEF :1;
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vuint16_t BDEF :1;
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vuint16_t IDPEF :1;
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vuint16_t FEF :1;
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vuint16_t BOF :1;
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vuint16_t :6;
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vuint16_t NF :1;
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} B;
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} LINESR;
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int16_t LINFLEX_reserved5;
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union {
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vuint16_t R;
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struct {
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vuint16_t :1;
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vuint16_t TDFL :2;
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vuint16_t :1;
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vuint16_t RDFL :2;
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vuint16_t :4;
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vuint16_t RXEN :1;
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vuint16_t TXEN :1;
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vuint16_t OP :1;
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vuint16_t PCE :1;
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vuint16_t WL :1;
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vuint16_t UART :1;
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} B;
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} UARTCR;
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int16_t LINFLEX_reserved6;
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union {
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vuint16_t R;
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struct {
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vuint16_t SZF :1;
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vuint16_t OCF :1;
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vuint16_t PE :4;
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vuint16_t RMB :1;
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vuint16_t FEF :1;
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vuint16_t BOF :1;
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vuint16_t RPS :1;
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vuint16_t WUF :1;
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vuint16_t :2;
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vuint16_t DRF :1;
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vuint16_t DTF :1;
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vuint16_t NF :1;
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} B;
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} UARTSR;
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int16_t LINFLEX_reserved7;
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union {
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vuint16_t R;
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struct {
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vuint16_t :5;
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vuint16_t LTOM :1;
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vuint16_t IOT :1;
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vuint16_t TOCE :1;
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vuint16_t CNT :8;
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} B;
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} LINTCSR;
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int16_t LINFLEX_reserved8;
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union {
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vuint16_t R;
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struct {
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vuint16_t OC2 :8;
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vuint16_t OC1 :8;
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} B;
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} LINOCR;
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int16_t LINFLEX_reserved9;
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union {
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vuint16_t R;
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struct {
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vuint16_t :4;
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vuint16_t RTO :4;
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vuint16_t :1;
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vuint16_t HTO :7;
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} B;
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} LINTOCR;
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int16_t LINFLEX_reserved10;
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union {
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vuint16_t R;
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struct {
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vuint16_t :12;
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vuint16_t DIV_F :4;
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} B;
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} LINFBRR;
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int16_t LINFLEX_reserved11;
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union {
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vuint16_t R;
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struct {
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vuint16_t :3;
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vuint16_t DIV_M :13;
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} B;
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} LINIBRR;
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int16_t LINFLEX_reserved12;
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union {
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vuint16_t R;
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struct {
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vuint16_t :8;
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vuint16_t CF :8;
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} B;
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} LINCFR;
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int16_t LINFLEX_reserved13;
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union {
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vuint16_t R;
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struct {
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vuint16_t :1;
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vuint16_t IOBE :1;
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vuint16_t IOPE :1;
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vuint16_t WURQ :1;
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vuint16_t DDRQ :1;
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vuint16_t DTRQ :1;
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vuint16_t ABRQ :1;
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vuint16_t HTRQ :1;
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vuint16_t :8;
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} B;
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} LINCR2;
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int16_t LINFLEX_reserved14;
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union {
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vuint16_t R;
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struct {
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vuint16_t DFL :6;
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vuint16_t DIR :1;
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vuint16_t CCS :1;
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vuint16_t :2;
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vuint16_t ID :6;
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} B;
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} BIDR;
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union {
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vuint32_t R;
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struct {
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vuint32_t DATA3 :8;
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vuint32_t DATA2 :8;
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vuint32_t DATA1 :8;
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vuint32_t DATA0 :8;
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} B;
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} BDRL;
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union {
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vuint32_t R;
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struct {
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vuint32_t DATA7 :8;
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vuint32_t DATA6 :8;
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vuint32_t DATA5 :8;
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vuint32_t DATA4 :8;
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} B;
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} BDRM;
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int16_t LINFLEX_reserved15;
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union {
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vuint16_t R;
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struct {
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vuint16_t :8;
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vuint16_t FACT :8;
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} B;
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} IFER;
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int16_t LINFLEX_reserved16;
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union {
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vuint16_t R;
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struct {
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vuint16_t :12;
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vuint16_t IFMI :4;
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} B;
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} IFMI;
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int16_t LINFLEX_reserved17;
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union {
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vuint16_t R;
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struct {
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vuint16_t :12;
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vuint16_t IFM :4;
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} B;
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} IFMR;
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int16_t LINFLEX_reserved18;
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union {
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vuint16_t R;
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struct {
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vuint16_t :3;
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vuint16_t DFL :3;
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vuint16_t DIR :1;
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vuint16_t CCS :1;
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vuint16_t :2;
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vuint16_t ID :6;
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} B;
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} IFCR0;
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int16_t LINFLEX_reserved19;
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union {
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vuint16_t R;
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struct {
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vuint16_t :3;
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vuint16_t DFL :3;
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vuint16_t DIR :1;
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vuint16_t CCS :1;
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vuint16_t :2;
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vuint16_t ID :6;
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} B;
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} IFCR1;
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int16_t LINFLEX_reserved20;
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union {
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vuint16_t R;
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struct {
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vuint16_t :3;
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vuint16_t DFL :3;
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vuint16_t DIR :1;
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vuint16_t CCS :1;
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vuint16_t :2;
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vuint16_t ID :6;
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} B;
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} IFCR2;
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int16_t LINFLEX_reserved21;
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union {
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vuint16_t R;
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struct {
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vuint16_t :3;
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vuint16_t DFL :3;
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vuint16_t DIR :1;
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vuint16_t CCS :1;
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vuint16_t :2;
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vuint16_t ID :6;
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} B;
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} IFCR3;
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int16_t LINFLEX_reserved22;
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union {
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vuint16_t R;
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struct {
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vuint16_t :3;
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vuint16_t DFL :3;
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vuint16_t DIR :1;
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vuint16_t CCS :1;
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vuint16_t :2;
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vuint16_t ID :6;
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} B;
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} IFCR4;
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int16_t LINFLEX_reserved23;
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union {
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vuint16_t R;
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struct {
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vuint16_t :3;
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vuint16_t DFL :3;
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vuint16_t DIR :1;
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vuint16_t CCS :1;
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vuint16_t :2;
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vuint16_t ID :6;
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} B;
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} IFCR5;
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int16_t LINFLEX_reserved24;
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union {
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vuint16_t R;
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struct {
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vuint16_t :3;
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vuint16_t DFL :3;
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vuint16_t DIR :1;
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vuint16_t CCS :1;
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vuint16_t :2;
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vuint16_t ID :6;
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} B;
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} IFCR6;
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int16_t LINFLEX_reserved25;
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union {
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vuint16_t R;
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struct {
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vuint16_t :3;
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vuint16_t DFL :3;
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vuint16_t DIR :1;
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vuint16_t CCS :1;
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vuint16_t :2;
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vuint16_t ID :6;
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} B;
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} IFCR7;
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};
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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/**
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* @name LINFlex units references
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* @{
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*/
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#if SPC5_HAS_LINFLEX0 || defined(__DOXYGEN__)
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#define SPC5_LINFLEX0 (*(struct spc5_linflex *)0xFFE40000UL)
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#endif
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#if SPC5_HAS_LINFLEX1 || defined(__DOXYGEN__)
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#define SPC5_LINFLEX1 (*(struct spc5_linflex *)0xFFE44000UL)
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#endif
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#if SPC5_HAS_LINFLEX2 || defined(__DOXYGEN__)
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#define SPC5_LINFLEX2 (*(struct spc5_linflex *)0xFFE48000UL)
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#endif
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#if SPC5_HAS_LINFLEX3 || defined(__DOXYGEN__)
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#define SPC5_LINFLEX3 (*(struct spc5_linflex *)0xFFE4C000UL)
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#endif
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/** @} */
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#endif /* _SPC5_LINFLEX_H_ */
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/** @} */
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