476 lines
14 KiB
C
476 lines
14 KiB
C
/*
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SPC5 HAL - Copyright (C) 2013 STMicroelectronics
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file FlexPWM_v1/pwm_lld.h
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* @brief SPC5xx low level PWM driver header.
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*
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* @addtogroup PWM
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* @{
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*/
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#ifndef _PWM_LLD_H_
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#define _PWM_LLD_H_
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#if HAL_USE_PWM || defined(__DOXYGEN__)
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#include "spc5_flexpwm.h"
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/**
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* @name STS register bits definitions
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* @{
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*/
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#define SPC5_FLEXPWM_STS_CMPF0 (1U << 0)
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#define SPC5_FLEXPWM_STS_CMPF1 (1U << 1)
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#define SPC5_FLEXPWM_STS_CMPF2 (1U << 2)
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#define SPC5_FLEXPWM_STS_CMPF3 (1U << 3)
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#define SPC5_FLEXPWM_STS_CMPF4 (1U << 4)
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#define SPC5_FLEXPWM_STS_CMPF5 (1U << 5)
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#define SPC5_FLEXPWM_STS_CFX0 (1U << 6)
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#define SPC5_FLEXPWM_STS_CFX1 (1U << 7)
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#define SPC5_FLEXPWM_STS_RF (1U << 12)
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#define SPC5_FLEXPWM_STS_REF (1U << 13)
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#define SPC5_FLEXPWM_STS_RUF (1U << 14)
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/** @} */
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/**
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* @name PSC values definition
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* @{
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*/
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#define SPC5_FLEXPWM_PSC_1 0U
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#define SPC5_FLEXPWM_PSC_2 1U
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#define SPC5_FLEXPWM_PSC_4 2U
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#define SPC5_FLEXPWM_PSC_8 3U
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#define SPC5_FLEXPWM_PSC_16 4U
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#define SPC5_FLEXPWM_PSC_32 5U
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#define SPC5_FLEXPWM_PSC_64 6U
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#define SPC5_FLEXPWM_PSC_128 7U
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/** @} */
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/**
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* @brief Number of PWM channels per PWM driver.
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*/
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#define PWM_CHANNELS 2
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/**
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* @brief Complementary output modes mask.
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* @note This is an SPC5-specific setting.
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*/
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#define PWM_COMPLEMENTARY_OUTPUT_MASK 0xF0
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/**
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* @brief Complementary output not driven.
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* @note This is an SPC5-specific setting.
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*/
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#define PWM_COMPLEMENTARY_OUTPUT_DISABLED 0x00
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/**
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* @brief Complementary output, active is logic level one.
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* @note This is an SPC5-specific setting.
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*/
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#define PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH 0x10
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/**
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* @brief Complementary output, active is logic level zero.
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* @note This is an SPC5-specific setting.
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*/
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#define PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW 0x20
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/**
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* @brief Alignment mode mask.
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* @note This is an SPC5-specific setting.
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*/
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#define PWM_ALIGN_MASK 0x01
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/**
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* @brief Edge-Aligned PWM functional mode.
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* @note This is an SPC5-specific setting.
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*/
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#define PWM_ALIGN_EDGE 0x00
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/**
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* @brief Center-Aligned PWM functional mode.
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* @note This is an SPC5-specific setting.
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*/
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#define PWM_ALIGN_CENTER 0x01
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @name Configuration options
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* @{
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*/
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/**
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* @brief PWMD1 driver enable switch.
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* @details If set to @p TRUE the support for PWMD1 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_PWM_USE_SMOD0) || defined(__DOXYGEN__)
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#define SPC5_PWM_USE_SMOD0 FALSE
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#endif
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/**
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* @brief PWMD2 driver enable switch.
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* @details If set to @p TRUE the support for PWMD2 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_PWM_USE_SMOD1) || defined(__DOXYGEN__)
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#define SPC5_PWM_USE_SMOD1 FALSE
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#endif
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/**
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* @brief PWMD3 driver enable switch.
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* @details If set to @p TRUE the support for PWMD3 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_PWM_USE_SMOD2) || defined(__DOXYGEN__)
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#define SPC5_PWM_USE_SMOD2 FALSE
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#endif
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/**
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* @brief PWMD4 driver enable switch.
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* @details If set to @p TRUE the support for PWMD4 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_PWM_USE_SMOD3) || defined(__DOXYGEN__)
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#define SPC5_PWM_USE_SMOD3 FALSE
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#endif
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/**
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* @brief PWMD1 interrupt priority level setting.
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*/
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#if !defined(SPC5_PWM_SMOD0_PRIORITY) || defined(__DOXYGEN__)
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#define SPC5_PWM_SMOD0_PRIORITY 7
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#endif
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/**
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* @brief PWMD2 interrupt priority level setting.
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*/
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#if !defined(SPC5_PWM_SMOD1_PRIORITY) || defined(__DOXYGEN__)
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#define SPC5_PWM_SMOD1_PRIORITY 7
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#endif
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/**
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* @brief PWMD3 interrupt priority level setting.
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*/
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#if !defined(SPC5_PWM_SMOD2_PRIORITY) || defined(__DOXYGEN__)
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#define SPC5_PWM_SMOD2_PRIORITY 7
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#endif
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/**
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* @brief PWMD4 interrupt priority level setting.
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*/
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#if !defined(SPC5_PWM_SMOD3_PRIORITY) || defined(__DOXYGEN__)
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#define SPC5_PWM_SMOD3_PRIORITY 7
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#endif
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/**
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* @brief FlexPWM-0 peripheral configuration when started.
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* @note The default configuration is 1 (always run) in run mode and
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* 2 (only halt) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_PWM_FLEXPWM0_START_PCTL) || defined(__DOXYGEN__)
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#define SPC5_PWM_FLEXPWM0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
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SPC5_ME_PCTL_LP(2))
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#endif
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/**
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* @brief FlexPWM-0 peripheral configuration when stopped.
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* @note The default configuration is 0 (never run) in run mode and
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* 0 (never run) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_PWM_FLEXPWM0_STOP_PCTL) || defined(__DOXYGEN__)
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#define SPC5_PWM_FLEXPWM0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
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SPC5_ME_PCTL_LP(0))
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#endif
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/**
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* @brief PWMD5 driver enable switch.
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* @details If set to @p TRUE the support for PWMD5 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_PWM_USE_SMOD4) || defined(__DOXYGEN__)
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#define SPC5_PWM_USE_SMOD4 FALSE
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#endif
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/**
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* @brief PWMD6 driver enable switch.
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* @details If set to @p TRUE the support for PWMD6 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_PWM_USE_SMOD5) || defined(__DOXYGEN__)
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#define SPC5_PWM_USE_SMOD5 FALSE
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#endif
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/**
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* @brief PWMD7 driver enable switch.
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* @details If set to @p TRUE the support for PWMD7 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_PWM_USE_SMOD6) || defined(__DOXYGEN__)
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#define SPC5_PWM_USE_SMOD6 FALSE
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#endif
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/**
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* @brief PWMD8 driver enable switch.
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* @details If set to @p TRUE the support for PWMD8 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_PWM_USE_SMOD7) || defined(__DOXYGEN__)
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#define SPC5_PWM_USE_SMOD7 FALSE
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#endif
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/**
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* @brief PWMD5 interrupt priority level setting.
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*/
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#if !defined(SPC5_PWM_SMOD4_PRIORITY) || defined(__DOXYGEN__)
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#define SPC5_PWM_SMOD4_PRIORITY 7
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#endif
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/**
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* @brief PWMD6 interrupt priority level setting.
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*/
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#if !defined(SPC5_PWM_SMOD5_PRIORITY) || defined(__DOXYGEN__)
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#define SPC5_PWM_SMOD5_PRIORITY 7
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#endif
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/**
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* @brief PWMD7 interrupt priority level setting.
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*/
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#if !defined(SPC5_PWM_SMOD6_PRIORITY) || defined(__DOXYGEN__)
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#define SPC5_PWM_SMOD6_PRIORITY 7
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#endif
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/**
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* @brief PWMD8 interrupt priority level setting.
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*/
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#if !defined(SPC5_PWM_SMOD7_PRIORITY) || defined(__DOXYGEN__)
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#define SPC5_PWM_SMOD7_PRIORITY 7
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#endif
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/**
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* @brief FlexPWM-1 peripheral configuration when started.
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* @note The default configuration is 1 (always run) in run mode and
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* 2 (only halt) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_PWM_FLEXPWM1_START_PCTL) || defined(__DOXYGEN__)
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#define SPC5_PWM_FLEXPWM1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
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SPC5_ME_PCTL_LP(2))
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#endif
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/**
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* @brief FlexPWM-1 peripheral configuration when stopped.
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* @note The default configuration is 0 (never run) in run mode and
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* 0 (never run) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_PWM_FLEXPWM1_STOP_PCTL) || defined(__DOXYGEN__)
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#define SPC5_PWM_FLEXPWM1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
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SPC5_ME_PCTL_LP(0))
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#endif
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/*===========================================================================*/
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/* Configuration checks. */
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/*===========================================================================*/
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#define SPC5_PWM_USE_FLEXPWM0 (SPC5_PWM_USE_SMOD0 || \
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SPC5_PWM_USE_SMOD1 || \
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SPC5_PWM_USE_SMOD2 || \
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SPC5_PWM_USE_SMOD3)
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#define SPC5_PWM_USE_FLEXPWM1 (SPC5_PWM_USE_SMOD4 || \
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SPC5_PWM_USE_SMOD5 || \
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SPC5_PWM_USE_SMOD6 || \
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SPC5_PWM_USE_SMOD7)
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#if !SPC5_HAS_FLEXPWM0 && SPC5_PWM_USE_FLEXPWM0
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#error "FlexPWM0 not present in the selected device"
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#endif
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#if !SPC5_HAS_FLEXPWM1 && SPC5_PWM_USE_FLEXPWM1
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#error "FlexPWM1 not present in the selected device"
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#endif
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#if !SPC5_PWM_USE_FLEXPWM0 && !SPC5_PWM_USE_FLEXPWM1
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#error "PWM driver activated but no PWM peripheral assigned"
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief PWM mode type.
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*/
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typedef uint32_t pwmmode_t;
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/**
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* @brief PWM channel type.
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*/
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typedef uint8_t pwmchannel_t;
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/**
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* @brief PWM counter type.
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*/
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typedef uint16_t pwmcnt_t;
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/**
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* @brief PWM driver channel configuration structure.
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*/
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typedef struct {
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/**
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* @brief Channel active logic level.
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*/
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pwmmode_t mode;
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/**
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* @brief Channel callback pointer.
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* @note This callback is invoked on the channel compare event. If set to
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* @p NULL then the callback is disabled.
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*/
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pwmcallback_t callback;
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/* End of the mandatory fields.*/
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} PWMChannelConfig;
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/**
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* @brief PWM driver configuration structure.
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*/
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typedef struct {
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/**
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* @brief Timer clock in Hz.
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* @note The low level can use assertions in order to catch invalid
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* frequency specifications.
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*/
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uint32_t frequency;
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/**
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* @brief PWM period in ticks.
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* @note The low level can use assertions in order to catch invalid
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* period specifications.
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*/
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pwmcnt_t period;
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/**
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* @brief Periodic callback pointer.
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* @note This callback is invoked on PWM counter reset. If set to
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* @p NULL then the callback is disabled.
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*/
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pwmcallback_t callback;
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/**
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* @brief Channels configurations.
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*/
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PWMChannelConfig channels[PWM_CHANNELS];
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/* End of the mandatory fields.*/
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/**
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* @brief PWM functional mode.
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*/
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pwmmode_t mode;
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} PWMConfig;
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/**
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* @brief Structure representing a PWM driver.
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*/
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struct PWMDriver {
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/**
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* @brief Driver state.
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*/
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pwmstate_t state;
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/**
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* @brief Current driver configuration data.
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*/
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const PWMConfig *config;
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/**
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* @brief Current PWM period in ticks.
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*/
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pwmcnt_t period;
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#if defined(PWM_DRIVER_EXT_FIELDS)
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PWM_DRIVER_EXT_FIELDS
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#endif
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/* End of the mandatory fields.*/
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/**
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* @Pointer to the volatile FlexPWM registers block.
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*/
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volatile struct spc5_flexpwm *flexpwmp;
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};
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#if SPC5_PWM_USE_SMOD0 && !defined(__DOXYGEN__)
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extern PWMDriver PWMD1;
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#endif
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#if SPC5_PWM_USE_SMOD1 && !defined(__DOXYGEN__)
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extern PWMDriver PWMD2;
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#endif
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#if SPC5_PWM_USE_SMOD2 && !defined(__DOXYGEN__)
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extern PWMDriver PWMD3;
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#endif
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#if SPC5_PWM_USE_SMOD3 && !defined(__DOXYGEN__)
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extern PWMDriver PWMD4;
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#endif
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#if SPC5_PWM_USE_SMOD4 && !defined(__DOXYGEN__)
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extern PWMDriver PWMD5;
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#endif
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#if SPC5_PWM_USE_SMOD5 && !defined(__DOXYGEN__)
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extern PWMDriver PWMD6;
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#endif
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#if SPC5_PWM_USE_SMOD6 && !defined(__DOXYGEN__)
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extern PWMDriver PWMD7;
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#endif
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#if SPC5_PWM_USE_SMOD7 && !defined(__DOXYGEN__)
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extern PWMDriver PWMD8;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void pwm_lld_init(void);
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void pwm_lld_start(PWMDriver *pwmp);
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void pwm_lld_stop(PWMDriver *pwmp);
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void pwm_lld_enable_channel(PWMDriver *pwmp,
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pwmchannel_t channel,
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pwmcnt_t width);
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void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel);
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void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_PWM */
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#endif /* _PWM_LLD_H_ */
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/** @} */
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