66 lines
2.0 KiB
C
66 lines
2.0 KiB
C
/**************************************************************************//**
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* $Id: system_LPC122x.h 6933 2011-03-23 19:02:11Z nxp28548 $
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*
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* @file system_LPC12xx.h
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* @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File
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* for the NXP LPC12xx Device Series
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* @version 1.1
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* @date $Date:: 2011-03-23#$
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* @author NXP MCU Team
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*
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* @note
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* Copyright (C) 2010 NXP Semiconductors(NXP). All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* products. This software is supplied "AS IS" without any warranties.
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* NXP Semiconductors assumes no responsibility or liability for the
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* use of the software, conveys no license or title under any patent,
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* copyright, or mask work right to the product. NXP Semiconductors
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* reserves the right to make changes in the software without
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* notification. NXP Semiconductors also make no representation or
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* warranty that such application will be suitable for the specified
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* use without further testing or modification.
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******************************************************************************/
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#ifndef __SYSTEM_LPC12xx_H
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#define __SYSTEM_LPC12xx_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
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extern uint32_t MainClock; /*!< Main Clock Frequency (Main Clock) */
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/**
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* Initialize the system
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*
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* @param none
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* @return none
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*
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* @brief Setup the microcontroller system.
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* Initialize the System and update the SystemCoreClock variable.
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*/
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extern void SystemInit (void);
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/**
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* Update SystemCoreClock variable
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*
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* @param none
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* @return none
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*
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* @brief Updates the SystemCoreClock with current core Clock
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* retrieved from cpu registers.
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*/
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extern void SystemCoreClockUpdate (void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __SYSTEM_LPC12xx_H */
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