83 lines
2.3 KiB
C
83 lines
2.3 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012,2013 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "ch.h"
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#include "hal.h"
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/**
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* @brief PAL setup.
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* @details Digital I/O ports static configuration as defined in @p board.h.
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*/
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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ROMCONST PALConfig pal_default_config =
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{
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{
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{VAL_GPIOAODR, 0, VAL_GPIOADDR, VAL_GPIOACR1, VAL_GPIOACR2},
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{VAL_GPIOBODR, 0, VAL_GPIOBDDR, VAL_GPIOBCR1, VAL_GPIOBCR2},
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{VAL_GPIOCODR, 0, VAL_GPIOCDDR, VAL_GPIOCCR1, VAL_GPIOCCR2},
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{VAL_GPIODODR, 0, VAL_GPIODDDR, VAL_GPIODCR1, VAL_GPIODCR2},
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{VAL_GPIOEODR, 0, VAL_GPIOEDDR, VAL_GPIOECR1, VAL_GPIOECR2},
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{VAL_GPIOFODR, 0, VAL_GPIOFDDR, VAL_GPIOFCR1, VAL_GPIOFCR2},
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{VAL_GPIOGODR, 0, VAL_GPIOGDDR, VAL_GPIOGCR1, VAL_GPIOGCR2},
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}
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};
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#endif
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/*
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* TIM 2 clock after the prescaler.
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*/
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#define TIM2_CLOCK (SYSCLK / 16)
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#define TIM2_ARR ((TIM2_CLOCK / CH_FREQUENCY) - 1)
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/*
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* TIM2 interrupt handler.
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*/
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CH_IRQ_HANDLER(13) {
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CH_IRQ_PROLOGUE();
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chSysLockFromIsr();
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chSysTimerHandlerI();
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chSysUnlockFromIsr();
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TIM2->SR1 = 0;
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CH_IRQ_EPILOGUE();
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}
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/*
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* Board-specific initialization code.
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*/
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void boardInit(void) {
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/*
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* TIM2 initialization as system tick.
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*/
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CLK->PCKENR1 |= CLK_PCKENR1_TIM2;
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TIM2->PSCR = 4; /* Prescaler divide by 2^4=16.*/
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TIM2->ARRH = (uint8_t)(TIM2_ARR >> 8);
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TIM2->ARRL = (uint8_t)(TIM2_ARR);
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TIM2->CNTRH = 0;
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TIM2->CNTRL = 0;
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TIM2->SR1 = 0;
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TIM2->IER = TIM2_IER_UIE;
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TIM2->CR1 = TIM2_CR1_CEN;
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}
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