265 lines
9.2 KiB
C
265 lines
9.2 KiB
C
/*
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ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file STM32/st_lld.c
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* @brief ST Driver subsystem low level driver code.
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*
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* @addtogroup ST
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* @{
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*/
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#include "hal.h"
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#if (OSAL_ST_MODE != OSAL_ST_MODE_NONE) || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
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#if (OSAL_ST_RESOLUTION == 32)
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#define ST_ARR_INIT 0xFFFFFFFF
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#else
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#define ST_ARR_INIT 0x0000FFFF
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#endif
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#if STM32_ST_USE_TIMER == 2
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#if (OSAL_ST_RESOLUTION == 32) && !STM32_TIM2_IS_32BITS
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#error "TIM2 is not a 32bits timer"
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#endif
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#define ST_HANDLER STM32_TIM2_HANDLER
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#define ST_NUMBER STM32_TIM2_NUMBER
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#define ST_CLOCK_SRC STM32_TIMCLK1
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#define ST_ENABLE_CLOCK() rccEnableTIM2(FALSE)
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#if defined(STM32F1XX)
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#define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM2_STOP
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#else
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#define ST_ENABLE_STOP() DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_TIM2_STOP
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#endif
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#elif STM32_ST_USE_TIMER == 3
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#if (OSAL_ST_RESOLUTION == 32) && !STM32_TIM3_IS_32BITS
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#error "TIM3 is not a 32bits timer"
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#endif
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#define ST_HANDLER STM32_TIM3_HANDLER
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#define ST_NUMBER STM32_TIM3_NUMBER
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#define ST_CLOCK_SRC STM32_TIMCLK1
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#define ST_ENABLE_CLOCK() rccEnableTIM3(FALSE)
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#if defined(STM32F1XX)
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#define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM3_STOP
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#else
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#define ST_ENABLE_STOP() DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_TIM3_STOP
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#endif
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#elif STM32_ST_USE_TIMER == 4
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#if (OSAL_ST_RESOLUTION == 32) && !STM32_TIM4_IS_32BITS
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#error "TIM4 is not a 32bits timer"
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#endif
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#define ST_HANDLER STM32_TIM4_HANDLER
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#define ST_NUMBER STM32_TIM4_NUMBER
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#define ST_CLOCK_SRC STM32_TIMCLK1
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#define ST_ENABLE_CLOCK() rccEnableTIM4(FALSE)
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#if defined(STM32F1XX)
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#define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM4_STOP
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#else
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#define ST_ENABLE_STOP() DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_TIM4_STOP
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#endif
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#elif STM32_ST_USE_TIMER == 5
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#if (OSAL_ST_RESOLUTION == 32) && !STM32_TIM5_IS_32BITS
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#error "TIM5 is not a 32bits timer"
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#endif
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#define ST_HANDLER STM32_TIM5_HANDLER
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#define ST_NUMBER STM32_TIM5_NUMBER
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#define ST_CLOCK_SRC STM32_TIMCLK1
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#define ST_ENABLE_CLOCK() rccEnableTIM5(FALSE)
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#if defined(STM32F1XX)
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#define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM5_STOP
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#else
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#define ST_ENABLE_STOP() DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_TIM5_STOP
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#endif
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#elif STM32_ST_USE_TIMER == 21
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#if (OSAL_ST_RESOLUTION == 32) && !STM32_TIM21_IS_32BITS
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#error "TIM21 is not a 32bits timer"
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#endif
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#define ST_HANDLER STM32_TIM21_HANDLER
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#define ST_NUMBER STM32_TIM21_NUMBER
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#define ST_CLOCK_SRC STM32_TIMCLK2
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#define ST_ENABLE_CLOCK() rccEnableTIM21(FALSE)
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#define ST_ENABLE_STOP() DBGMCU->APB1FZ |= DBGMCU_APB2_FZ_DBG_TIM21_STOP
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#elif STM32_ST_USE_TIMER == 22
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#if (OSAL_ST_RESOLUTION == 32) && !STM32_TIM22_IS_32BITS
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#error "TIM21 is not a 32bits timer"
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#endif
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#define ST_HANDLER STM32_TIM22_HANDLER
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#define ST_NUMBER STM32_TIM22_NUMBER
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#define ST_CLOCK_SRC STM32_TIMCLK2
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#define ST_ENABLE_CLOCK() rccEnableTIM22(FALSE)
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#define ST_ENABLE_STOP() DBGMCU->APB1FZ |= DBGMCU_APB2_FZ_DBG_TIM21_STOP
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#else
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#error "STM32_ST_USE_TIMER specifies an unsupported timer"
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#endif
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#if ST_CLOCK_SRC % OSAL_ST_FREQUENCY != 0
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#error "the selected ST frequency is not obtainable because integer rounding"
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#endif
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#if (ST_CLOCK_SRC / OSAL_ST_FREQUENCY) - 1 > 0xFFFF
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#error "the selected ST frequency is not obtainable because TIM timer prescaler limits"
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#endif
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#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */
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#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
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#if STM32_HCLK % OSAL_ST_FREQUENCY != 0
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#error "the selected ST frequency is not obtainable because integer rounding"
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#endif
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#if (STM32_HCLK / OSAL_ST_FREQUENCY) - 1 > 0xFFFFFF
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#error "the selected ST frequency is not obtainable because SysTick timer counter limits"
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#endif
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#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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#if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) || defined(__DOXYGEN__)
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/**
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* @brief System Timer vector.
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* @details This interrupt is used for system tick in periodic mode.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(SysTick_Handler) {
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OSAL_IRQ_PROLOGUE();
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osalSysLockFromISR();
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osalOsTimerHandlerI();
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osalSysUnlockFromISR();
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OSAL_IRQ_EPILOGUE();
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}
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#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */
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#if (OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING) || defined(__DOXYGEN__)
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/**
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* @brief TIM2 interrupt handler.
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* @details This interrupt is used for system tick in free running mode.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(ST_HANDLER) {
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OSAL_IRQ_PROLOGUE();
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/* Note, under rare circumstances an interrupt can remain latched even if
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the timer SR register has been cleared, in those cases the interrupt
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is simply ignored.*/
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if ((STM32_ST_TIM->SR & TIM_SR_CC1IF) != 0U) {
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STM32_ST_TIM->SR = 0U;
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osalSysLockFromISR();
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osalOsTimerHandlerI();
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osalSysUnlockFromISR();
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}
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OSAL_IRQ_EPILOGUE();
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}
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#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Low level ST driver initialization.
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*
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* @notapi
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*/
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void st_lld_init(void) {
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#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
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/* Free running counter mode.*/
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/* Enabling timer clock.*/
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ST_ENABLE_CLOCK();
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/* Enabling the stop mode during debug for this timer.*/
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ST_ENABLE_STOP();
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/* Initializing the counter in free running mode.*/
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STM32_ST_TIM->PSC = (ST_CLOCK_SRC / OSAL_ST_FREQUENCY) - 1;
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STM32_ST_TIM->ARR = ST_ARR_INIT;
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STM32_ST_TIM->CCMR1 = 0;
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STM32_ST_TIM->CCR[0] = 0;
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STM32_ST_TIM->DIER = 0;
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STM32_ST_TIM->CR2 = 0;
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STM32_ST_TIM->EGR = TIM_EGR_UG;
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STM32_ST_TIM->CR1 = TIM_CR1_CEN;
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/* IRQ enabled.*/
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nvicEnableVector(ST_NUMBER, STM32_ST_IRQ_PRIORITY);
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#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */
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#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
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/* Periodic systick mode, the Cortex-Mx internal systick timer is used
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in this mode.*/
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SysTick->LOAD = (STM32_HCLK / OSAL_ST_FREQUENCY) - 1;
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SysTick->VAL = 0;
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SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
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SysTick_CTRL_ENABLE_Msk |
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SysTick_CTRL_TICKINT_Msk;
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/* IRQ enabled.*/
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nvicSetSystemHandlerPriority(HANDLER_SYSTICK, STM32_ST_IRQ_PRIORITY);
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#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */
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}
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#endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */
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/** @} */
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