97 lines
3.3 KiB
C
97 lines
3.3 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* STM32 drivers configuration.
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* The following settings override the default settings present in
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* the various device driver implementation headers.
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* Note that the settings for each driver only have effect if the driver
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* is enabled in halconf.h.
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*
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* IRQ priorities:
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* 15 Lowest, priority level reserved for PENDSV.
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* 14...4 Normal IRQs priority levels (0x80 used by SYSTICK).
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* 3 Used by SVCALL, do not share.
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* 2...0 Fast interrupts, can preempt the kernel but cannot use it
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* directly.
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*
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* DMA priorities:
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* 0...3 Lowest...Highest.
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*/
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/*
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* HAL driver system settings.
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*/
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#define STM32_SYSCLK 72
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/*
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* ADC driver system settings.
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*/
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#define USE_STM32_ADC1 TRUE
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#define STM32_ADC1_DMA_PRIORITY 3
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#define STM32_ADC1_IRQ_PRIORITY CORTEX_PRIORITY(5)
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#define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt()
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/*
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* CAN driver system settings.
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*/
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#define USE_STM32_CAN1 TRUE
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#define STM32_CAN1_IRQ_PRIORITY CORTEX_PRIORITY(11)
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/*
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* PWM driver system settings.
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*/
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#define USE_STM32_PWM1 TRUE
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#define USE_STM32_PWM2 FALSE
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#define USE_STM32_PWM3 FALSE
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#define USE_STM32_PWM4 FALSE
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#define STM32_PWM1_IRQ_PRIORITY CORTEX_PRIORITY(7)
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#define STM32_PWM2_IRQ_PRIORITY CORTEX_PRIORITY(7)
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#define STM32_PWM3_IRQ_PRIORITY CORTEX_PRIORITY(7)
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#define STM32_PWM4_IRQ_PRIORITY CORTEX_PRIORITY(7)
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/*
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* SERIAL driver system settings.
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*/
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#define USE_STM32_USART1 FALSE
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#define USE_STM32_USART2 TRUE
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#define USE_STM32_USART3 FALSE
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#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
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#define USE_STM32_UART4 FALSE
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#define USE_STM32_UART5 FALSE
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#endif
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#define STM32_USART1_PRIORITY CORTEX_PRIORITY(12)
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#define STM32_USART2_PRIORITY CORTEX_PRIORITY(12)
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#define STM32_USART3_PRIORITY CORTEX_PRIORITY(12)
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#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
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#define STM32_UART4_PRIORITY CORTEX_PRIORITY(12)
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#define STM32_UART5_PRIORITY CORTEX_PRIORITY(12)
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#endif
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/*
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* SPI driver system settings.
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*/
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#define USE_STM32_SPI1 TRUE
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#define USE_STM32_SPI2 TRUE
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#define STM32_SPI1_DMA_PRIORITY 2
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#define STM32_SPI2_DMA_PRIORITY 2
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#define STM32_SPI1_IRQ_PRIORITY CORTEX_PRIORITY(10)
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#define STM32_SPI2_IRQ_PRIORITY CORTEX_PRIORITY(10)
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#define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt()
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