115 lines
3.4 KiB
C
115 lines
3.4 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file AT91SAM7X/mii_lld.c
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* @brief AT91SAM7X low level MII driver code
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* @addtogroup AT91SAM7X_MII
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* @{
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*/
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#include <ch.h>
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#include <mii.h>
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#include <mac.h>
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/**
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* @brief Low level MII driver initialization.
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*/
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void mii_lld_init(void) {
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}
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/**
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* @brief Resets a PHY device.
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*
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* @param[in] macp pointer to the @p MACDriver object
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*/
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void mii_lld_reset(MACDriver *macp) {
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(void)macp;
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/*
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* Disables the pullups on all the pins that are latched on reset by the PHY.
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*/
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AT91C_BASE_PIOB->PIO_PPUDR = PHY_LATCHED_PINS;
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#ifdef PIOB_PHY_PD_MASK
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/*
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* PHY power control.
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*/
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AT91C_BASE_PIOB->PIO_OER = PIOB_PHY_PD_MASK; // Becomes an output.
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AT91C_BASE_PIOB->PIO_PPUDR = PIOB_PHY_PD_MASK; // Default pullup disabled.
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#if (PHY_HARDWARE == PHY_DAVICOM_9161)
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AT91C_BASE_PIOB->PIO_CODR = PIOB_PHY_PD_MASK; // Output to low level.
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#else
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AT91C_BASE_PIOB->PIO_SODR = PIOB_PHY_PD_MASK; // Output to high level.
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#endif
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#endif // PIOB_PHY_PD_MASK
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/*
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* PHY reset by pulsing the NRST pin.
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*/
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AT91C_BASE_RSTC->RSTC_RMR = 0xA5000100;
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AT91C_BASE_RSTC->RSTC_RCR = 0xA5000000 | AT91C_RSTC_EXTRST;
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while (!(AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_NRSTL))
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;
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}
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/**
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* @brief Reads a PHY register through the MII interface.
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*
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* @param[in] macp pointer to the @p MACDriver object
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* @param addr the register address
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* @return The register value.
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*/
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phyreg_t mii_lld_get(MACDriver *macp, phyaddr_t addr) {
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(void)macp;
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AT91C_BASE_EMAC->EMAC_MAN = (0b01 << 30) | /* SOF */
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(0b10 << 28) | /* RW */
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(PHY_ADDRESS << 23) | /* PHYA */
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(addr << 18) | /* REGA */
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(0b10 << 16); /* CODE */
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while (!( AT91C_BASE_EMAC->EMAC_NSR & AT91C_EMAC_IDLE))
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;
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return (phyreg_t)(AT91C_BASE_EMAC->EMAC_MAN & 0xFFFF);
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}
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/**
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* @brief Writes a PHY register through the MII interface.
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*
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* @param[in] macp pointer to the @p MACDriver object
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* @param addr the register address
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* @param value the new register value
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*/
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void mii_lld_put(MACDriver *macp, phyaddr_t addr, phyreg_t value) {
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(void)macp;
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AT91C_BASE_EMAC->EMAC_MAN = (0b01 << 30) | /* SOF */
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(0b01 << 28) | /* RW */
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(PHY_ADDRESS << 23) | /* PHYA */
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(addr << 18) | /* REGA */
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(0b10 << 16) | /* CODE */
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value;
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while (!( AT91C_BASE_EMAC->EMAC_NSR & AT91C_EMAC_IDLE))
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;
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}
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/** @} */
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