371 lines
9.1 KiB
C
371 lines
9.1 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012,2013 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file STM32F37x/ext_lld_isr.c
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* @brief STM32F37x EXT subsystem low level driver ISR code.
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*
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* @addtogroup EXT
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* @{
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*/
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#include "ch.h"
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#include "hal.h"
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#if HAL_USE_EXT || defined(__DOXYGEN__)
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#include "ext_lld_isr.h"
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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#if !defined(STM32_DISABLE_EXTI0_HANDLER)
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/**
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* @brief EXTI[0] interrupt handler.
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*
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* @isr
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*/
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CH_IRQ_HANDLER(Vector58) {
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CH_IRQ_PROLOGUE();
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EXTI->PR = (1 << 0);
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EXTD1.config->channels[0].cb(&EXTD1, 0);
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CH_IRQ_EPILOGUE();
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}
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#endif
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#if !defined(STM32_DISABLE_EXTI1_HANDLER)
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/**
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* @brief EXTI[1] interrupt handler.
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*
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* @isr
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*/
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CH_IRQ_HANDLER(Vector5C) {
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CH_IRQ_PROLOGUE();
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EXTI->PR = (1 << 1);
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EXTD1.config->channels[1].cb(&EXTD1, 1);
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CH_IRQ_EPILOGUE();
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}
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#endif
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#if !defined(STM32_DISABLE_EXTI2_HANDLER)
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/**
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* @brief EXTI[2] interrupt handler.
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*
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* @isr
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*/
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CH_IRQ_HANDLER(Vector60) {
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CH_IRQ_PROLOGUE();
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EXTI->PR = (1 << 2);
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EXTD1.config->channels[2].cb(&EXTD1, 2);
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CH_IRQ_EPILOGUE();
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}
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#endif
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#if !defined(STM32_DISABLE_EXTI3_HANDLER)
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/**
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* @brief EXTI[3] interrupt handler.
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*
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* @isr
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*/
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CH_IRQ_HANDLER(Vector64) {
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CH_IRQ_PROLOGUE();
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EXTI->PR = (1 << 3);
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EXTD1.config->channels[3].cb(&EXTD1, 3);
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CH_IRQ_EPILOGUE();
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}
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#endif
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#if !defined(STM32_DISABLE_EXTI4_HANDLER)
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/**
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* @brief EXTI[4] interrupt handler.
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*
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* @isr
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*/
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CH_IRQ_HANDLER(Vector68) {
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CH_IRQ_PROLOGUE();
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EXTI->PR = (1 << 4);
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EXTD1.config->channels[4].cb(&EXTD1, 4);
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CH_IRQ_EPILOGUE();
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}
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#endif
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#if !defined(STM32_DISABLE_EXTI5_9_HANDLER)
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/**
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* @brief EXTI[5]...EXTI[9] interrupt handler.
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*
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* @isr
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*/
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CH_IRQ_HANDLER(Vector9C) {
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uint32_t pr;
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CH_IRQ_PROLOGUE();
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pr = EXTI->PR & ((1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) | (1 << 9));
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EXTI->PR = pr;
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if (pr & (1 << 5))
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EXTD1.config->channels[5].cb(&EXTD1, 5);
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if (pr & (1 << 6))
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EXTD1.config->channels[6].cb(&EXTD1, 6);
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if (pr & (1 << 7))
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EXTD1.config->channels[7].cb(&EXTD1, 7);
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if (pr & (1 << 8))
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EXTD1.config->channels[8].cb(&EXTD1, 8);
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if (pr & (1 << 9))
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EXTD1.config->channels[9].cb(&EXTD1, 9);
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CH_IRQ_EPILOGUE();
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}
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#endif
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#if !defined(STM32_DISABLE_EXTI10_15_HANDLER)
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/**
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* @brief EXTI[10]...EXTI[15] interrupt handler.
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*
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* @isr
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*/
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CH_IRQ_HANDLER(VectorE0) {
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uint32_t pr;
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CH_IRQ_PROLOGUE();
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pr = EXTI->PR & ((1 << 10) | (1 << 11) | (1 << 12) | (1 << 13) | (1 << 14) |
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(1 << 15));
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EXTI->PR = pr;
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if (pr & (1 << 10))
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EXTD1.config->channels[10].cb(&EXTD1, 10);
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if (pr & (1 << 11))
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EXTD1.config->channels[11].cb(&EXTD1, 11);
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if (pr & (1 << 12))
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EXTD1.config->channels[12].cb(&EXTD1, 12);
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if (pr & (1 << 13))
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EXTD1.config->channels[13].cb(&EXTD1, 13);
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if (pr & (1 << 14))
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EXTD1.config->channels[14].cb(&EXTD1, 14);
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if (pr & (1 << 15))
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EXTD1.config->channels[15].cb(&EXTD1, 15);
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CH_IRQ_EPILOGUE();
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}
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#endif
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#if !defined(STM32_DISABLE_EXTI16_HANDLER)
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/**
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* @brief EXTI[16] interrupt handler (PVD).
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*
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* @isr
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*/
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CH_IRQ_HANDLER(Vector44) {
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CH_IRQ_PROLOGUE();
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EXTI->PR = (1 << 16);
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EXTD1.config->channels[16].cb(&EXTD1, 16);
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CH_IRQ_EPILOGUE();
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}
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#endif
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#if !defined(STM32_DISABLE_EXTI17_HANDLER)
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/**
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* @brief EXTI[17] interrupt handler (RTC Alarm).
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*
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* @isr
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*/
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CH_IRQ_HANDLER(VectorE4) {
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CH_IRQ_PROLOGUE();
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EXTI->PR = (1 << 17);
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EXTD1.config->channels[17].cb(&EXTD1, 17);
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CH_IRQ_EPILOGUE();
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}
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#endif
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#if !defined(STM32_DISABLE_EXTI18_HANDLER)
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/**
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* @brief EXTI[18] interrupt handler (USB Wakeup).
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*
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* @isr
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*/
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CH_IRQ_HANDLER(VectorE8) {
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CH_IRQ_PROLOGUE();
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EXTI->PR = (1 << 18);
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EXTD1.config->channels[18].cb(&EXTD1, 18);
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CH_IRQ_EPILOGUE();
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}
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#endif
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#if !defined(STM32_DISABLE_EXTI19_HANDLER)
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/**
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* @brief EXTI[19] interrupt handler (Tamper TimeStamp).
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*
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* @isr
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*/
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CH_IRQ_HANDLER(Vector48) {
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CH_IRQ_PROLOGUE();
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EXTI->PR = (1 << 19);
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EXTD1.config->channels[19].cb(&EXTD1, 19);
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CH_IRQ_EPILOGUE();
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}
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#endif
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#if !defined(STM32_DISABLE_EXTI20_HANDLER)
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/**
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* @brief EXTI[20] interrupt handler (RTC Wakeup).
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*
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* @isr
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*/
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CH_IRQ_HANDLER(Vector4C) {
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CH_IRQ_PROLOGUE();
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EXTI->PR = (1 << 20);
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EXTD1.config->channels[20].cb(&EXTD1, 20);
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CH_IRQ_EPILOGUE();
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}
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#endif
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#if !defined(STM32_DISABLE_EXTI21_22_HANDLER)
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/**
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* @brief EXTI[21]..EXTI[22] interrupt handler (COMP1, COMP2).
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*
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* @isr
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*/
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CH_IRQ_HANDLER(Vector140) {
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uint32_t pr;
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CH_IRQ_PROLOGUE();
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pr = EXTI->PR & ((1 << 21) | (1 << 22));
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EXTI->PR = pr;
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if (pr & (1 << 21))
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EXTD1.config->channels[21].cb(&EXTD1, 21);
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if (pr & (1 << 22))
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EXTD1.config->channels[22].cb(&EXTD1, 22);
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CH_IRQ_EPILOGUE();
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}
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#endif
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Enables EXTI IRQ sources.
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*
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* @notapi
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*/
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void ext_lld_exti_irq_enable(void) {
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nvicEnableVector(EXTI0_IRQn,
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CORTEX_PRIORITY_MASK(STM32_EXT_EXTI0_IRQ_PRIORITY));
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nvicEnableVector(EXTI1_IRQn,
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CORTEX_PRIORITY_MASK(STM32_EXT_EXTI1_IRQ_PRIORITY));
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nvicEnableVector(EXTI2_TS_IRQn,
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CORTEX_PRIORITY_MASK(STM32_EXT_EXTI2_IRQ_PRIORITY));
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nvicEnableVector(EXTI3_IRQn,
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CORTEX_PRIORITY_MASK(STM32_EXT_EXTI3_IRQ_PRIORITY));
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nvicEnableVector(EXTI4_IRQn,
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CORTEX_PRIORITY_MASK(STM32_EXT_EXTI4_IRQ_PRIORITY));
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nvicEnableVector(EXTI9_5_IRQn,
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CORTEX_PRIORITY_MASK(STM32_EXT_EXTI5_9_IRQ_PRIORITY));
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nvicEnableVector(EXTI15_10_IRQn,
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CORTEX_PRIORITY_MASK(STM32_EXT_EXTI10_15_IRQ_PRIORITY));
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nvicEnableVector(PVD_IRQn,
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CORTEX_PRIORITY_MASK(STM32_EXT_EXTI16_IRQ_PRIORITY));
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nvicEnableVector(RTC_Alarm_IRQn,
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CORTEX_PRIORITY_MASK(STM32_EXT_EXTI17_IRQ_PRIORITY));
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nvicEnableVector(USBWakeUp_IRQn,
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CORTEX_PRIORITY_MASK(STM32_EXT_EXTI18_IRQ_PRIORITY));
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nvicEnableVector(TAMPER_STAMP_IRQn,
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CORTEX_PRIORITY_MASK(STM32_EXT_EXTI19_IRQ_PRIORITY));
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nvicEnableVector(RTC_WKUP_IRQn,
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CORTEX_PRIORITY_MASK(STM32_EXT_EXTI20_IRQ_PRIORITY));
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nvicEnableVector(COMP_IRQn,
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CORTEX_PRIORITY_MASK(STM32_EXT_EXTI21_22_IRQ_PRIORITY));
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}
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/**
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* @brief Disables EXTI IRQ sources.
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*
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* @notapi
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*/
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void ext_lld_exti_irq_disable(void) {
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nvicDisableVector(EXTI0_IRQn);
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nvicDisableVector(EXTI1_IRQn);
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nvicDisableVector(EXTI2_TS_IRQn);
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nvicDisableVector(EXTI3_IRQn);
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nvicDisableVector(EXTI4_IRQn);
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nvicDisableVector(EXTI9_5_IRQn);
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nvicDisableVector(EXTI15_10_IRQn);
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nvicDisableVector(PVD_IRQn);
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nvicDisableVector(RTC_Alarm_IRQn);
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nvicDisableVector(USBWakeUp_IRQn);
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nvicDisableVector(TAMPER_STAMP_IRQn);
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nvicDisableVector(RTC_WKUP_IRQn);
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nvicDisableVector(COMP_IRQn);
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}
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#endif /* HAL_USE_EXT */
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/** @} */
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