111 lines
2.7 KiB
C
111 lines
2.7 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <ch.h>
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#include "lpc214x.h"
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#include "lpc214x_SSP.h"
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#ifdef SSP_USE_MUTEX
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static Semaphore me;
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#endif
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void sspAcquireBus(void) {
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#ifdef SSP_USE_MUTEX
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chSemWait(&me);
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#endif
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IO0CLR = 1 << 20;
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}
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void sspReleaseBus(void) {
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IO0SET = 1 << 20;
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#ifdef SSP_USE_MUTEX
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chSemSignal(&me);
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#endif
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}
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/*
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* Synchronous SSP transfer.
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* @param in pointer to the incoming data buffer, if this parameter is set to
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* \p NULL then the incoming data is discarded.
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* @param out pointer to the outgoing data buffer, if this parameter is set to
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* \p NULL then 0xFF bytes will be output.
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* @param n the number of bytes to be transferred
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* @note The transfer is performed in a software loop and is not interrupt
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* driven for performance reasons, this function should be invoked
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* by a low priority thread in order to "play nice" with the
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* rest of the system. This kind of peripheral would really need a
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* dedicated DMA channel.
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*/
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void sspRW(BYTE8 *in, BYTE8 *out, t_size n) {
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int icnt, ocnt;
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SSP *ssp = SSPBase;
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icnt = ocnt = n;
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while (icnt) {
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if (ssp->SSP_SR & SR_RNE) {
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if (in)
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*in++ = ssp->SSP_DR;
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else
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ssp->SSP_DR;
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icnt--;
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continue; /* Priority over transmission. */
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}
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if (ocnt && (ssp->SSP_SR & SR_TNF)) {
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if (out)
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ssp->SSP_DR = *out++;
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else
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ssp->SSP_DR = 0xFF;
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ocnt--;
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}
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}
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}
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/*
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* SSP setup.
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*/
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void SetSSP(int cpsr, int cr0, int cr1) {
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SSP *ssp = SSPBase;
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ssp->SSP_CR1 = 0;
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ssp->SSP_CR0 = cr0;
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ssp->SSP_CPSR = cpsr;
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ssp->SSP_CR1 = cr1 | CR1_SSE;
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}
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/*
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* SSP subsystem initialization.
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*/
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void InitSSP(void) {
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/* Enables the SPI1 clock */
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PCONP = (PCONP & PCALL) | PCSPI1;
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/* Clock = PCLK / 2 (fastest). */
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SetSSP(2, CR0_DSS8BIT | CR0_FRFSPI | CR0_CLOCKRATE(0), 0);
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#ifdef SSP_USE_MUTEX
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chSemInit(&me, 1);
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#endif
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}
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