1304 lines
83 KiB
C
1304 lines
83 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/*
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* Setup for WaveShare, Open 207I/407I-C board.
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*/
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/*
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* Board identifier.
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*
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* http://www.wvshare.com/product/Open407I-C-Package-B.htm
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*/
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#define BOARD_ST_STM32F4_OPEN_207I
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#define BOARD_NAME "WaveShare Open STM32F4 207I-C / 407I-C"
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/*
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* Board oscillators-related settings.
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* NOTE: LSE not fitted.
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*/
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#if !defined(STM32_LSECLK)
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#define STM32_LSECLK 0
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#endif
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#if !defined(STM32_HSECLK)
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#define STM32_HSECLK 8000000
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#endif
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/*
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* Board voltages.
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* Required for performance limits calculation.
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*/
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#define STM32_VDD 300
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/*
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* MCU type as defined in the ST header file stm32f4xx.h.
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*/
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#define STM32F4XX
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/*
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* IO pins assignments.
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*/
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#define GPIOA_WAKE_BUTTON 0
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#define GPIOA_PIN1 1
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#define GPIOA_PIN2 2
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#define GPIOA_OTG_HS_ULPI_D0 3
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#define GPIOA_LRCK 4
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#define GPIOA_OTG_HS_ULPI_CLKOUT 5
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#define GPIOA_SDO 6
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#define GPIOA_SDI 7
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#define GPIOA_PIN8 8
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#define GPIOA_VBUS_FS 9
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#define GPIOA_OTG_FS_ID 10
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#define GPIOA_OTG_FS_DM 11
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#define GPIOA_OTG_FS_DP 12
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#define GPIOA_SWDIO 13
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#define GPIOA_SWCLK 14
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#define GPIOA_PIN15 15
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#define GPIOB_OTG_HS_ULPI_D1 0
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#define GPIOB_OTG_HS_ULPI_D2 1
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#define GPIOB_PIN2 2
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#define GPIOB_SWO 3
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#define GPIOB_PIN4 4
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#define GPIOB_OTG_HS_ULPI_D7 5
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#define GPIOB_SCL 6
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#define GPIOB_PIN7 7
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#define GPIOB_PIN8 8
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#define GPIOB_SDA 9
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#define GPIOB_OTG_HS_ULPI_D3 10
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#define GPIOB_OTG_HS_ULPI_D4 11
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#define GPIOB_OTG_HS_ULPI_D5 12
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#define GPIOB_OTG_HS_ULPI_D6 13
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#define GPIOB_PIN14 14
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#define GPIOB_PIN15 15
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#define GPIOC_OTG_HS_ULPI_STP 0
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#define GPIOC_PIN1 1
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#define GPIOC_PIN2 2
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#define GPIOC_PDM_OUT 3
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#define GPIOC_PIN4 4
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#define GPIOC_PIN5 5
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#define GPIOC_PIN6 6
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#define GPIOC_MCLK 7
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#define GPIOC_SDIO_D0 8
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#define GPIOC_SDIO_D1 9
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#define GPIOC_SDIO_D2 10
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#define GPIOC_SDIO_D3 11
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#define GPIOC_SDIO_CLK 12
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#define GPIOC_SDIO_POWER 13
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#define GPIOC_PIN14 14
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#define GPIOC_PIN15 15
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#define GPIOD_PIN0 0
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#define GPIOD_PIN1 1
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#define GPIOD_SDIO_CMD 2
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#define GPIOD_PIN3 3
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#define GPIOD_RESET 4
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#define GPIOD_OVER_CURRENT 5
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#define GPIOD_PIN6 6
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#define GPIOD_PIN7 7
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#define GPIOD_PIN8 8
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#define GPIOD_PIN9 9
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#define GPIOD_PIN10 10
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#define GPIOD_PIN11 11
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#define GPIOD_PIN12 12
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#define GPIOD_PIN13 13
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#define GPIOD_PIN14 14
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#define GPIOD_PIN15 15
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#define GPIOE_INT1 0
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#define GPIOE_INT2 1
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#define GPIOE_JOYSTICK_A 2
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#define GPIOE_JOYSTICK_B 3
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#define GPIOE_JOYSTICK_C 4
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#define GPIOE_JOYSTICK_D 5
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#define GPIOE_JOYSTICK_CTR 6
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#define GPIOE_PIN7 7
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#define GPIOE_PIN8 8
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#define GPIOE_PIN9 9
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#define GPIOE_PIN10 10
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#define GPIOE_PIN11 11
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#define GPIOE_PIN12 12
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#define GPIOE_PIN13 13
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#define GPIOE_PIN14 14
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#define GPIOE_PIN15 15
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#define GPIOF_PIN0 0
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#define GPIOF_PIN1 1
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#define GPIOF_PIN2 2
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#define GPIOF_PIN3 3
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#define GPIOF_PIN4 4
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#define GPIOF_PIN5 5
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#define GPIOF_PIN6 6
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#define GPIOF_PIN7 7
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#define GPIOF_PIN8 8
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#define GPIOF_PIN9 9
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#define GPIOF_PIN10 10
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#define GPIOF_PIN11 11
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#define GPIOF_PIN12 12
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#define GPIOF_PIN13 13
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#define GPIOF_PIN14 14
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#define GPIOF_PIN15 15
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#define GPIOG_PIN0 0
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#define GPIOG_PIN1 1
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#define GPIOG_PIN2 2
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#define GPIOG_PIN3 3
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#define GPIOG_PIN4 4
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#define GPIOG_PIN5 5
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#define GPIOG_PIN6 6
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#define GPIOG_PIN7 7
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#define GPIOG_PIN8 8
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#define GPIOG_PIN9 9
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#define GPIOG_PIN10 10
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#define GPIOG_PIN11 11
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#define GPIOG_PIN12 12
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#define GPIOG_PIN13 13
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#define GPIOG_PIN14 14
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#define GPIOG_PIN15 15
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#define GPIOH_OSC_IN 0
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#define GPIOH_OSC_OUT 1
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#define GPIOH_LED1 2
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#define GPIOH_LED2 3
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#define GPIOH_OTG_HS_ULPI_NXT 4
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#define GPIOH_PIN5 5
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#define GPIOH_PIN6 6
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#define GPIOH_PIN7 7
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#define GPIOH_PIN8 8
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#define GPIOH_PIN9 9
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#define GPIOH_PIN10 10
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#define GPIOH_PIN11 11
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#define GPIOH_PIN12 12
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#define GPIOH_PIN13 13
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#define GPIOH_PIN14 14
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#define GPIOH_PIN15 15
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#define GPIOI_PIN0 0
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#define GPIOI_PIN1 1
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#define GPIOI_PIN2 2
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#define GPIOI_PIN3 3
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#define GPIOI_PIN4 4
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#define GPIOI_PIN5 5
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#define GPIOI_PIN6 6
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#define GPIOI_PIN7 7
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#define GPIOI_LED3 8
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#define GPIOI_PIN9 9
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#define GPIOI_LED4 10
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#define GPIOI_OTG_HS_ULPI_DIR 11
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#define GPIOI_PIN12 12
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#define GPIOI_PIN13 13
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#define GPIOI_PIN14 14
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#define GPIOI_PIN15 15
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/*
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* I/O ports initial setup, this configuration is established soon after reset
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* in the initialization code.
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* Please refer to the STM32 Reference Manual for details.
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*/
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#define PIN_MODE_INPUT(n) (0U << ((n) * 2))
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#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2))
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#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2))
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#define PIN_MODE_ANALOG(n) (3U << ((n) * 2))
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#define PIN_ODR_LOW(n) (0U << (n))
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#define PIN_ODR_HIGH(n) (1U << (n))
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#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
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#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
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#define PIN_OSPEED_2M(n) (0U << ((n) * 2))
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#define PIN_OSPEED_25M(n) (1U << ((n) * 2))
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#define PIN_OSPEED_50M(n) (2U << ((n) * 2))
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#define PIN_OSPEED_100M(n) (3U << ((n) * 2))
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#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2))
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#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2))
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#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2))
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#define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4))
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/*
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* GPIOA setup:
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*
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* PA0 - BUTTON (input floating).
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* PA1 - PIN1 (input pullup).
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* PA2 - PIN2 (input pullup).
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* PA3 - OTG_HS_ULPI_D0 (alternate 10)
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* PA4 - LRCK (alternate 6).
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* PA5 - OTG_HS_ULPI_CLKOUT (alternate 10)
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* PA6 - SDO (alternate 5).
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* PA7 - SDI (alternate 5).
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* PA8 - PIN8 (input pullup).
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* PA9 - VBUS_FS (input floating).
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* PA10 - OTG_FS_ID (alternate 10).
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* PA11 - OTG_FS_DM (alternate 10).
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* PA12 - OTG_FS_DP (alternate 10).
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* PA13 - SWDIO (alternate 0).
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* PA14 - SWCLK (alternate 0).
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* PA15 - PIN15 (input pullup).
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*/
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#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_WAKE_BUTTON) | \
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PIN_MODE_INPUT(GPIOA_PIN1) | \
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PIN_MODE_INPUT(GPIOA_PIN2) | \
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PIN_MODE_ALTERNATE(GPIOA_OTG_HS_ULPI_D0) | \
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PIN_MODE_ALTERNATE(GPIOA_LRCK) | \
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PIN_MODE_ALTERNATE(GPIOA_OTG_HS_ULPI_CLKOUT) | \
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PIN_MODE_ALTERNATE(GPIOA_SDO) | \
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PIN_MODE_ALTERNATE(GPIOA_SDI) | \
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PIN_MODE_INPUT(GPIOA_PIN8) | \
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PIN_MODE_INPUT(GPIOA_VBUS_FS) | \
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PIN_MODE_ALTERNATE(GPIOA_OTG_FS_ID) | \
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PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \
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PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \
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PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
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PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
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PIN_MODE_INPUT(GPIOA_PIN15))
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#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_WAKE_BUTTON) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \
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PIN_OTYPE_PUSHPULL(GPIOA_OTG_HS_ULPI_D0) | \
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PIN_OTYPE_PUSHPULL(GPIOA_LRCK) | \
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PIN_OTYPE_PUSHPULL(GPIOA_OTG_HS_ULPI_CLKOUT) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SDO) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SDI) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
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PIN_OTYPE_PUSHPULL(GPIOA_VBUS_FS) | \
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PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_ID) | \
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PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \
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PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
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#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_100M(GPIOA_WAKE_BUTTON) | \
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PIN_OSPEED_100M(GPIOA_PIN1) | \
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PIN_OSPEED_100M(GPIOA_PIN2) | \
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PIN_OSPEED_100M(GPIOA_OTG_HS_ULPI_D0) | \
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PIN_OSPEED_100M(GPIOA_LRCK) | \
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PIN_OSPEED_100M(GPIOA_OTG_HS_ULPI_CLKOUT) | \
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PIN_OSPEED_50M(GPIOA_SDO) | \
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PIN_OSPEED_50M(GPIOA_SDI) | \
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PIN_OSPEED_100M(GPIOA_PIN8) | \
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PIN_OSPEED_100M(GPIOA_VBUS_FS) | \
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PIN_OSPEED_100M(GPIOA_OTG_FS_ID) | \
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PIN_OSPEED_100M(GPIOA_OTG_FS_DM) | \
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PIN_OSPEED_100M(GPIOA_OTG_FS_DP) | \
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PIN_OSPEED_100M(GPIOA_SWDIO) | \
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PIN_OSPEED_100M(GPIOA_SWCLK) | \
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PIN_OSPEED_100M(GPIOA_PIN15))
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#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_WAKE_BUTTON) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN1) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN2) | \
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PIN_PUPDR_FLOATING(GPIOA_OTG_HS_ULPI_D0) | \
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PIN_PUPDR_FLOATING(GPIOA_LRCK) | \
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PIN_PUPDR_FLOATING(GPIOA_OTG_HS_ULPI_CLKOUT) | \
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PIN_PUPDR_FLOATING(GPIOA_SDO) | \
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PIN_PUPDR_FLOATING(GPIOA_SDI) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
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PIN_PUPDR_FLOATING(GPIOA_VBUS_FS) | \
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PIN_PUPDR_FLOATING(GPIOA_OTG_FS_ID) | \
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PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \
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PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \
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PIN_PUPDR_FLOATING(GPIOA_SWDIO) | \
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PIN_PUPDR_FLOATING(GPIOA_SWCLK) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN15))
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#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_WAKE_BUTTON) | \
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PIN_ODR_HIGH(GPIOA_PIN1) | \
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PIN_ODR_HIGH(GPIOA_PIN2) | \
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PIN_ODR_HIGH(GPIOA_OTG_HS_ULPI_D0) | \
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PIN_ODR_HIGH(GPIOA_LRCK) | \
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PIN_ODR_HIGH(GPIOA_OTG_HS_ULPI_CLKOUT) | \
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PIN_ODR_HIGH(GPIOA_SDO) | \
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PIN_ODR_HIGH(GPIOA_SDI) | \
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PIN_ODR_HIGH(GPIOA_PIN8) | \
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PIN_ODR_HIGH(GPIOA_VBUS_FS) | \
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PIN_ODR_HIGH(GPIOA_OTG_FS_ID) | \
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PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \
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PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \
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PIN_ODR_HIGH(GPIOA_SWDIO) | \
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PIN_ODR_HIGH(GPIOA_SWCLK) | \
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PIN_ODR_HIGH(GPIOA_PIN15))
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#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_WAKE_BUTTON, 0) | \
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PIN_AFIO_AF(GPIOA_PIN1, 0) | \
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PIN_AFIO_AF(GPIOA_PIN2, 0) | \
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PIN_AFIO_AF(GPIOA_OTG_HS_ULPI_D0, 10) | \
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PIN_AFIO_AF(GPIOA_LRCK, 6) | \
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PIN_AFIO_AF(GPIOA_OTG_HS_ULPI_CLKOUT, 10) | \
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PIN_AFIO_AF(GPIOA_SDO, 5) | \
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PIN_AFIO_AF(GPIOA_SDI, 5))
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#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \
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PIN_AFIO_AF(GPIOA_VBUS_FS, 0) | \
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PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10) | \
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PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \
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PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \
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PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
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PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
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PIN_AFIO_AF(GPIOA_PIN15, 0))
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/*
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* GPIOB setup:
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*
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* PB0 - OTG_HS_ULPI_D1 (alternate 10).
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* PB1 - OTG_HS_ULPI_D2 (alternate 10).
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* PB2 - PIN2 (input pullup).
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* PB3 - SWO (alternate 0).
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* PB4 - PIN4 (input pullup).
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* PB5 - OTG_HS_ULPI_D7 (alternate 10).
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* PB6 - SCL (alternate 4).
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* PB7 - PIN7 (input pullup).
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* PB8 - PIN8 (input pullup).
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* PB9 - SDA (alternate 4).
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* PB10 - OTG_HS_ULPI_D3 (alternate 10).
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* PB11 - OTG_HS_ULPI_D4 (alternate 10).
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* PB12 - OTG_HS_ULPI_D5 (alternate 10).
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* PB13 - OTG_HS_ULPI_D6 (alternate 10).
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* PB14 - PIN14 (input pullup).
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* PB15 - PIN15 (input pullup).
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*/
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#define VAL_GPIOB_MODER (PIN_MODE_ALTERNATE(GPIOB_OTG_HS_ULPI_D1) | \
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PIN_MODE_ALTERNATE(GPIOB_OTG_HS_ULPI_D2) | \
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PIN_MODE_INPUT(GPIOB_PIN2) | \
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PIN_MODE_ALTERNATE(GPIOB_SWO) | \
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PIN_MODE_INPUT(GPIOB_PIN4) | \
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PIN_MODE_ALTERNATE(GPIOB_OTG_HS_ULPI_D7) | \
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PIN_MODE_ALTERNATE(GPIOB_SCL) | \
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PIN_MODE_INPUT(GPIOB_PIN7) | \
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PIN_MODE_INPUT(GPIOB_PIN8) | \
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PIN_MODE_ALTERNATE(GPIOB_SDA) | \
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PIN_MODE_ALTERNATE(GPIOB_OTG_HS_ULPI_D3) | \
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PIN_MODE_ALTERNATE(GPIOB_OTG_HS_ULPI_D4) | \
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PIN_MODE_ALTERNATE(GPIOB_OTG_HS_ULPI_D5) | \
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PIN_MODE_ALTERNATE(GPIOB_OTG_HS_ULPI_D6) | \
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PIN_MODE_INPUT(GPIOB_PIN14) | \
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PIN_MODE_INPUT(GPIOB_PIN15))
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#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_OTG_HS_ULPI_D1) | \
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PIN_OTYPE_PUSHPULL(GPIOB_OTG_HS_ULPI_D2) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
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PIN_OTYPE_PUSHPULL(GPIOB_SWO) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
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PIN_OTYPE_PUSHPULL(GPIOB_OTG_HS_ULPI_D7) | \
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PIN_OTYPE_OPENDRAIN(GPIOB_SCL) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
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PIN_OTYPE_OPENDRAIN(GPIOB_SDA) | \
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PIN_OTYPE_PUSHPULL(GPIOB_OTG_HS_ULPI_D3) | \
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|
PIN_OTYPE_PUSHPULL(GPIOB_OTG_HS_ULPI_D4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_OTG_HS_ULPI_D5) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_OTG_HS_ULPI_D6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
|
|
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_100M(GPIOB_OTG_HS_ULPI_D1) | \
|
|
PIN_OSPEED_100M(GPIOB_OTG_HS_ULPI_D2) | \
|
|
PIN_OSPEED_100M(GPIOB_PIN2) | \
|
|
PIN_OSPEED_100M(GPIOB_SWO) | \
|
|
PIN_OSPEED_100M(GPIOB_PIN4) | \
|
|
PIN_OSPEED_100M(GPIOB_OTG_HS_ULPI_D7) | \
|
|
PIN_OSPEED_100M(GPIOB_SCL) | \
|
|
PIN_OSPEED_100M(GPIOB_PIN7) | \
|
|
PIN_OSPEED_100M(GPIOB_PIN8) | \
|
|
PIN_OSPEED_100M(GPIOB_SDA) | \
|
|
PIN_OSPEED_100M(GPIOB_OTG_HS_ULPI_D3) | \
|
|
PIN_OSPEED_100M(GPIOB_OTG_HS_ULPI_D4) | \
|
|
PIN_OSPEED_100M(GPIOB_OTG_HS_ULPI_D5) | \
|
|
PIN_OSPEED_100M(GPIOB_OTG_HS_ULPI_D6) | \
|
|
PIN_OSPEED_100M(GPIOB_PIN14) | \
|
|
PIN_OSPEED_100M(GPIOB_PIN15))
|
|
#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_OTG_HS_ULPI_D1) | \
|
|
PIN_PUPDR_FLOATING(GPIOB_OTG_HS_ULPI_D2) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
|
|
PIN_PUPDR_FLOATING(GPIOB_SWO) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
|
|
PIN_PUPDR_FLOATING(GPIOB_OTG_HS_ULPI_D7) | \
|
|
PIN_PUPDR_FLOATING(GPIOB_SCL) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN7) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
|
|
PIN_PUPDR_FLOATING(GPIOB_SDA) | \
|
|
PIN_PUPDR_FLOATING(GPIOB_OTG_HS_ULPI_D3) | \
|
|
PIN_PUPDR_FLOATING(GPIOB_OTG_HS_ULPI_D4) | \
|
|
PIN_PUPDR_FLOATING(GPIOB_OTG_HS_ULPI_D5) | \
|
|
PIN_PUPDR_FLOATING(GPIOB_OTG_HS_ULPI_D6) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN15))
|
|
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_OTG_HS_ULPI_D1) | \
|
|
PIN_ODR_HIGH(GPIOB_OTG_HS_ULPI_D2) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOB_SWO) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOB_OTG_HS_ULPI_D7) | \
|
|
PIN_ODR_HIGH(GPIOB_SCL) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOB_SDA) | \
|
|
PIN_ODR_HIGH(GPIOB_OTG_HS_ULPI_D3) | \
|
|
PIN_ODR_HIGH(GPIOB_OTG_HS_ULPI_D4) | \
|
|
PIN_ODR_HIGH(GPIOB_OTG_HS_ULPI_D5) | \
|
|
PIN_ODR_HIGH(GPIOB_OTG_HS_ULPI_D6) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN15))
|
|
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_OTG_HS_ULPI_D1, 10) | \
|
|
PIN_AFIO_AF(GPIOB_OTG_HS_ULPI_D2, 10) | \
|
|
PIN_AFIO_AF(GPIOB_PIN2, 0) | \
|
|
PIN_AFIO_AF(GPIOB_SWO, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN4, 0) | \
|
|
PIN_AFIO_AF(GPIOB_OTG_HS_ULPI_D7, 10) | \
|
|
PIN_AFIO_AF(GPIOB_SCL, 4) | \
|
|
PIN_AFIO_AF(GPIOB_PIN7, 0))
|
|
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \
|
|
PIN_AFIO_AF(GPIOB_SDA, 4) | \
|
|
PIN_AFIO_AF(GPIOB_OTG_HS_ULPI_D3, 10) | \
|
|
PIN_AFIO_AF(GPIOB_OTG_HS_ULPI_D4, 10) | \
|
|
PIN_AFIO_AF(GPIOB_OTG_HS_ULPI_D5, 10) | \
|
|
PIN_AFIO_AF(GPIOB_OTG_HS_ULPI_D6, 10) | \
|
|
PIN_AFIO_AF(GPIOB_PIN14, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN15, 0))
|
|
|
|
/*
|
|
* GPIOC setup:
|
|
*
|
|
* PC0 - OTG_HS_ULPI_ST (alternate 10).
|
|
* PC1 - PIN1 (input pullup).
|
|
* PC2 - PIN2 (input pullup).
|
|
* PC3 - PDM_OUT (input pullup).
|
|
* PC4 - PIN4 (input pullup).
|
|
* PC5 - PIN5 (input pullup).
|
|
* PC6 - PIN6 (input pullup).
|
|
* PC7 - MCLK (alternate 6).
|
|
* PC8 - SDIO_D0 (alternate 12).
|
|
* PC9 - SDIO_D1 (alternate 12).
|
|
* PC10 - SDIO_D2 (alternate 12).
|
|
* PC11 - SDIO_D3 (alternate 12).
|
|
* PC12 - SDIO_CLK (alternate 12).
|
|
* PC13 - SDIO_POWER (output pushpull).
|
|
* PC14 - PIN14 (input pullup).
|
|
* PC15 - PIN15 (input pullup).
|
|
*/
|
|
#define VAL_GPIOC_MODER (PIN_MODE_ALTERNATE(GPIOC_OTG_HS_ULPI_STP) |\
|
|
PIN_MODE_INPUT(GPIOC_PIN1) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN2) | \
|
|
PIN_MODE_INPUT(GPIOC_PDM_OUT) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN4) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN5) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN6) | \
|
|
PIN_MODE_ALTERNATE(GPIOC_MCLK) | \
|
|
PIN_MODE_ALTERNATE(GPIOC_SDIO_D0) | \
|
|
PIN_MODE_ALTERNATE(GPIOC_SDIO_D1) | \
|
|
PIN_MODE_ALTERNATE(GPIOC_SDIO_D2) | \
|
|
PIN_MODE_ALTERNATE(GPIOC_SDIO_D3) | \
|
|
PIN_MODE_ALTERNATE(GPIOC_SDIO_CLK) | \
|
|
PIN_MODE_OUTPUT(GPIOC_SDIO_POWER) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN15))
|
|
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_OTG_HS_ULPI_STP) |\
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PDM_OUT) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_MCLK) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_SDIO_D0) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_SDIO_D1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_SDIO_D2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_SDIO_D3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_SDIO_CLK) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_SDIO_POWER) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
|
|
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_100M(GPIOC_OTG_HS_ULPI_STP) |\
|
|
PIN_OSPEED_100M(GPIOC_PIN1) | \
|
|
PIN_OSPEED_100M(GPIOC_PIN2) | \
|
|
PIN_OSPEED_100M(GPIOC_PDM_OUT) | \
|
|
PIN_OSPEED_100M(GPIOC_PIN4) | \
|
|
PIN_OSPEED_100M(GPIOC_PIN5) | \
|
|
PIN_OSPEED_100M(GPIOC_PIN6) | \
|
|
PIN_OSPEED_100M(GPIOC_MCLK) | \
|
|
PIN_OSPEED_100M(GPIOC_SDIO_D0) | \
|
|
PIN_OSPEED_100M(GPIOC_SDIO_D1) | \
|
|
PIN_OSPEED_100M(GPIOC_SDIO_D2) | \
|
|
PIN_OSPEED_100M(GPIOC_SDIO_D3) | \
|
|
PIN_OSPEED_100M(GPIOC_SDIO_CLK) | \
|
|
PIN_OSPEED_100M(GPIOC_SDIO_POWER) | \
|
|
PIN_OSPEED_100M(GPIOC_PIN14) | \
|
|
PIN_OSPEED_100M(GPIOC_PIN15))
|
|
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_OTG_HS_ULPI_STP) |\
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PDM_OUT) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
|
|
PIN_PUPDR_FLOATING(GPIOC_MCLK) | \
|
|
PIN_PUPDR_FLOATING(GPIOC_SDIO_D0) | \
|
|
PIN_PUPDR_FLOATING(GPIOC_SDIO_D1) | \
|
|
PIN_PUPDR_FLOATING(GPIOC_SDIO_D2) | \
|
|
PIN_PUPDR_FLOATING(GPIOC_SDIO_D3) | \
|
|
PIN_PUPDR_FLOATING(GPIOC_SDIO_CLK) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_SDIO_POWER) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN14) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN15))
|
|
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_OTG_HS_ULPI_STP) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN1) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOC_PDM_OUT) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOC_MCLK) | \
|
|
PIN_ODR_HIGH(GPIOC_SDIO_D0) | \
|
|
PIN_ODR_HIGH(GPIOC_SDIO_D1) | \
|
|
PIN_ODR_HIGH(GPIOC_SDIO_D2) | \
|
|
PIN_ODR_HIGH(GPIOC_SDIO_D3) | \
|
|
PIN_ODR_HIGH(GPIOC_SDIO_CLK) | \
|
|
PIN_ODR_HIGH(GPIOC_SDIO_POWER) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN15))
|
|
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_OTG_HS_ULPI_STP, 10) |\
|
|
PIN_AFIO_AF(GPIOC_PIN1, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN2, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PDM_OUT, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN4, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN5, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN6, 0) | \
|
|
PIN_AFIO_AF(GPIOC_MCLK, 6))
|
|
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_SDIO_D0, 12) | \
|
|
PIN_AFIO_AF(GPIOC_SDIO_D1, 12) | \
|
|
PIN_AFIO_AF(GPIOC_SDIO_D2, 12) | \
|
|
PIN_AFIO_AF(GPIOC_SDIO_D3, 12) | \
|
|
PIN_AFIO_AF(GPIOC_SDIO_CLK, 12) | \
|
|
PIN_AFIO_AF(GPIOC_SDIO_POWER, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN14, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN15, 0))
|
|
|
|
/*
|
|
* GPIOD setup:
|
|
*
|
|
* PD0 - PIN0 (input pullup).
|
|
* PD1 - PIN1 (input pullup).
|
|
* PD2 - SDIO_CMD (alternate 12).
|
|
* PD3 - PIN3 (input pullup).
|
|
* PD4 - RESET (output pushpull maximum).
|
|
* PD5 - OVER_CURRENT (input floating).
|
|
* PD6 - PIN6 (input pullup).
|
|
* PD7 - PIN7 (input pullup).
|
|
* PD8 - PIN8 (input pullup).
|
|
* PD9 - PIN9 (input pullup).
|
|
* PD10 - PIN10 (input pullup).
|
|
* PD11 - PIN11 (input floating).
|
|
* PD12 - PIN12 (output pushpull maximum).
|
|
* PD13 - PIN13 (input pullup).
|
|
* PD14 - LED5 (output pushpull maximum).
|
|
* PD15 - LED6 (output pushpull maximum).
|
|
*/
|
|
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN1) | \
|
|
PIN_MODE_ALTERNATE(GPIOD_SDIO_CMD) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN3) | \
|
|
PIN_MODE_OUTPUT(GPIOD_RESET) | \
|
|
PIN_MODE_INPUT(GPIOD_OVER_CURRENT) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN6) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN7) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN8) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN10) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN11) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN12) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN13) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN15))
|
|
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_SDIO_CMD) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_RESET) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_OVER_CURRENT) |\
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
|
|
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_100M(GPIOD_PIN0) | \
|
|
PIN_OSPEED_100M(GPIOD_PIN1) | \
|
|
PIN_OSPEED_100M(GPIOD_SDIO_CMD) | \
|
|
PIN_OSPEED_100M(GPIOD_PIN3) | \
|
|
PIN_OSPEED_100M(GPIOD_RESET) | \
|
|
PIN_OSPEED_100M(GPIOD_OVER_CURRENT) | \
|
|
PIN_OSPEED_100M(GPIOD_PIN6) | \
|
|
PIN_OSPEED_100M(GPIOD_PIN7) | \
|
|
PIN_OSPEED_100M(GPIOD_PIN8) | \
|
|
PIN_OSPEED_100M(GPIOD_PIN9) | \
|
|
PIN_OSPEED_100M(GPIOD_PIN10) | \
|
|
PIN_OSPEED_100M(GPIOD_PIN11) | \
|
|
PIN_OSPEED_100M(GPIOD_PIN12) | \
|
|
PIN_OSPEED_100M(GPIOD_PIN13) | \
|
|
PIN_OSPEED_100M(GPIOD_PIN14) | \
|
|
PIN_OSPEED_100M(GPIOD_PIN15))
|
|
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
|
|
PIN_PUPDR_FLOATING(GPIOD_SDIO_CMD) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
|
|
PIN_PUPDR_FLOATING(GPIOD_RESET) | \
|
|
PIN_PUPDR_FLOATING(GPIOD_OVER_CURRENT) |\
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
|
|
PIN_PUPDR_FLOATING(GPIOD_PIN11) | \
|
|
PIN_PUPDR_FLOATING(GPIOD_PIN12) | \
|
|
PIN_PUPDR_FLOATING(GPIOD_PIN13) | \
|
|
PIN_PUPDR_FLOATING(GPIOD_PIN14) | \
|
|
PIN_PUPDR_FLOATING(GPIOD_PIN15))
|
|
#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN1) | \
|
|
PIN_ODR_HIGH(GPIOD_SDIO_CMD) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN3) | \
|
|
PIN_ODR_HIGH(GPIOD_RESET) | \
|
|
PIN_ODR_HIGH(GPIOD_OVER_CURRENT) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN11) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN13) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN15))
|
|
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN1, 0) | \
|
|
PIN_AFIO_AF(GPIOD_SDIO_CMD, 12) | \
|
|
PIN_AFIO_AF(GPIOD_PIN3, 0) | \
|
|
PIN_AFIO_AF(GPIOD_RESET, 0) | \
|
|
PIN_AFIO_AF(GPIOD_OVER_CURRENT, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN6, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN7, 0))
|
|
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN9, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN10, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN11, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN12, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN13, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN14, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN15, 0))
|
|
|
|
/*
|
|
* GPIOE setup:
|
|
*
|
|
* PE0 - INT1 (input floating).
|
|
* PE1 - INT2 (input floating).
|
|
* PE2 - JOYSTICK_A (input floating).
|
|
* PE3 - JOYSTICK_B (input floating).
|
|
* PE4 - JOYSTICK_C (input floating).
|
|
* PE5 - JOYSTICK_D (input floating).
|
|
* PE6 - JOYSTICK_CTR (input floating).
|
|
* PE7 - PIN7 (input floating).
|
|
* PE8 - PIN8 (input floating).
|
|
* PE9 - PIN9 (input floating).
|
|
* PE10 - PIN10 (input floating).
|
|
* PE11 - PIN11 (input floating).
|
|
* PE12 - PIN12 (input floating).
|
|
* PE13 - PIN13 (input floating).
|
|
* PE14 - PIN14 (input floating).
|
|
* PE15 - PIN15 (input floating).
|
|
*/
|
|
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_INT1) | \
|
|
PIN_MODE_INPUT(GPIOE_INT2) | \
|
|
PIN_MODE_INPUT(GPIOE_JOYSTICK_A) | \
|
|
PIN_MODE_INPUT(GPIOE_JOYSTICK_B) | \
|
|
PIN_MODE_INPUT(GPIOE_JOYSTICK_C) | \
|
|
PIN_MODE_INPUT(GPIOE_JOYSTICK_D) | \
|
|
PIN_MODE_INPUT(GPIOE_JOYSTICK_CTR) | \
|
|
PIN_MODE_INPUT(GPIOE_PIN7) | \
|
|
PIN_MODE_INPUT(GPIOE_PIN8) | \
|
|
PIN_MODE_INPUT(GPIOE_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOE_PIN10) | \
|
|
PIN_MODE_INPUT(GPIOE_PIN11) | \
|
|
PIN_MODE_INPUT(GPIOE_PIN12) | \
|
|
PIN_MODE_INPUT(GPIOE_PIN13) | \
|
|
PIN_MODE_INPUT(GPIOE_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOE_PIN15))
|
|
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_INT1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_INT2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_JOYSTICK_A) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_JOYSTICK_B) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_JOYSTICK_C) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_JOYSTICK_D) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_JOYSTICK_CTR) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
|
|
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_100M(GPIOE_INT1) | \
|
|
PIN_OSPEED_100M(GPIOE_INT2) | \
|
|
PIN_OSPEED_100M(GPIOE_JOYSTICK_A) | \
|
|
PIN_OSPEED_100M(GPIOE_JOYSTICK_B) | \
|
|
PIN_OSPEED_100M(GPIOE_JOYSTICK_C) | \
|
|
PIN_OSPEED_100M(GPIOE_JOYSTICK_D) | \
|
|
PIN_OSPEED_100M(GPIOE_JOYSTICK_CTR) | \
|
|
PIN_OSPEED_100M(GPIOE_PIN7) | \
|
|
PIN_OSPEED_100M(GPIOE_PIN8) | \
|
|
PIN_OSPEED_100M(GPIOE_PIN9) | \
|
|
PIN_OSPEED_100M(GPIOE_PIN10) | \
|
|
PIN_OSPEED_100M(GPIOE_PIN11) | \
|
|
PIN_OSPEED_100M(GPIOE_PIN12) | \
|
|
PIN_OSPEED_100M(GPIOE_PIN13) | \
|
|
PIN_OSPEED_100M(GPIOE_PIN14) | \
|
|
PIN_OSPEED_100M(GPIOE_PIN15))
|
|
#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(GPIOE_INT1) | \
|
|
PIN_PUPDR_FLOATING(GPIOE_INT2) | \
|
|
PIN_PUPDR_FLOATING(GPIOE_JOYSTICK_A) | \
|
|
PIN_PUPDR_FLOATING(GPIOE_JOYSTICK_B) | \
|
|
PIN_PUPDR_FLOATING(GPIOE_JOYSTICK_C) | \
|
|
PIN_PUPDR_FLOATING(GPIOE_JOYSTICK_D) | \
|
|
PIN_PUPDR_FLOATING(GPIOE_JOYSTICK_CTR) |\
|
|
PIN_PUPDR_FLOATING(GPIOE_PIN7) | \
|
|
PIN_PUPDR_FLOATING(GPIOE_PIN8) | \
|
|
PIN_PUPDR_FLOATING(GPIOE_PIN9) | \
|
|
PIN_PUPDR_FLOATING(GPIOE_PIN10) | \
|
|
PIN_PUPDR_FLOATING(GPIOE_PIN11) | \
|
|
PIN_PUPDR_FLOATING(GPIOE_PIN12) | \
|
|
PIN_PUPDR_FLOATING(GPIOE_PIN13) | \
|
|
PIN_PUPDR_FLOATING(GPIOE_PIN14) | \
|
|
PIN_PUPDR_FLOATING(GPIOE_PIN15))
|
|
#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_INT1) | \
|
|
PIN_ODR_HIGH(GPIOE_INT2) | \
|
|
PIN_ODR_HIGH(GPIOE_JOYSTICK_A) | \
|
|
PIN_ODR_HIGH(GPIOE_JOYSTICK_B) | \
|
|
PIN_ODR_HIGH(GPIOE_JOYSTICK_C) | \
|
|
PIN_ODR_HIGH(GPIOE_JOYSTICK_D) | \
|
|
PIN_ODR_HIGH(GPIOE_JOYSTICK_CTR) | \
|
|
PIN_ODR_HIGH(GPIOE_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOE_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOE_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOE_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOE_PIN11) | \
|
|
PIN_ODR_HIGH(GPIOE_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOE_PIN13) | \
|
|
PIN_ODR_HIGH(GPIOE_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOE_PIN15))
|
|
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_INT1, 0) | \
|
|
PIN_AFIO_AF(GPIOE_INT2, 0) | \
|
|
PIN_AFIO_AF(GPIOE_JOYSTICK_A, 0) | \
|
|
PIN_AFIO_AF(GPIOE_JOYSTICK_B, 0) | \
|
|
PIN_AFIO_AF(GPIOE_JOYSTICK_C, 0) | \
|
|
PIN_AFIO_AF(GPIOE_JOYSTICK_D, 0) | \
|
|
PIN_AFIO_AF(GPIOE_JOYSTICK_CTR, 0) | \
|
|
PIN_AFIO_AF(GPIOE_PIN7, 0))
|
|
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | \
|
|
PIN_AFIO_AF(GPIOE_PIN9, 0) | \
|
|
PIN_AFIO_AF(GPIOE_PIN10, 0) | \
|
|
PIN_AFIO_AF(GPIOE_PIN11, 0) | \
|
|
PIN_AFIO_AF(GPIOE_PIN12, 0) | \
|
|
PIN_AFIO_AF(GPIOE_PIN13, 0) | \
|
|
PIN_AFIO_AF(GPIOE_PIN14, 0) | \
|
|
PIN_AFIO_AF(GPIOE_PIN15, 0))
|
|
|
|
/*
|
|
* GPIOF setup:
|
|
*
|
|
* PF0 - PIN0 (input floating).
|
|
* PF1 - PIN1 (input floating).
|
|
* PF2 - PIN2 (input floating).
|
|
* PF3 - PIN3 (input floating).
|
|
* PF4 - PIN4 (input floating).
|
|
* PF5 - PIN5 (input floating).
|
|
* PF6 - PIN6 (input floating).
|
|
* PF7 - PIN7 (input floating).
|
|
* PF8 - PIN8 (input floating).
|
|
* PF9 - PIN9 (input floating).
|
|
* PF10 - PIN10 (input floating).
|
|
* PF11 - PIN11 (input floating).
|
|
* PF12 - PIN12 (input floating).
|
|
* PF13 - PIN13 (input floating).
|
|
* PF14 - PIN14 (input floating).
|
|
* PF15 - PIN15 (input floating).
|
|
*/
|
|
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN1) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN2) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN3) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN4) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN5) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN6) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN7) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN8) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN10) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN11) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN12) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN13) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN15))
|
|
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
|
|
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_100M(GPIOF_PIN0) | \
|
|
PIN_OSPEED_100M(GPIOF_PIN1) | \
|
|
PIN_OSPEED_100M(GPIOF_PIN2) | \
|
|
PIN_OSPEED_100M(GPIOF_PIN3) | \
|
|
PIN_OSPEED_100M(GPIOF_PIN4) | \
|
|
PIN_OSPEED_100M(GPIOF_PIN5) | \
|
|
PIN_OSPEED_100M(GPIOF_PIN6) | \
|
|
PIN_OSPEED_100M(GPIOF_PIN7) | \
|
|
PIN_OSPEED_100M(GPIOF_PIN8) | \
|
|
PIN_OSPEED_100M(GPIOF_PIN9) | \
|
|
PIN_OSPEED_100M(GPIOF_PIN10) | \
|
|
PIN_OSPEED_100M(GPIOF_PIN11) | \
|
|
PIN_OSPEED_100M(GPIOF_PIN12) | \
|
|
PIN_OSPEED_100M(GPIOF_PIN13) | \
|
|
PIN_OSPEED_100M(GPIOF_PIN14) | \
|
|
PIN_OSPEED_100M(GPIOF_PIN15))
|
|
#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_PIN0) | \
|
|
PIN_PUPDR_FLOATING(GPIOF_PIN1) | \
|
|
PIN_PUPDR_FLOATING(GPIOF_PIN2) | \
|
|
PIN_PUPDR_FLOATING(GPIOF_PIN3) | \
|
|
PIN_PUPDR_FLOATING(GPIOF_PIN4) | \
|
|
PIN_PUPDR_FLOATING(GPIOF_PIN5) | \
|
|
PIN_PUPDR_FLOATING(GPIOF_PIN6) | \
|
|
PIN_PUPDR_FLOATING(GPIOF_PIN7) | \
|
|
PIN_PUPDR_FLOATING(GPIOF_PIN8) | \
|
|
PIN_PUPDR_FLOATING(GPIOF_PIN9) | \
|
|
PIN_PUPDR_FLOATING(GPIOF_PIN10) | \
|
|
PIN_PUPDR_FLOATING(GPIOF_PIN11) | \
|
|
PIN_PUPDR_FLOATING(GPIOF_PIN12) | \
|
|
PIN_PUPDR_FLOATING(GPIOF_PIN13) | \
|
|
PIN_PUPDR_FLOATING(GPIOF_PIN14) | \
|
|
PIN_PUPDR_FLOATING(GPIOF_PIN15))
|
|
#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN1) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN3) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN11) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN13) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN15))
|
|
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN1, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN2, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN3, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN4, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN5, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN6, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN7, 0))
|
|
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN9, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN10, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN11, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN12, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN13, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN14, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN15, 0))
|
|
|
|
/*
|
|
* GPIOG setup:
|
|
*
|
|
* PG0 - PIN0 (input floating).
|
|
* PG1 - PIN1 (input floating).
|
|
* PG2 - PIN2 (input floating).
|
|
* PG3 - PIN3 (input floating).
|
|
* PG4 - PIN4 (input floating).
|
|
* PG5 - PIN5 (input floating).
|
|
* PG6 - PIN6 (input floating).
|
|
* PG7 - PIN7 (input floating).
|
|
* PG8 - PIN8 (input floating).
|
|
* PG9 - PIN9 (input floating).
|
|
* PG10 - PIN10 (input floating).
|
|
* PG11 - PIN11 (input floating).
|
|
* PG12 - PIN12 (input floating).
|
|
* PG13 - PIN13 (input floating).
|
|
* PG14 - PIN14 (input floating).
|
|
* PG15 - PIN15 (input floating).
|
|
*/
|
|
#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN1) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN2) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN3) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN4) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN5) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN6) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN7) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN8) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN10) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN11) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN12) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN13) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN15))
|
|
#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
|
|
#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_100M(GPIOG_PIN0) | \
|
|
PIN_OSPEED_100M(GPIOG_PIN1) | \
|
|
PIN_OSPEED_100M(GPIOG_PIN2) | \
|
|
PIN_OSPEED_100M(GPIOG_PIN3) | \
|
|
PIN_OSPEED_100M(GPIOG_PIN4) | \
|
|
PIN_OSPEED_100M(GPIOG_PIN5) | \
|
|
PIN_OSPEED_100M(GPIOG_PIN6) | \
|
|
PIN_OSPEED_100M(GPIOG_PIN7) | \
|
|
PIN_OSPEED_100M(GPIOG_PIN8) | \
|
|
PIN_OSPEED_100M(GPIOG_PIN9) | \
|
|
PIN_OSPEED_100M(GPIOG_PIN10) | \
|
|
PIN_OSPEED_100M(GPIOG_PIN11) | \
|
|
PIN_OSPEED_100M(GPIOG_PIN12) | \
|
|
PIN_OSPEED_100M(GPIOG_PIN13) | \
|
|
PIN_OSPEED_100M(GPIOG_PIN14) | \
|
|
PIN_OSPEED_100M(GPIOG_PIN15))
|
|
#define VAL_GPIOG_PUPDR (PIN_PUPDR_FLOATING(GPIOG_PIN0) | \
|
|
PIN_PUPDR_FLOATING(GPIOG_PIN1) | \
|
|
PIN_PUPDR_FLOATING(GPIOG_PIN2) | \
|
|
PIN_PUPDR_FLOATING(GPIOG_PIN3) | \
|
|
PIN_PUPDR_FLOATING(GPIOG_PIN4) | \
|
|
PIN_PUPDR_FLOATING(GPIOG_PIN5) | \
|
|
PIN_PUPDR_FLOATING(GPIOG_PIN6) | \
|
|
PIN_PUPDR_FLOATING(GPIOG_PIN7) | \
|
|
PIN_PUPDR_FLOATING(GPIOG_PIN8) | \
|
|
PIN_PUPDR_FLOATING(GPIOG_PIN9) | \
|
|
PIN_PUPDR_FLOATING(GPIOG_PIN10) | \
|
|
PIN_PUPDR_FLOATING(GPIOG_PIN11) | \
|
|
PIN_PUPDR_FLOATING(GPIOG_PIN12) | \
|
|
PIN_PUPDR_FLOATING(GPIOG_PIN13) | \
|
|
PIN_PUPDR_FLOATING(GPIOG_PIN14) | \
|
|
PIN_PUPDR_FLOATING(GPIOG_PIN15))
|
|
#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN1) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN3) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN11) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN13) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN15))
|
|
#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN1, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN2, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN3, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN4, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN5, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN6, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN7, 0))
|
|
#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN9, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN10, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN11, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN12, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN13, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN14, 0) | \
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PIN_AFIO_AF(GPIOG_PIN15, 0))
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/*
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|
* GPIOH setup:
|
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*
|
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* PH0 - OSC_IN (input floating).
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* PH1 - OSC_OUT (input floating).
|
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* PH2 - LED1 (output pushpull maximum).
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* PH3 - LED2 (output pushpull maximum).
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* PH4 - OTG_HS_ULPI_NXT (alternate 10).
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* PH5 - PIN5 (input floating).
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* PH6 - PIN6 (input floating).
|
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* PH7 - PIN7 (input floating).
|
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* PH8 - PIN8 (input floating).
|
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* PH9 - PIN9 (input floating).
|
|
* PH10 - PIN10 (input floating).
|
|
* PH11 - PIN11 (input floating).
|
|
* PH12 - PIN12 (input floating).
|
|
* PH13 - PIN13 (input floating).
|
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* PH14 - PIN14 (input floating).
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* PH15 - PIN15 (input floating).
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*/
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#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \
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PIN_MODE_INPUT(GPIOH_OSC_OUT) | \
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PIN_MODE_OUTPUT(GPIOH_LED1) | \
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PIN_MODE_OUTPUT(GPIOH_LED2) | \
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PIN_MODE_ALTERNATE(GPIOH_OTG_HS_ULPI_NXT) | \
|
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PIN_MODE_INPUT(GPIOH_PIN5) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN6) | \
|
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PIN_MODE_INPUT(GPIOH_PIN7) | \
|
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PIN_MODE_INPUT(GPIOH_PIN8) | \
|
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PIN_MODE_INPUT(GPIOH_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN10) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN11) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN12) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN13) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN15))
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#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \
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PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \
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PIN_OTYPE_PUSHPULL(GPIOH_LED1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_LED2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_OTG_HS_ULPI_NXT) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN15))
|
|
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_100M(GPIOH_OSC_IN) | \
|
|
PIN_OSPEED_100M(GPIOH_OSC_OUT) | \
|
|
PIN_OSPEED_100M(GPIOH_LED1) | \
|
|
PIN_OSPEED_100M(GPIOH_LED2) | \
|
|
PIN_OSPEED_100M(GPIOH_OTG_HS_ULPI_NXT) | \
|
|
PIN_OSPEED_100M(GPIOH_PIN5) | \
|
|
PIN_OSPEED_100M(GPIOH_PIN6) | \
|
|
PIN_OSPEED_100M(GPIOH_PIN7) | \
|
|
PIN_OSPEED_100M(GPIOH_PIN8) | \
|
|
PIN_OSPEED_100M(GPIOH_PIN9) | \
|
|
PIN_OSPEED_100M(GPIOH_PIN10) | \
|
|
PIN_OSPEED_100M(GPIOH_PIN11) | \
|
|
PIN_OSPEED_100M(GPIOH_PIN12) | \
|
|
PIN_OSPEED_100M(GPIOH_PIN13) | \
|
|
PIN_OSPEED_100M(GPIOH_PIN14) | \
|
|
PIN_OSPEED_100M(GPIOH_PIN15))
|
|
#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \
|
|
PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \
|
|
PIN_PUPDR_FLOATING(GPIOH_LED1) | \
|
|
PIN_PUPDR_FLOATING(GPIOH_LED2) | \
|
|
PIN_PUPDR_FLOATING(GPIOH_OTG_HS_ULPI_NXT) | \
|
|
PIN_PUPDR_FLOATING(GPIOH_PIN5) | \
|
|
PIN_PUPDR_FLOATING(GPIOH_PIN6) | \
|
|
PIN_PUPDR_FLOATING(GPIOH_PIN7) | \
|
|
PIN_PUPDR_FLOATING(GPIOH_PIN8) | \
|
|
PIN_PUPDR_FLOATING(GPIOH_PIN9) | \
|
|
PIN_PUPDR_FLOATING(GPIOH_PIN10) | \
|
|
PIN_PUPDR_FLOATING(GPIOH_PIN11) | \
|
|
PIN_PUPDR_FLOATING(GPIOH_PIN12) | \
|
|
PIN_PUPDR_FLOATING(GPIOH_PIN13) | \
|
|
PIN_PUPDR_FLOATING(GPIOH_PIN14) | \
|
|
PIN_PUPDR_FLOATING(GPIOH_PIN15))
|
|
#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \
|
|
PIN_ODR_HIGH(GPIOH_OSC_OUT) | \
|
|
PIN_ODR_LOW(GPIOH_LED1) | \
|
|
PIN_ODR_LOW(GPIOH_LED2) | \
|
|
PIN_ODR_HIGH(GPIOH_OTG_HS_ULPI_NXT) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN11) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN13) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN15))
|
|
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0) | \
|
|
PIN_AFIO_AF(GPIOH_OSC_OUT, 0) | \
|
|
PIN_AFIO_AF(GPIOH_LED1, 0) | \
|
|
PIN_AFIO_AF(GPIOH_LED2, 0) | \
|
|
PIN_AFIO_AF(GPIOH_OTG_HS_ULPI_NXT, 10) | \
|
|
PIN_AFIO_AF(GPIOH_PIN5, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN6, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN7, 0))
|
|
#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN9, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN10, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN11, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN12, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN13, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN14, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN15, 0))
|
|
|
|
/*
|
|
* GPIOI setup:
|
|
*
|
|
* PI0 - PIN0 (input floating).
|
|
* PI1 - PIN1 (input floating).
|
|
* PI2 - PIN2 (input floating).
|
|
* PI3 - PIN3 (input floating).
|
|
* PI4 - PIN4 (input floating).
|
|
* PI5 - PIN5 (input floating).
|
|
* PI6 - PIN6 (input floating).
|
|
* PI7 - PIN7 (input floating).
|
|
* PI8 - LED3 (output pushpull maximum).
|
|
* PI9 - PIN9 (input floating).
|
|
* PI10 - LED4 (output pushpull maximum).
|
|
* PI11 - OTG_HS_ULPI_DIR (alternate 10).
|
|
* PI12 - PIN12 (input floating).
|
|
* PI13 - PIN13 (input floating).
|
|
* PI14 - PIN14 (input floating).
|
|
* PI15 - PIN15 (input floating).
|
|
*/
|
|
#define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | \
|
|
PIN_MODE_INPUT(GPIOI_PIN1) | \
|
|
PIN_MODE_INPUT(GPIOI_PIN2) | \
|
|
PIN_MODE_INPUT(GPIOI_PIN3) | \
|
|
PIN_MODE_INPUT(GPIOI_PIN4) | \
|
|
PIN_MODE_INPUT(GPIOI_PIN5) | \
|
|
PIN_MODE_INPUT(GPIOI_PIN6) | \
|
|
PIN_MODE_INPUT(GPIOI_PIN7) | \
|
|
PIN_MODE_OUTPUT(GPIOI_LED3) | \
|
|
PIN_MODE_INPUT(GPIOI_PIN9) | \
|
|
PIN_MODE_OUTPUT(GPIOI_LED4) | \
|
|
PIN_MODE_ALTERNATE(GPIOI_OTG_HS_ULPI_DIR) | \
|
|
PIN_MODE_INPUT(GPIOI_PIN12) | \
|
|
PIN_MODE_INPUT(GPIOI_PIN13) | \
|
|
PIN_MODE_INPUT(GPIOI_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOI_PIN15))
|
|
#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOI_LED3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOI_LED4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOI_OTG_HS_ULPI_DIR) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOI_PIN15))
|
|
#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_100M(GPIOI_PIN0) | \
|
|
PIN_OSPEED_100M(GPIOI_PIN1) | \
|
|
PIN_OSPEED_100M(GPIOI_PIN2) | \
|
|
PIN_OSPEED_100M(GPIOI_PIN3) | \
|
|
PIN_OSPEED_100M(GPIOI_PIN4) | \
|
|
PIN_OSPEED_100M(GPIOI_PIN5) | \
|
|
PIN_OSPEED_100M(GPIOI_PIN6) | \
|
|
PIN_OSPEED_100M(GPIOI_PIN7) | \
|
|
PIN_OSPEED_100M(GPIOI_LED3) | \
|
|
PIN_OSPEED_100M(GPIOI_PIN9) | \
|
|
PIN_OSPEED_100M(GPIOI_LED4) | \
|
|
PIN_OSPEED_100M(GPIOI_OTG_HS_ULPI_DIR) | \
|
|
PIN_OSPEED_100M(GPIOI_PIN12) | \
|
|
PIN_OSPEED_100M(GPIOI_PIN13) | \
|
|
PIN_OSPEED_100M(GPIOI_PIN14) | \
|
|
PIN_OSPEED_100M(GPIOI_PIN15))
|
|
#define VAL_GPIOI_PUPDR (PIN_PUPDR_FLOATING(GPIOI_PIN0) | \
|
|
PIN_PUPDR_FLOATING(GPIOI_PIN1) | \
|
|
PIN_PUPDR_FLOATING(GPIOI_PIN2) | \
|
|
PIN_PUPDR_FLOATING(GPIOI_PIN3) | \
|
|
PIN_PUPDR_FLOATING(GPIOI_PIN4) | \
|
|
PIN_PUPDR_FLOATING(GPIOI_PIN5) | \
|
|
PIN_PUPDR_FLOATING(GPIOI_PIN6) | \
|
|
PIN_PUPDR_FLOATING(GPIOI_PIN7) | \
|
|
PIN_PUPDR_FLOATING(GPIOI_LED3) | \
|
|
PIN_PUPDR_FLOATING(GPIOI_PIN9) | \
|
|
PIN_PUPDR_FLOATING(GPIOI_LED4) | \
|
|
PIN_PUPDR_FLOATING(GPIOI_OTG_HS_ULPI_DIR) | \
|
|
PIN_PUPDR_FLOATING(GPIOI_PIN12) | \
|
|
PIN_PUPDR_FLOATING(GPIOI_PIN13) | \
|
|
PIN_PUPDR_FLOATING(GPIOI_PIN14) | \
|
|
PIN_PUPDR_FLOATING(GPIOI_PIN15))
|
|
#define VAL_GPIOI_ODR (PIN_ODR_HIGH(GPIOI_PIN0) | \
|
|
PIN_ODR_HIGH(GPIOI_PIN1) | \
|
|
PIN_ODR_HIGH(GPIOI_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOI_PIN3) | \
|
|
PIN_ODR_HIGH(GPIOI_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOI_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOI_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOI_PIN7) | \
|
|
PIN_ODR_LOW(GPIOI_LED3) | \
|
|
PIN_ODR_HIGH(GPIOI_PIN9) | \
|
|
PIN_ODR_LOW(GPIOI_LED4) | \
|
|
PIN_ODR_HIGH(GPIOI_OTG_HS_ULPI_DIR) | \
|
|
PIN_ODR_HIGH(GPIOI_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOI_PIN13) | \
|
|
PIN_ODR_HIGH(GPIOI_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOI_PIN15))
|
|
#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0) | \
|
|
PIN_AFIO_AF(GPIOI_PIN1, 0) | \
|
|
PIN_AFIO_AF(GPIOI_PIN2, 0) | \
|
|
PIN_AFIO_AF(GPIOI_PIN3, 0) | \
|
|
PIN_AFIO_AF(GPIOI_PIN4, 0) | \
|
|
PIN_AFIO_AF(GPIOI_PIN5, 0) | \
|
|
PIN_AFIO_AF(GPIOI_PIN6, 0) | \
|
|
PIN_AFIO_AF(GPIOI_PIN7, 0))
|
|
#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_LED3, 0) | \
|
|
PIN_AFIO_AF(GPIOI_PIN9, 0) | \
|
|
PIN_AFIO_AF(GPIOI_LED4, 0) | \
|
|
PIN_AFIO_AF(GPIOI_OTG_HS_ULPI_DIR, 10) | \
|
|
PIN_AFIO_AF(GPIOI_PIN12, 0) | \
|
|
PIN_AFIO_AF(GPIOI_PIN13, 0) | \
|
|
PIN_AFIO_AF(GPIOI_PIN14, 0) | \
|
|
PIN_AFIO_AF(GPIOI_PIN15, 0))
|
|
|
|
|
|
#if !defined(_FROM_ASM_)
|
|
#ifdef __cplusplus
|
|
extern "C" {
|
|
#endif
|
|
void boardInit(void);
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
#endif /* _FROM_ASM_ */
|
|
|
|
#endif /* _BOARD_H_ */
|