223 lines
8.1 KiB
C
223 lines
8.1 KiB
C
/*
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ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file AVR/st_lld.c
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* @brief ST Driver subsystem low level driver code.
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*
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* @addtogroup ST
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* @{
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*/
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#include "hal.h"
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#if (OSAL_ST_MODE != OSAL_ST_MODE_NONE) || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/**
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* @brief Timer maximum value
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*/
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#define AVR_TIMER_COUNTER_MAX 255
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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#if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) || defined(__DOXYGEN__)
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/* Work out what the timer interrupt is called on this MCU */
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#ifdef TIMER0_COMPA_vect
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#define AVR_TIMER_VECT TIMER0_COMPA_vect
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#elif defined(TIMER_COMPA_vect)
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#define AVR_TIMER_VECT TIMER_COMPA_vect
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#elif defined(TIMER0_COMP_vect)
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#define AVR_TIMER_VECT TIMER0_COMP_vect
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#else
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#error "Cannot find interrupt vector name for timer"
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#endif
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/* Find the most suitable prescaler setting for the desired OSAL_ST_FREQUENCY */
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#if ((F_CPU / OSAL_ST_FREQUENCY) <= AVR_TIMER_COUNTER_MAX)
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#define AVR_TIMER_PRESCALER 1
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#define AVR_TIMER_PRESCALER_BITS (0<<CS02)|(0<<CS01)|(1<<CS00); /* CLK */
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#elif ((F_CPU / OSAL_ST_FREQUENCY / 8) <= AVR_TIMER_COUNTER_MAX)
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#define AVR_TIMER_PRESCALER 8
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#define AVR_TIMER_PRESCALER_BITS (0<<CS02)|(1<<CS01)|(0<<CS00); /* CLK/8 */
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#elif ((F_CPU / OSAL_ST_FREQUENCY / 64) <= AVR_TIMER_COUNTER_MAX)
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#define AVR_TIMER_PRESCALER 64
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#define AVR_TIMER_PRESCALER_BITS (0<<CS02)|(1<<CS01)|(1<<CS00); /* CLK/64 */
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#elif ((F_CPU / OSAL_ST_FREQUENCY / 256) <= AVR_TIMER_COUNTER_MAX)
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#define AVR_TIMER_PRESCALER 256
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#define AVR_TIMER_PRESCALER_BITS (1<<CS02)|(0<<CS01)|(0<<CS00); /* CLK/256 */
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#elif ((F_CPU / OSAL_ST_FREQUENCY / 1024) <= AVR_TIMER_COUNTER_MAX)
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#define AVR_TIMER_PRESCALER 1024
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#define AVR_TIMER_PRESCALER_BITS (1<<CS02)|(0<<CS01)|(1<<CS00); /* CLK/1024 */
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#else
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#error "Frequency too low for timer, please set OSAL_ST_FREQUENCY to a higher value"
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#endif
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#define AVR_TIMER_COUNTER (F_CPU / OSAL_ST_FREQUENCY / AVR_TIMER_PRESCALER)
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/* Test if OSAL_ST_FREQUENCY can be matched exactly using this timer */
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#define F_CPU_ (AVR_TIMER_COUNTER * AVR_TIMER_PRESCALER * OSAL_ST_FREQUENCY)
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#if (F_CPU_ != F_CPU)
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#warning "OSAL_ST_FREQUENCY cannot be generated exactly using timer"
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#endif
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#undef F_CPU_
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#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */
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#if (OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING) || defined(__DOXYGEN__)
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/* FIXME: Prescaler is now fixed in 1024.
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* Should add support for calculating best value according to
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* user requested configuration.
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*/
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#define PRESCALER (_BV(CS12) | _BV(CS10))
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#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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#if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) || defined(__DOXYGEN__)
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/**
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* @brief Timer handler for periodic mode.
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*/
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OSAL_IRQ_HANDLER(AVR_TIMER_VECT) {
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OSAL_IRQ_PROLOGUE();
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osalSysLockFromISR();
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osalOsTimerHandlerI();
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osalSysUnlockFromISR();
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OSAL_IRQ_EPILOGUE();
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}
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#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */
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#if (OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING) || defined(__DOXYGEN__)
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/**
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* @brief Timer handler for free running mode.
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*/
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OSAL_IRQ_HANDLER(TIMER1_COMPA_vect) {
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OSAL_IRQ_PROLOGUE();
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// TODO: reset status if required
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osalSysLockFromISR();
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osalOsTimerHandlerI();
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osalSysUnlockFromISR();
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OSAL_IRQ_EPILOGUE();
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}
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#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Low level ST driver initialization.
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*
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* @notapi
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*/
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void st_lld_init(void) {
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#if (OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING) || defined(__DOXYGEN__)
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/*
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* Periodic mode uses Timer 1 (16 bit).
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*/
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/* CTC mode, no clock source */
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TCCR1A = 0;
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TCCR1B = _BV(WGM12);
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/* start disabled */
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TCCR1C = 0;
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OCR1A = 0;
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TCNT1 = 0;
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TIFR1 = _BV(OCF1A); /* Reset pending. */
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TIMSK1 = 0;
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TCCR1B = PRESCALER;
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#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */
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#if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) || defined(__DOXYGEN__)
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/*
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* Periodic mode uses Timer 0 (8 bit).
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*/
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#if defined(TCCR0B) /* Timer has multiple output comparators */
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TCCR0A = (1 << WGM01) | (0 << WGM00) | /* CTC mode. */
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(0 << COM0A1) | (0 << COM0A0) | /* OC0A disabled. */
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(0 << COM0B1) | (0 << COM0B0); /* OC0B disabled. */
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TCCR0B = (0 << WGM02) | AVR_TIMER_PRESCALER_BITS; /* CTC mode. */
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OCR0A = AVR_TIMER_COUNTER - 1;
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TCNT0 = 0; /* Reset counter. */
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TIFR0 = (1 << OCF0A); /* Reset pending. */
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TIMSK0 = (1 << OCIE0A); /* IRQ on compare. */
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#elif defined(TCCR0A) /* AT90CAN doesn't have TCCR0B and slightly different TCCR0A */
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TCCR0A = (1 << WGM01) | (0 << WGM00) | /* CTC mode. */
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(0 << COM0A1) | (0 << COM0A0); /* OC0A disabled. */
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OCR0A = AVR_TIMER_COUNTER - 1;
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TCNT0 = 0; /* Reset counter. */
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TIFR0 = (1 << OCF0A); /* Reset pending. */
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TIMSK0 = (1 << OCIE0A); /* IRQ on compare. */
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#elif defined(TCCR0) /* Timer has single output comparator */
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TCCR0 = (1 << WGM01) | (0 << WGM00) | /* CTC mode. */
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(0 << COM01) | (0 << COM00) | /* OC0A disabled. */
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AVR_TIMER_PRESCALER_BITS;
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OCR0 = AVR_TIMER_COUNTER - 1;
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TCNT0 = 0; /* Reset counter. */
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TIFR = (1 << OCF0); /* Reset pending. */
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TIMSK = (1 << OCIE0); /* IRQ on compare. */
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#else
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#error "Neither TCCR0A nor TCCR0 registers are defined"
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#endif
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#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */
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}
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#endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */
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/** @} */
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