131 lines
4.9 KiB
C
131 lines
4.9 KiB
C
/*
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SPC5 HAL - Copyright (C) 2013 STMicroelectronics
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file SPC563Mxx/spc563m_registry.h
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* @brief SPC563Mxx capabilities registry.
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*
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* @addtogroup HAL
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* @{
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*/
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#ifndef _SPC563M_REGISTRY_H_
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#define _SPC563M_REGISTRY_H_
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/*===========================================================================*/
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/* Platform capabilities. */
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/*===========================================================================*/
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/**
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* @name SPC563Mxx capabilities
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* @{
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*/
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/* DSPI attribures.*/
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#define SPC5_HAS_DSPI0 FALSE
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#define SPC5_HAS_DSPI1 TRUE
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#define SPC5_HAS_DSPI2 TRUE
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#define SPC5_HAS_DSPI3 FALSE
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#define SPC5_DSPI_FIFO_DEPTH 16
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#define SPC5_DSPI1_TX1_DMA_DEV_ID 12
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#define SPC5_DSPI1_TX2_DMA_DEV_ID 25
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#define SPC5_DSPI1_RX_DMA_DEV_ID 13
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#define SPC5_DSPI2_TX1_DMA_DEV_ID 14
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#define SPC5_DSPI2_TX2_DMA_DEV_ID 26
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#define SPC5_DSPI2_RX_DMA_DEV_ID 15
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#define SPC5_DSPI1_EOQF_HANDLER vector132
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#define SPC5_DSPI1_EOQF_NUMBER 132
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#define SPC5_DSPI1_TFFF_HANDLER vector133
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#define SPC5_DSPI1_TFFF_NUMBER 133
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#define SPC5_DSPI2_EOQF_HANDLER vector137
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#define SPC5_DSPI2_EOQF_NUMBER 137
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#define SPC5_DSPI2_TFFF_HANDLER vector138
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#define SPC5_DSPI2_TFFF_NUMBER 138
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#define SPC5_DSPI1_ENABLE_CLOCK()
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#define SPC5_DSPI1_DISABLE_CLOCK()
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#define SPC5_DSPI2_ENABLE_CLOCK()
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#define SPC5_DSPI2_DISABLE_CLOCK()
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/* eDMA attributes.*/
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#define SPC5_HAS_EDMA TRUE
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#define SPC5_EDMA_NCHANNELS 32
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#define SPC5_EDMA_HAS_MUX FALSE
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/* eQADC attributes.*/
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#define SPC5_HAS_EQADC TRUE
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/* eSCI attributes.*/
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#define SPC5_HAS_ESCIA TRUE
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#define SPC5_ESCIA_HANDLER vector146
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#define SPC5_ESCIA_NUMBER 146
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#define SPC5_HAS_ESCIB TRUE
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#define SPC5_ESCIB_HANDLER vector149
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#define SPC5_ESCIB_NUMBER 149
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#define SPC5_HAS_ESCIC FALSE
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/* SIU attributes.*/
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#define SPC5_HAS_SIU TRUE
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#define SPC5_SIU_SUPPORTS_PORTS FALSE
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/* EMIOS attributes.*/
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#define SPC5_HAS_EMIOS TRUE
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#define SPC5_EMIOS_NUM_CHANNELS 16
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#define SPC5_EMIOS_FLAG_F0_HANDLER vector51
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#define SPC5_EMIOS_FLAG_F1_HANDLER vector52
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#define SPC5_EMIOS_FLAG_F2_HANDLER vector53
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#define SPC5_EMIOS_FLAG_F3_HANDLER vector54
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#define SPC5_EMIOS_FLAG_F4_HANDLER vector55
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#define SPC5_EMIOS_FLAG_F5_HANDLER vector56
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#define SPC5_EMIOS_FLAG_F6_HANDLER vector57
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#define SPC5_EMIOS_FLAG_F8_HANDLER vector59
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#define SPC5_EMIOS_FLAG_F9_HANDLER vector60
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#define SPC5_EMIOS_FLAG_F10_HANDLER vector61
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#define SPC5_EMIOS_FLAG_F11_HANDLER vector62
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#define SPC5_EMIOS_FLAG_F12_HANDLER vector63
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#define SPC5_EMIOS_FLAG_F13_HANDLER vector64
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#define SPC5_EMIOS_FLAG_F14_HANDLER vector65
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#define SPC5_EMIOS_FLAG_F15_HANDLER vector66
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#define SPC5_EMIOS_FLAG_F23_HANDLER vector209
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#define SPC5_EMIOS_FLAG_F0_NUMBER 51
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#define SPC5_EMIOS_FLAG_F1_NUMBER 52
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#define SPC5_EMIOS_FLAG_F2_NUMBER 53
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#define SPC5_EMIOS_FLAG_F3_NUMBER 54
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#define SPC5_EMIOS_FLAG_F4_NUMBER 55
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#define SPC5_EMIOS_FLAG_F5_NUMBER 56
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#define SPC5_EMIOS_FLAG_F6_NUMBER 57
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#define SPC5_EMIOS_FLAG_F8_NUMBER 59
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#define SPC5_EMIOS_FLAG_F9_NUMBER 60
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#define SPC5_EMIOS_FLAG_F10_NUMBER 61
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#define SPC5_EMIOS_FLAG_F11_NUMBER 62
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#define SPC5_EMIOS_FLAG_F12_NUMBER 63
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#define SPC5_EMIOS_FLAG_F13_NUMBER 64
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#define SPC5_EMIOS_FLAG_F14_NUMBER 65
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#define SPC5_EMIOS_FLAG_F15_NUMBER 66
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#define SPC5_EMIOS_FLAG_F23_NUMBER 209
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#define SPC5_EMIOS_CLK (64000000 / \
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SPC5_EMIOS_GLOBAL_PRESCALER)
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#define SPC5_EMIOS_ENABLE_CLOCK()
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#define SPC5_EMIOS_DISABLE_CLOCK()
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/** @} */
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#endif /* _SPC563M_REGISTRY_H_ */
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/** @} */
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