181 lines
4.4 KiB
Plaintext
181 lines
4.4 KiB
Plaintext
/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012,2013 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* SPC560B50 memory setup.
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*/
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__irq_stack_size__ = 0x0000; /* Not yet used.*/
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__process_stack_size__ = 0x0800;
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MEMORY
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{
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flash : org = 0x00000000, len = 512k
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dataflash : org = 0x00800000, len = 64k
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ram : org = 0x40000000, len = 32k
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}
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/*
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* Derived constants.
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*/
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__flash_size__ = LENGTH(flash);
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__flash_start__ = ORIGIN(flash);
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__flash_end__ = ORIGIN(flash) + LENGTH(flash);
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__ram_size__ = LENGTH(ram);
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__ram_start__ = ORIGIN(ram);
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__ram_end__ = ORIGIN(ram) + LENGTH(ram);
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SECTIONS
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{
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. = ORIGIN(flash);
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.boot : ALIGN(16) SUBALIGN(16)
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{
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KEEP(*(.bam))
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KEEP(*(.coreinit))
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KEEP(*(.handlers))
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KEEP(*(.crt0))
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. = ALIGN(0x00000800);
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KEEP(*(.vectors))
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/* Note, have to waste the first 4KB because the IVPR register
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requires an alignment of 4KB and the first 4KB cannot be used,
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IVOR0 would conflict with the BAM word. Applications could
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allocate code or data in the first 4KB by using special sections.*/
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. = ALIGN(0x00001000);
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__ivpr_base__ = .;
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KEEP(*(.ivors))
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} > flash
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constructors : ALIGN(4) SUBALIGN(4)
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{
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PROVIDE(__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE(__init_array_end = .);
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} > flash
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destructors : ALIGN(4) SUBALIGN(4)
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{
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PROVIDE(__fini_array_start = .);
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KEEP(*(.fini_array))
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KEEP(*(SORT(.fini_array.*)))
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PROVIDE(__fini_array_end = .);
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} > flash
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.text_vle : ALIGN(16) SUBALIGN(16)
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{
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*(.text_vle)
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*(.text_vle.*)
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*(.gnu.linkonce.t_vle.*)
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} > flash
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.text : ALIGN(16) SUBALIGN(16)
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{
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*(.text)
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*(.text.*)
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*(.gnu.linkonce.t.*)
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} > flash
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.rodata : ALIGN(16) SUBALIGN(16)
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{
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*(.glue_7t)
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*(.glue_7)
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*(.gcc*)
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*(.rodata)
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*(.rodata.*)
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*(.rodata1)
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} > flash
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.sdata2 : ALIGN(16) SUBALIGN(16)
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{
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__sdata2_start__ = . + 0x8000;
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*(.sdata2)
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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*(.sbss2)
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
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} > flash
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.eh_frame_hdr :
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{
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*(.eh_frame_hdr)
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} > flash
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.eh_frame : ONLY_IF_RO
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{
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*(.eh_frame)
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} > flash
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.romdata : ALIGN(16) SUBALIGN(16)
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{
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__romdata_start__ = .;
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} > flash
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.stacks :
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{
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. = ALIGN(8);
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__irq_stack_base__ = .;
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. += __irq_stack_size__;
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. = ALIGN(8);
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__irq_stack_end__ = .;
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__process_stack_base__ = .;
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__main_thread_stack_base__ = .;
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. += __process_stack_size__;
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. = ALIGN(8);
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__process_stack_end__ = .;
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__main_thread_stack_end__ = .;
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} > ram
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.data : AT(__romdata_start__)
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{
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. = ALIGN(4);
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__data_start__ = .;
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d.*)
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__sdata_start__ = . + 0x8000;
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*(.sdata)
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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__data_end__ = .;
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} > ram
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.sbss :
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{
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__bss_start__ = .;
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*(.sbss)
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*(.sbss.*)
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*(.gnu.linkonce.sb.*)
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*(.scommon)
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} > ram
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.bss :
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{
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*(.bss)
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*(.bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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__bss_end__ = .;
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} > ram
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__heap_base__ = __bss_end__;
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__heap_end__ = __ram_end__;
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}
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