/* ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. */ /** * @file STM32/GPIOv3/pal_lld.c * @brief STM32 PAL low level driver code. * * @addtogroup PAL * @{ */ #include "hal.h" #if HAL_USE_PAL || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver local definitions. */ /*===========================================================================*/ #if defined(STM32L4XX) #define AHB1_EN_MASK STM32_GPIO_EN_MASK #define AHB1_LPEN_MASK 0 #else #error "missing or unsupported platform for GPIOv3 PAL driver" #endif /*===========================================================================*/ /* Driver exported variables. */ /*===========================================================================*/ /*===========================================================================*/ /* Driver local variables and types. */ /*===========================================================================*/ /*===========================================================================*/ /* Driver local functions. */ /*===========================================================================*/ static void initgpio(stm32_gpio_t *gpiop, const stm32_gpio_setup_t *config) { gpiop->OTYPER = config->otyper; gpiop->ASCR = config->ascr; gpiop->OSPEEDR = config->ospeedr; gpiop->PUPDR = config->pupdr; gpiop->ODR = config->odr; gpiop->AFRL = config->afrl; gpiop->AFRH = config->afrh; gpiop->MODER = config->moder; gpiop->LOCKR = config->lockr; } /*===========================================================================*/ /* Driver interrupt handlers. */ /*===========================================================================*/ /*===========================================================================*/ /* Driver exported functions. */ /*===========================================================================*/ /** * @brief STM32 I/O ports configuration. * @details Ports A-D(E, F, G, H) clocks enabled. * * @param[in] config the STM32 ports configuration * * @notapi */ void _pal_lld_init(const PALConfig *config) { /* * Enables the GPIO related clocks. */ #if defined(STM32L4XX) RCC->AHB2ENR |= AHB1_EN_MASK; #endif /* * Initial GPIO setup. */ #if STM32_HAS_GPIOA initgpio(GPIOA, &config->PAData); #endif #if STM32_HAS_GPIOB initgpio(GPIOB, &config->PBData); #endif #if STM32_HAS_GPIOC initgpio(GPIOC, &config->PCData); #endif #if STM32_HAS_GPIOD initgpio(GPIOD, &config->PDData); #endif #if STM32_HAS_GPIOE initgpio(GPIOE, &config->PEData); #endif #if STM32_HAS_GPIOF initgpio(GPIOF, &config->PFData); #endif #if STM32_HAS_GPIOG initgpio(GPIOG, &config->PGData); #endif #if STM32_HAS_GPIOH initgpio(GPIOH, &config->PHData); #endif #if STM32_HAS_GPIOI initgpio(GPIOI, &config->PIData); #endif #if STM32_HAS_GPIOJ initgpio(GPIOJ, &config->PJData); #endif #if STM32_HAS_GPIOK initgpio(GPIOK, &config->PKData); #endif } /** * @brief Pads mode setup. * @details This function programs a pads group belonging to the same port * with the specified mode. * @note @p PAL_MODE_UNCONNECTED is implemented as push pull at minimum * speed. * * @param[in] port the port identifier * @param[in] mask the group mask * @param[in] mode the mode * * @notapi */ void _pal_lld_setgroupmode(ioportid_t port, ioportmask_t mask, iomode_t mode) { uint32_t moder = (mode & PAL_STM32_MODE_MASK) >> 0; uint32_t otyper = (mode & PAL_STM32_OTYPE_MASK) >> 2; uint32_t ospeedr = (mode & PAL_STM32_OSPEED_MASK) >> 3; uint32_t pupdr = (mode & PAL_STM32_PUDR_MASK) >> 5; uint32_t altr = (mode & PAL_STM32_ALTERNATE_MASK) >> 7; uint32_t ascr = (mode & PAL_STM32_ASCR_MASK) >> 11; uint32_t lockr = (mode & PAL_STM32_LOCKR_MASK) >> 12; uint32_t bit = 0; while (true) { if ((mask & 1) != 0) { uint32_t altrmask, m1, m2, m4; altrmask = altr << ((bit & 7) * 4); m4 = 15 << ((bit & 7) * 4); if (bit < 8) port->AFRL = (port->AFRL & ~m4) | altrmask; else port->AFRH = (port->AFRH & ~m4) | altrmask; m1 = 1 << bit; port->OTYPER = (port->OTYPER & ~m1) | otyper; port->ASCR = (port->ASCR & ~m1) | ascr; m2 = 3 << (bit * 2); port->OSPEEDR = (port->OSPEEDR & ~m2) | ospeedr; port->PUPDR = (port->PUPDR & ~m2) | pupdr; port->MODER = (port->MODER & ~m2) | moder; port->LOCKR = (port->LOCKR & ~m1) | lockr; } mask >>= 1; if (!mask) return; otyper <<= 1; ospeedr <<= 2; pupdr <<= 2; moder <<= 2; bit++; } } #endif /* HAL_USE_PAL */ /** @} */