/* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. This file is part of ChibiOS/RT. ChibiOS/RT is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3 of the License, or (at your option) any later version. ChibiOS/RT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program. If not, see . */ /** * @file STM32/spi_lld.h * @brief STM32 SPI subsystem low level driver header. * * @addtogroup STM32_SPI * @{ */ #ifndef _SPI_LLD_H_ #define _SPI_LLD_H_ #if CH_HAL_USE_SPI || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ /*===========================================================================*/ /*===========================================================================*/ /* Driver pre-compile time settings. */ /*===========================================================================*/ /** * @brief SPI1 driver enable switch. * @details If set to @p TRUE the support for SPI1 is included. * @note The default is @p TRUE. */ #if !defined(STM32_SPI_USE_SPI1) || defined(__DOXYGEN__) #define STM32_SPI_USE_SPI1 TRUE #endif /** * @brief SPI2 driver enable switch. * @details If set to @p TRUE the support for SPI2 is included. * @note The default is @p TRUE. */ #if !defined(STM32_SPI_USE_SPI2) || defined(__DOXYGEN__) #define STM32_SPI_USE_SPI2 TRUE #endif /** * @brief SPI3 driver enable switch. * @details If set to @p TRUE the support for SPI3 is included. * @note The default is @p TRUE. */ #if !defined(STM32_SPI_USE_SPI3) || defined(__DOXYGEN__) #define STM32_SPI_USE_SPI3 FALSE #endif /** * @brief SPI1 DMA priority (0..3|lowest..highest). * @note The priority level is used for both the TX and RX DMA channels but * because of the channels ordering the RX channel has always priority * over the TX channel. */ #if !defined(STM32_SPI_SPI1_DMA_PRIORITY) || defined(__DOXYGEN__) #define STM32_SPI_SPI1_DMA_PRIORITY 2 #endif /** * @brief SPI2 DMA priority (0..3|lowest..highest). * @note The priority level is used for both the TX and RX DMA channels but * because of the channels ordering the RX channel has always priority * over the TX channel. */ #if !defined(STM32_SPI_SPI2_DMA_PRIORITY) || defined(__DOXYGEN__) #define STM32_SPI_SPI2_DMA_PRIORITY 2 #endif /** * @brief SPI3 DMA priority (0..3|lowest..highest). * @note The priority level is used for both the TX and RX DMA channels but * because of the channels ordering the RX channel has always priority * over the TX channel. */ #if !defined(STM32_SPI_SPI3_DMA_PRIORITY) || defined(__DOXYGEN__) #define STM32_SPI_SPI3_DMA_PRIORITY 2 #endif /** * @brief SPI1 interrupt priority level setting. */ #if !defined(STM32_SPI_SPI1_IRQ_PRIORITY) || defined(__DOXYGEN__) #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #endif /** * @brief SPI2 interrupt priority level setting. */ #if !defined(STM32_SPI_SPI2_IRQ_PRIORITY) || defined(__DOXYGEN__) #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #endif /** * @brief SPI3 interrupt priority level setting. */ #if !defined(STM32_SPI_SPI3_IRQ_PRIORITY) || defined(__DOXYGEN__) #define STM32_SPI_SPI3_IRQ_PRIORITY 10 #endif /** * @brief SPI1 DMA error hook. * @note The default action for DMA errors is a system halt because DMA error * can only happen because programming errors. */ #if !defined(STM32_SPI_SPI1_DMA_ERROR_HOOK) || defined(__DOXYGEN__) #define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() #endif /** * @brief SPI2 DMA error hook. * @note The default action for DMA errors is a system halt because DMA error * can only happen because programming errors. */ #if !defined(STM32_SPI_SPI2_DMA_ERROR_HOOK) || defined(__DOXYGEN__) #define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() #endif /** * @brief SPI3 DMA error hook. * @note The default action for DMA errors is a system halt because DMA error * can only happen because programming errors. */ #if !defined(STM32_SPI_SPI3_DMA_ERROR_HOOK) || defined(__DOXYGEN__) #define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() #endif /*===========================================================================*/ /* Derived constants and error checks. */ /*===========================================================================*/ #if STM32_SPI_USE_SPI3 && \ !(defined(STM32F10X_HD) || defined(STM32F10X_CL)) #error "SPI only present in HD and CL devices" #endif #if !STM32_SPI_USE_SPI1 && !STM32_SPI_USE_SPI2 && !STM32_SPI_USE_SPI3 #error "SPI driver activated but no SPI peripheral assigned" #endif /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ /** * @brief Type of a structure representing an SPI driver. */ typedef struct SPIDriver SPIDriver; /** * @brief SPI notification callback type. * * @param[in] spip pointer to the @p SPIDriver object triggering the * callback */ typedef void (*spicallback_t)(SPIDriver *spip); /** * @brief Driver configuration structure. */ typedef struct { /** * @brief Operation complete callback. */ spicallback_t spc_endcb; /* End of the mandatory fields.*/ /** * @brief The chip select line port. */ ioportid_t spc_ssport; /** * @brief The chip select line pad number. */ uint16_t spc_sspad; /** * @brief SPI initialization data. */ uint16_t spc_cr1; } SPIConfig; /** * @brief Structure representing a SPI driver. */ struct SPIDriver{ /** * @brief Driver state. */ spistate_t spd_state; #if SPI_USE_WAIT || defined(__DOXYGEN__) /** * @brief Waiting thread. */ Thread *spd_thread; #endif /* SPI_USE_WAIT */ #if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) #if CH_USE_MUTEXES || defined(__DOXYGEN__) /** * @brief Mutex protecting the bus. */ Mutex spd_mutex; #elif CH_USE_SEMAPHORES Semaphore spd_semaphore; #endif #endif /* SPI_USE_MUTUAL_EXCLUSION */ /** * @brief Current configuration data. */ const SPIConfig *spd_config; #if defined(SPI_DRIVER_EXT_FIELDS) SPI_DRIVER_EXT_FIELDS #endif /* End of the mandatory fields.*/ /** * @brief Pointer to the SPIx registers block. */ SPI_TypeDef *spd_spi; /** * @brief Pointer to the receive DMA channel registers block. */ stm32_dma_channel_t *spd_dmarx; /** * @brief Pointer to the transmit DMA channel registers block. */ stm32_dma_channel_t *spd_dmatx; /** * @brief DMA priority bit mask.\ */ uint32_t spd_dmaccr; }; /*===========================================================================*/ /* Driver macros. */ /*===========================================================================*/ /*===========================================================================*/ /* External declarations. */ /*===========================================================================*/ #if STM32_SPI_USE_SPI1 && !defined(__DOXYGEN__) extern SPIDriver SPID1; #endif #if STM32_SPI_USE_SPI2 && !defined(__DOXYGEN__) extern SPIDriver SPID2; #endif #if STM32_SPI_USE_SPI3 && !defined(__DOXYGEN__) extern SPIDriver SPID3; #endif #ifdef __cplusplus extern "C" { #endif void spi_lld_init(void); void spi_lld_start(SPIDriver *spip); void spi_lld_stop(SPIDriver *spip); void spi_lld_select(SPIDriver *spip); void spi_lld_unselect(SPIDriver *spip); void spi_lld_ignore(SPIDriver *spip, size_t n); void spi_lld_exchange(SPIDriver *spip, size_t n, const void *txbuf, void *rxbuf); void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf); void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf); #ifdef __cplusplus } #endif #endif /* CH_HAL_USE_SPI */ #endif /* _SPI_LLD_H_ */ /** @} */