2 Debug ARM 1 General 3 22 1 1 ExePath Debug\Exe ObjPath Debug\Obj ListPath Debug\List Variant 20 40 GEndianMode 0 Input variant 3 6 Input description No specifier n, no float nor long long, no scan set, no assignment suppressing. Output variant 2 7 Output description No specifier a, A, no specifier n, no float nor long long, no flags. GOutputBinary 0 FPU 2 5 OGCoreOrChip 1 GRuntimeLibSelect 0 1 GRuntimeLibSelectSlave 0 1 RTDescription Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod. OGProductVersion 5.10.0.159 OGLastSavedByProductVersion 6.70.3.6347 GeneralEnableMisra 0 GeneralMisraVerbose 0 OGChipSelectEditMenu STM32F303xC ST STM32F303xC GenLowLevelInterface 1 GEndianModeBE 1 OGBufferedTerminalOutput 0 GenStdoutInterface 0 GeneralMisraRules98 0 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111 GeneralMisraVer 0 GeneralMisraRules04 0 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111 RTConfigPath2 $TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h GFPUCoreSlave 20 40 GBECoreSlave 20 40 OGUseCmsis 0 OGUseCmsisDspLib 0 GRuntimeLibThreads 0 ICCARM 2 29 1 1 CCOptimizationNoSizeConstraints 0 CCDefines CORTEX_USE_FPU=TRUE CCPreprocFile 0 CCPreprocComments 0 CCPreprocLine 0 CCListCFile 0 CCListCMnemonics 0 CCListCMessages 0 CCListAssFile 0 CCListAssSource 0 CCEnableRemarks 0 CCDiagSuppress CCDiagRemark CCDiagWarning CCDiagError CCObjPrefix 1 CCAllowList 1 0000000 CCDebugInfo 1 IEndianMode 1 IProcessor 1 IExtraOptionsCheck 0 IExtraOptions CCLangConformance 0 CCSignedPlainChar 1 CCRequirePrototypes 0 CCMultibyteSupport 0 CCDiagWarnAreErr 0 CCCompilerRuntimeInfo 0 IFpuProcessor 1 OutputFile $FILE_BNAME$.o CCLibConfigHeader 1 PreInclude CompilerMisraOverride 0 CCIncludePath2 $PROJ_DIR$\..\ $PROJ_DIR$\..\..\..\..\os\common\ports\ARMCMx\devices\STM32F3xx $PROJ_DIR$\..\..\..\..\os\ext\CMSIS\include $PROJ_DIR$\..\..\..\..\os\ext\CMSIS\ST $PROJ_DIR$\..\..\..\..\os\rt\ports\ARMCMx $PROJ_DIR$\..\..\..\..\os\rt\ports\ARMCMx\compilers\IAR $PROJ_DIR$\..\..\..\..\os\rt\include $PROJ_DIR$\..\..\..\..\os\hal\osal\rt $PROJ_DIR$\..\..\..\..\os\hal\include $PROJ_DIR$\..\..\..\..\os\hal\boards\ST_STM32F3_DISCOVERY $PROJ_DIR$\..\..\..\..\os\hal\ports\common\ARMCMx $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\GPIOv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\I2Cv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\RTCv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SPIv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USARTv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USBv1 $PROJ_DIR$\..\..\..\..\test\rt CCStdIncCheck 0 CCCodeSection .text IInterwork2 0 IProcessorMode2 1 CCOptLevel 1 CCOptStrategy 0 0 CCOptLevelSlave 1 CompilerMisraRules98 0 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111 CompilerMisraRules04 0 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111 CCPosIndRopi 0 CCPosIndRwpi 0 CCPosIndNoDynInit 0 IccLang 0 IccCDialect 1 IccAllowVLA 0 IccCppDialect 1 IccExceptions 1 IccRTTI 1 IccStaticDestr 1 IccCppInlineSemantics 0 IccCmsis 1 IccFloatSemantics 0 CCNoLiteralPool 0 AARM 2 9 1 1 AObjPrefix 1 AEndian 1 ACaseSensitivity 1 MacroChars 0 0 AWarnEnable 0 AWarnWhat 0 AWarnOne AWarnRange1 AWarnRange2 ADebug 1 AltRegisterNames 0 ADefines CORTEX_USE_FPU=TRUE AList 0 AListHeader 1 AListing 1 Includes 0 MacDefs 0 MacExps 1 MacExec 0 OnlyAssed 0 MultiLine 0 PageLengthCheck 0 PageLength 80 TabSpacing 8 AXRef 0 AXRefDefines 0 AXRefInternal 0 AXRefDual 0 AProcessor 1 AFpuProcessor 1 AOutputFile $FILE_BNAME$.o AMultibyteSupport 0 ALimitErrorsCheck 0 ALimitErrorsEdit 100 AIgnoreStdInclude 0 AUserIncludes $PROJ_DIR$\.. $PROJ_DIR$\..\..\..\..\os\common\ports\ARMCMx\devices\STM32F3xx $PROJ_DIR$\..\..\..\..\os\rt\ports\ARMCMx AExtraOptionsCheckV2 0 AExtraOptionsV2 AsmNoLiteralPool 0 OBJCOPY 0 1 1 1 OOCOutputFormat 2 0 OCOutputOverride 0 OOCOutputFile ch.srec OOCCommandLineProducer 1 OOCObjCopyEnable 0 CUSTOM 3 BICOMP 0 BUILDACTION 1 ILINK 0 16 1 1 IlinkOutputFile ch.out IlinkLibIOConfig 1 XLinkMisraHandler 0 IlinkInputFileSlave 0 IlinkDebugInfoEnable 1 IlinkKeepSymbols IlinkRawBinaryFile IlinkRawBinarySymbol IlinkRawBinarySegment IlinkRawBinaryAlign IlinkDefines IlinkConfigDefines IlinkMapFile 1 IlinkLogFile 0 IlinkLogInitialization 0 IlinkLogModule 0 IlinkLogSection 0 IlinkLogVeneer 0 IlinkIcfOverride 1 IlinkIcfFile $PROJ_DIR$\ch.icf IlinkIcfFileSlave IlinkEnableRemarks 0 IlinkSuppressDiags IlinkTreatAsRem IlinkTreatAsWarn IlinkTreatAsErr IlinkWarningsAreErrors 0 IlinkUseExtraOptions 0 IlinkExtraOptions IlinkLowLevelInterfaceSlave 1 IlinkAutoLibEnable 1 IlinkAdditionalLibs IlinkOverrideProgramEntryLabel 0 IlinkProgramEntryLabelSelect 0 IlinkProgramEntryLabel __iar_program_start DoFill 0 FillerByte 0xFF FillerStart 0x0 FillerEnd 0x0 CrcSize 0 1 CrcAlign 1 CrcPoly 0x11021 CrcCompl 0 0 CrcBitOrder 0 0 CrcInitialValue 0x0 DoCrc 0 IlinkBE8Slave 1 IlinkBufferedTerminalOutput 1 IlinkStdoutInterfaceSlave 1 CrcFullSize 0 IlinkIElfToolPostProcess 0 IlinkLogAutoLibSelect 0 IlinkLogRedirSymbols 0 IlinkLogUnusedFragments 0 IlinkCrcReverseByteOrder 0 IlinkCrcUseAsInput 1 IlinkOptInline 0 IlinkOptExceptionsAllow 1 IlinkOptExceptionsForce 0 IlinkCmsis 1 IlinkOptMergeDuplSections 0 IlinkOptUseVfe 1 IlinkOptForceVfe 0 IlinkStackAnalysisEnable 0 IlinkStackControlFile IlinkStackCallGraphFile CrcAlgorithm 0 1 CrcUnitSize 0 0 IlinkThreadsSlave 1 IARCHIVE 0 0 1 1 IarchiveInputs IarchiveOverride 0 IarchiveOutput ###Unitialized### BILINK 0 Release ARM 0 General 3 22 1 0 ExePath Release\Exe ObjPath Release\Obj ListPath Release\List Variant 20 40 GEndianMode 0 Input variant 3 6 Input description No specifier n, no float nor long long, no scan set, no assignment suppressing. Output variant 2 7 Output description No specifier a, A, no specifier n, no float nor long long, no flags. GOutputBinary 0 FPU 2 5 OGCoreOrChip 1 GRuntimeLibSelect 0 1 GRuntimeLibSelectSlave 0 1 RTDescription Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod. OGProductVersion 5.10.0.159 OGLastSavedByProductVersion 6.70.3.6347 GeneralEnableMisra 0 GeneralMisraVerbose 0 OGChipSelectEditMenu STM32F303xC ST STM32F303xC GenLowLevelInterface 1 GEndianModeBE 1 OGBufferedTerminalOutput 0 GenStdoutInterface 0 GeneralMisraRules98 0 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111 GeneralMisraVer 0 GeneralMisraRules04 0 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111 RTConfigPath2 $TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h GFPUCoreSlave 20 40 GBECoreSlave 20 40 OGUseCmsis 0 OGUseCmsisDspLib 0 GRuntimeLibThreads 0 ICCARM 2 29 1 0 CCOptimizationNoSizeConstraints 0 CCDefines CORTEX_USE_FPU=TRUE CCPreprocFile 0 CCPreprocComments 0 CCPreprocLine 0 CCListCFile 0 CCListCMnemonics 0 CCListCMessages 0 CCListAssFile 0 CCListAssSource 0 CCEnableRemarks 0 CCDiagSuppress CCDiagRemark CCDiagWarning CCDiagError CCObjPrefix 1 CCAllowList 1 1111111 CCDebugInfo 1 IEndianMode 1 IProcessor 1 IExtraOptionsCheck 0 IExtraOptions CCLangConformance 0 CCSignedPlainChar 1 CCRequirePrototypes 0 CCMultibyteSupport 0 CCDiagWarnAreErr 0 CCCompilerRuntimeInfo 0 IFpuProcessor 1 OutputFile $FILE_BNAME$.o CCLibConfigHeader 1 PreInclude CompilerMisraOverride 0 CCIncludePath2 $PROJ_DIR$\..\ $PROJ_DIR$\..\..\..\..\os\common\ports\ARMCMx\devices\STM32F3xx $PROJ_DIR$\..\..\..\..\os\ext\CMSIS\include $PROJ_DIR$\..\..\..\..\os\ext\CMSIS\ST $PROJ_DIR$\..\..\..\..\os\rt\ports\ARMCMx $PROJ_DIR$\..\..\..\..\os\rt\ports\ARMCMx\compilers\IAR $PROJ_DIR$\..\..\..\..\os\rt\include $PROJ_DIR$\..\..\..\..\os\hal\osal\rt $PROJ_DIR$\..\..\..\..\os\hal\include $PROJ_DIR$\..\..\..\..\os\hal\boards\ST_STM32F3_DISCOVERY $PROJ_DIR$\..\..\..\..\os\hal\ports\common\ARMCMx $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\GPIOv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\I2Cv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\RTCv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SPIv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USARTv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USBv1 $PROJ_DIR$\..\..\..\..\test\rt CCStdIncCheck 0 CCCodeSection .text IInterwork2 0 IProcessorMode2 1 CCOptLevel 3 CCOptStrategy 0 0 CCOptLevelSlave 3 CompilerMisraRules98 0 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111 CompilerMisraRules04 0 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111 CCPosIndRopi 0 CCPosIndRwpi 0 CCPosIndNoDynInit 0 IccLang 0 IccCDialect 1 IccAllowVLA 0 IccCppDialect 1 IccExceptions 1 IccRTTI 1 IccStaticDestr 1 IccCppInlineSemantics 0 IccCmsis 1 IccFloatSemantics 0 CCNoLiteralPool 0 AARM 2 9 1 0 AObjPrefix 1 AEndian 1 ACaseSensitivity 1 MacroChars 0 0 AWarnEnable 0 AWarnWhat 0 AWarnOne AWarnRange1 AWarnRange2 ADebug 1 AltRegisterNames 0 ADefines CORTEX_USE_FPU=TRUE AList 0 AListHeader 1 AListing 1 Includes 0 MacDefs 0 MacExps 1 MacExec 0 OnlyAssed 0 MultiLine 0 PageLengthCheck 0 PageLength 80 TabSpacing 8 AXRef 0 AXRefDefines 0 AXRefInternal 0 AXRefDual 0 AProcessor 1 AFpuProcessor 1 AOutputFile $FILE_BNAME$.o AMultibyteSupport 0 ALimitErrorsCheck 0 ALimitErrorsEdit 100 AIgnoreStdInclude 0 AUserIncludes $PROJ_DIR$\.. $PROJ_DIR$\..\..\..\..\os\common\ports\ARMCMx\devices\STM32F3xx $PROJ_DIR$\..\..\..\..\os\rt\ports\ARMCMx AExtraOptionsCheckV2 0 AExtraOptionsV2 AsmNoLiteralPool 0 OBJCOPY 0 1 1 0 OOCOutputFormat 2 0 OCOutputOverride 0 OOCOutputFile ch.srec OOCCommandLineProducer 1 OOCObjCopyEnable 0 CUSTOM 3 BICOMP 0 BUILDACTION 1 ILINK 0 16 1 0 IlinkOutputFile ch.out IlinkLibIOConfig 1 XLinkMisraHandler 0 IlinkInputFileSlave 0 IlinkDebugInfoEnable 1 IlinkKeepSymbols IlinkRawBinaryFile IlinkRawBinarySymbol IlinkRawBinarySegment IlinkRawBinaryAlign IlinkDefines IlinkConfigDefines IlinkMapFile 1 IlinkLogFile 0 IlinkLogInitialization 0 IlinkLogModule 0 IlinkLogSection 0 IlinkLogVeneer 0 IlinkIcfOverride 1 IlinkIcfFile $PROJ_DIR$\ch.icf IlinkIcfFileSlave IlinkEnableRemarks 0 IlinkSuppressDiags IlinkTreatAsRem IlinkTreatAsWarn IlinkTreatAsErr IlinkWarningsAreErrors 0 IlinkUseExtraOptions 0 IlinkExtraOptions IlinkLowLevelInterfaceSlave 1 IlinkAutoLibEnable 1 IlinkAdditionalLibs IlinkOverrideProgramEntryLabel 0 IlinkProgramEntryLabelSelect 0 IlinkProgramEntryLabel __iar_program_start DoFill 0 FillerByte 0xFF FillerStart 0x0 FillerEnd 0x0 CrcSize 0 1 CrcAlign 1 CrcPoly 0x11021 CrcCompl 0 0 CrcBitOrder 0 0 CrcInitialValue 0x0 DoCrc 0 IlinkBE8Slave 1 IlinkBufferedTerminalOutput 1 IlinkStdoutInterfaceSlave 1 CrcFullSize 0 IlinkIElfToolPostProcess 0 IlinkLogAutoLibSelect 0 IlinkLogRedirSymbols 0 IlinkLogUnusedFragments 0 IlinkCrcReverseByteOrder 0 IlinkCrcUseAsInput 1 IlinkOptInline 0 IlinkOptExceptionsAllow 1 IlinkOptExceptionsForce 0 IlinkCmsis 1 IlinkOptMergeDuplSections 0 IlinkOptUseVfe 1 IlinkOptForceVfe 0 IlinkStackAnalysisEnable 0 IlinkStackControlFile IlinkStackCallGraphFile CrcAlgorithm 0 1 CrcUnitSize 0 0 IlinkThreadsSlave 1 IARCHIVE 0 0 1 0 IarchiveInputs IarchiveOverride 0 IarchiveOutput ###Unitialized### BILINK 0 Release os common ports $PROJ_DIR$\..\..\..\..\os\common\ports\ARMCMx\devices\STM32F3xx\cmparams.h $PROJ_DIR$\..\..\..\..\os\common\ports\ARMCMx\compilers\IAR\cstartup.s $PROJ_DIR$\..\..\..\..\os\common\ports\ARMCMx\compilers\IAR\vectors.s ext CMSIS $PROJ_DIR$\..\..\..\..\os\ext\CMSIS\include\core_cm4.h $PROJ_DIR$\..\..\..\..\os\ext\CMSIS\include\core_cm4_simd.h $PROJ_DIR$\..\..\..\..\os\ext\CMSIS\include\core_cmFunc.h $PROJ_DIR$\..\..\..\..\os\ext\CMSIS\include\core_cmInstr.h $PROJ_DIR$\..\..\..\..\os\ext\CMSIS\ST\stm32f3xx.h $PROJ_DIR$\..\..\..\..\os\ext\CMSIS\ST\system_stm32f3xx.h hal board $PROJ_DIR$\..\..\..\..\os\hal\boards\ST_STM32F3_DISCOVERY\board.c $PROJ_DIR$\..\..\..\..\os\hal\boards\ST_STM32F3_DISCOVERY\board.h include $PROJ_DIR$\..\..\..\..\os\hal\include\adc.h $PROJ_DIR$\..\..\..\..\os\hal\include\can.h $PROJ_DIR$\..\..\..\..\os\hal\include\ext.h $PROJ_DIR$\..\..\..\..\os\hal\include\gpt.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_channels.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_ioblock.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_mmcsd.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_queues.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_streams.h $PROJ_DIR$\..\..\..\..\os\hal\include\i2c.h $PROJ_DIR$\..\..\..\..\os\hal\include\icu.h $PROJ_DIR$\..\..\..\..\os\hal\include\mmc_spi.h $PROJ_DIR$\..\..\..\..\os\hal\include\pal.h $PROJ_DIR$\..\..\..\..\os\hal\include\pwm.h $PROJ_DIR$\..\..\..\..\os\hal\include\sdc.h $PROJ_DIR$\..\..\..\..\os\hal\include\serial.h $PROJ_DIR$\..\..\..\..\os\hal\include\serial_usb.h $PROJ_DIR$\..\..\..\..\os\hal\include\spi.h $PROJ_DIR$\..\..\..\..\os\hal\include\st.h $PROJ_DIR$\..\..\..\..\os\hal\include\uart.h $PROJ_DIR$\..\..\..\..\os\hal\include\usb.h lib streams $PROJ_DIR$\..\..\..\..\os\hal\lib\streams\chprintf.c $PROJ_DIR$\..\..\..\..\os\hal\lib\streams\chprintf.h $PROJ_DIR$\..\..\..\..\os\hal\lib\streams\memstreams.c $PROJ_DIR$\..\..\..\..\os\hal\lib\streams\memstreams.h port $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\adc_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\adc_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\can_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\can_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\ext_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\ext_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\ext_lld_isr.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\ext_lld_isr.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\gpt_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\gpt_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\hal_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\hal_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\I2Cv2\i2c_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\I2Cv2\i2c_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\icu_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\icu_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\common\ARMCMx\nvic.c $PROJ_DIR$\..\..\..\..\os\hal\ports\common\ARMCMx\nvic.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\GPIOv2\pal_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\GPIOv2\pal_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\pwm_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\pwm_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\RTCv2\rtc_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\RTCv2\rtc_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USARTv2\serial_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USARTv2\serial_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SPIv2\spi_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SPIv2\spi_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\st_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\st_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\stm32_dma.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\stm32_dma.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\stm32_isr.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\stm32_rcc.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\stm32_registry.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\stm32_tim.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USBv1\stm32_usb.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USARTv2\uart_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USARTv2\uart_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USBv1\usb_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USBv1\usb_lld.h src $PROJ_DIR$\..\..\..\..\os\hal\src\adc.c $PROJ_DIR$\..\..\..\..\os\hal\src\can.c $PROJ_DIR$\..\..\..\..\os\hal\src\ext.c $PROJ_DIR$\..\..\..\..\os\hal\src\gpt.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_mmcsd.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_queues.c $PROJ_DIR$\..\..\..\..\os\hal\src\i2c.c $PROJ_DIR$\..\..\..\..\os\hal\src\icu.c $PROJ_DIR$\..\..\..\..\os\hal\src\mmc_spi.c $PROJ_DIR$\..\..\..\..\os\hal\src\pal.c $PROJ_DIR$\..\..\..\..\os\hal\src\pwm.c $PROJ_DIR$\..\..\..\..\os\hal\src\sdc.c $PROJ_DIR$\..\..\..\..\os\hal\src\serial.c $PROJ_DIR$\..\..\..\..\os\hal\src\serial_usb.c $PROJ_DIR$\..\..\..\..\os\hal\src\spi.c $PROJ_DIR$\..\..\..\..\os\hal\src\st.c $PROJ_DIR$\..\..\..\..\os\hal\src\uart.c $PROJ_DIR$\..\..\..\..\os\hal\src\usb.c rt include $PROJ_DIR$\..\..\..\..\os\rt\include\ch.h $PROJ_DIR$\..\..\..\..\os\rt\include\chbsem.h $PROJ_DIR$\..\..\..\..\os\rt\include\chcond.h $PROJ_DIR$\..\..\..\..\os\rt\include\chdebug.h $PROJ_DIR$\..\..\..\..\os\rt\include\chdynamic.h $PROJ_DIR$\..\..\..\..\os\rt\include\chevents.h $PROJ_DIR$\..\..\..\..\os\rt\include\chheap.h $PROJ_DIR$\..\..\..\..\os\rt\include\chmboxes.h $PROJ_DIR$\..\..\..\..\os\rt\include\chmemcore.h $PROJ_DIR$\..\..\..\..\os\rt\include\chmempools.h $PROJ_DIR$\..\..\..\..\os\rt\include\chmsg.h $PROJ_DIR$\..\..\..\..\os\rt\include\chmtx.h $PROJ_DIR$\..\..\..\..\os\rt\include\chqueues.h $PROJ_DIR$\..\..\..\..\os\rt\include\chregistry.h $PROJ_DIR$\..\..\..\..\os\rt\include\chschd.h $PROJ_DIR$\..\..\..\..\os\rt\include\chsem.h $PROJ_DIR$\..\..\..\..\os\rt\include\chstats.h $PROJ_DIR$\..\..\..\..\os\rt\include\chstreams.h $PROJ_DIR$\..\..\..\..\os\rt\include\chsys.h $PROJ_DIR$\..\..\..\..\os\rt\include\chthreads.h $PROJ_DIR$\..\..\..\..\os\rt\include\chtm.h $PROJ_DIR$\..\..\..\..\os\rt\include\chvt.h port $PROJ_DIR$\..\..\..\..\os\rt\ports\ARMCMx\chcore.c $PROJ_DIR$\..\..\..\..\os\rt\ports\ARMCMx\chcore.h $PROJ_DIR$\..\..\..\..\os\rt\ports\ARMCMx\chcore_timer.h $PROJ_DIR$\..\..\..\..\os\rt\ports\ARMCMx\chcore_v7m.c $PROJ_DIR$\..\..\..\..\os\rt\ports\ARMCMx\chcore_v7m.h $PROJ_DIR$\..\..\..\..\os\rt\ports\ARMCMx\compilers\IAR\chcoreasm_v7m.s $PROJ_DIR$\..\..\..\..\os\rt\ports\ARMCMx\compilers\IAR\chtypes.h src $PROJ_DIR$\..\..\..\..\os\rt\src\chcond.c $PROJ_DIR$\..\..\..\..\os\rt\src\chdebug.c $PROJ_DIR$\..\..\..\..\os\rt\src\chdynamic.c $PROJ_DIR$\..\..\..\..\os\rt\src\chevents.c $PROJ_DIR$\..\..\..\..\os\rt\src\chheap.c $PROJ_DIR$\..\..\..\..\os\rt\src\chmboxes.c $PROJ_DIR$\..\..\..\..\os\rt\src\chmemcore.c $PROJ_DIR$\..\..\..\..\os\rt\src\chmempools.c $PROJ_DIR$\..\..\..\..\os\rt\src\chmsg.c $PROJ_DIR$\..\..\..\..\os\rt\src\chmtx.c $PROJ_DIR$\..\..\..\..\os\rt\src\chqueues.c $PROJ_DIR$\..\..\..\..\os\rt\src\chregistry.c $PROJ_DIR$\..\..\..\..\os\rt\src\chschd.c $PROJ_DIR$\..\..\..\..\os\rt\src\chsem.c $PROJ_DIR$\..\..\..\..\os\rt\src\chstats.c $PROJ_DIR$\..\..\..\..\os\rt\src\chsys.c $PROJ_DIR$\..\..\..\..\os\rt\src\chthreads.c $PROJ_DIR$\..\..\..\..\os\rt\src\chtm.c $PROJ_DIR$\..\..\..\..\os\rt\src\chvt.c various test $PROJ_DIR$\..\..\..\..\test\rt\test.c $PROJ_DIR$\..\..\..\..\test\rt\test.h $PROJ_DIR$\..\..\..\..\test\rt\testbmk.c $PROJ_DIR$\..\..\..\..\test\rt\testbmk.h $PROJ_DIR$\..\..\..\..\test\rt\testdyn.c $PROJ_DIR$\..\..\..\..\test\rt\testdyn.h $PROJ_DIR$\..\..\..\..\test\rt\testevt.c $PROJ_DIR$\..\..\..\..\test\rt\testevt.h $PROJ_DIR$\..\..\..\..\test\rt\testheap.c $PROJ_DIR$\..\..\..\..\test\rt\testheap.h $PROJ_DIR$\..\..\..\..\test\rt\testmbox.c $PROJ_DIR$\..\..\..\..\test\rt\testmbox.h $PROJ_DIR$\..\..\..\..\test\rt\testmsg.c $PROJ_DIR$\..\..\..\..\test\rt\testmsg.h $PROJ_DIR$\..\..\..\..\test\rt\testmtx.c $PROJ_DIR$\..\..\..\..\test\rt\testmtx.h $PROJ_DIR$\..\..\..\..\test\rt\testpools.c $PROJ_DIR$\..\..\..\..\test\rt\testpools.h $PROJ_DIR$\..\..\..\..\test\rt\testqueues.c $PROJ_DIR$\..\..\..\..\test\rt\testqueues.h $PROJ_DIR$\..\..\..\..\test\rt\testsem.c $PROJ_DIR$\..\..\..\..\test\rt\testsem.h $PROJ_DIR$\..\..\..\..\test\rt\testthd.c $PROJ_DIR$\..\..\..\..\test\rt\testthd.h $PROJ_DIR$\..\chconf.h $PROJ_DIR$\..\halconf.h $PROJ_DIR$\..\main.c $PROJ_DIR$\..\mcuconf.h