Added support for extra DMA channels in STM32F072.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7997 35acf78f-673a-0410-8e92-d51de3d6d3f4master
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b648630b93
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@ -178,7 +178,7 @@
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#if !defined(STM32_DMA_STREAMS)
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#error "missing STM32_DMA_STREAMS definition in registry"
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#error
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#endif
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#if !defined(STM32_DMA_RELOCATION)
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#error "missing STM32_DMA_RELOCATION definition in registry"
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@ -70,7 +70,11 @@ const stm32_dma_stream_t _stm32_dma_streams[STM32_DMA_STREAMS] = {
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{DMA1_Channel2, &DMA1->IFCR, 4, 1, DMA1_Channel2_3_IRQn},
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{DMA1_Channel3, &DMA1->IFCR, 8, 2, DMA1_Channel2_3_IRQn},
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{DMA1_Channel4, &DMA1->IFCR, 12, 3, DMA1_Channel4_5_IRQn},
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{DMA1_Channel5, &DMA1->IFCR, 16, 4, DMA1_Channel4_5_IRQn}
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{DMA1_Channel5, &DMA1->IFCR, 16, 4, DMA1_Channel4_5_IRQn},
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#if STM32_DMA_STREAMS > 5
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{DMA1_Channel6, &DMA1->IFCR, 20, 5, DMA1_Channel4_5_6_7_IRQn},
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{DMA1_Channel7, &DMA1->IFCR, 24, 6, DMA1_Channel4_5_6_7_IRQn},
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#endif
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};
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/*===========================================================================*/
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@ -176,6 +180,24 @@ OSAL_IRQ_HANDLER(Vector6C) {
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dma_isr_redir[4].dma_func(dma_isr_redir[4].dma_param, flags);
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}
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#if STM32_DMA_STREAMS > 5
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/* Check on channel 5.*/
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flags = (DMA1->ISR >> 20) & STM32_DMA_ISR_MASK;
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if (flags & STM32_DMA_ISR_MASK) {
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DMA1->IFCR = flags << 20;
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if (dma_isr_redir[5].dma_func)
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dma_isr_redir[5].dma_func(dma_isr_redir[5].dma_param, flags);
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}
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/* Check on channel 6.*/
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flags = (DMA1->ISR >> 24) & STM32_DMA_ISR_MASK;
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if (flags & STM32_DMA_ISR_MASK) {
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DMA1->IFCR = flags << 24;
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if (dma_isr_redir[7].dma_func)
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dma_isr_redir[7].dma_func(dma_isr_redir[7].dma_param, flags);
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}
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#endif
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OSAL_IRQ_EPILOGUE();
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}
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@ -32,12 +32,6 @@
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/* Driver constants. */
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/*===========================================================================*/
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/**
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* @brief Total number of DMA streams.
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* @note This is the total number of streams among all the DMA units.
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*/
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#define STM32_DMA_STREAMS 5
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/**
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* @brief Mask of the ISR bits passed to the DMA callback functions.
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*/
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@ -113,6 +107,10 @@
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#define STM32_DMA1_STREAM3 STM32_DMA_STREAM(2)
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#define STM32_DMA1_STREAM4 STM32_DMA_STREAM(3)
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#define STM32_DMA1_STREAM5 STM32_DMA_STREAM(4)
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#if (STM32_DMA_STREAMS > 5) || defined(__DOXYGEN__)
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#define STM32_DMA1_STREAM6 STM32_DMA_STREAM(5)
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#define STM32_DMA1_STREAM7 STM32_DMA_STREAM(6)
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#endif
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/** @} */
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/**
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@ -172,6 +170,18 @@
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#if !defined(STM32_ADVANCED_DMA)
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#error "missing STM32_ADVANCED_DMA definition in registry"
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#endif
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#if !defined(STM32_DMA_STREAMS)
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#error "missing STM32_DMA_STREAMS definition in registry"
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#endif
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#if STM32_ADVANCED_DMA == TRUE
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#error "DMAv1 driver does not support STM32_ADVANCED_DMA"
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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@ -65,6 +65,7 @@
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#define STM32_ADVANCED_DMA FALSE
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#define STM32_HAS_DMA1 TRUE
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#define STM32_HAS_DMA2 FALSE
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#define STM32_DMA_STREAMS 5
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/* ETH attributes.*/
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#define STM32_HAS_ETH FALSE
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@ -219,6 +220,7 @@
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#define STM32_ADVANCED_DMA FALSE
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#define STM32_HAS_DMA1 TRUE
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#define STM32_HAS_DMA2 FALSE
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#define STM32_DMA_STREAMS 7
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/* ETH attributes.*/
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#define STM32_HAS_ETH FALSE
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@ -380,6 +382,7 @@
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#define STM32_ADVANCED_DMA FALSE
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#define STM32_HAS_DMA1 TRUE
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#define STM32_HAS_DMA2 FALSE
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#define STM32_DMA_STREAMS 5
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/* ETH attributes.*/
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#define STM32_HAS_ETH FALSE
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@ -522,6 +525,7 @@
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#define STM32_ADVANCED_DMA FALSE
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#define STM32_HAS_DMA1 TRUE
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#define STM32_HAS_DMA2 FALSE
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#define STM32_DMA_STREAMS 5
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/* ETH attributes.*/
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#define STM32_HAS_ETH FALSE
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@ -662,6 +666,7 @@
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#define STM32_ADVANCED_DMA FALSE
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#define STM32_HAS_DMA1 TRUE
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#define STM32_HAS_DMA2 FALSE
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#define STM32_DMA_STREAMS 5
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/* ETH attributes.*/
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#define STM32_HAS_ETH FALSE
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@ -799,6 +804,7 @@
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#define STM32_ADVANCED_DMA FALSE
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#define STM32_HAS_DMA1 TRUE
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#define STM32_HAS_DMA2 FALSE
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#define STM32_DMA_STREAMS 5
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/* ETH attributes.*/
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#define STM32_HAS_ETH FALSE
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