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STM32F4 ADC driver tested. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3511 35acf78f-673a-0410-8e92-d51de3d6d3f4
master
gdisirio 2011-11-19 09:53:22 +00:00
parent ba01ba301e
commit fd9b356d6c
1 changed files with 19 additions and 12 deletions
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7
os/hal/platforms/STM32F4xx/adc_lld.c
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@ -86,6 +86,9 @@ static void adc_lld_serve_rx_interrupt(ADCDriver *adcp, uint32_t flags) {
_adc_isr_error_code(adcp, ADC_ERR_DMAFAILURE);
}
else {
/* It is possible that the conversion group has already be reset by the
ADC error handler, in this case this interrupt is spurious.*/
if (adcp->grpp != NULL) {
if ((flags & STM32_DMA_ISR_HTIF) != 0) {
/* Half transfer processing.*/
_adc_isr_half_code(adcp);
@ -96,6 +99,7 @@ static void adc_lld_serve_rx_interrupt(ADCDriver *adcp, uint32_t flags) {
}
}
}
}
/*===========================================================================*/
/* Driver interrupt handlers. */
@ -121,6 +125,7 @@ CH_IRQ_HANDLER(ADC1_2_3_IRQHandler) {
if ((sr & ADC_SR_OVR) && (dmaStreamGetTransactionSize(ADCD1.dmastp) > 0)) {
/* ADC overflow condition, this could happen only if the DMA is unable
to read data fast enough.*/
if (ADCD1.grpp != NULL)
_adc_isr_error_code(&ADCD1, ADC_ERR_OVERFLOW);
}
/* TODO: Add here analog watchdog handling.*/
@ -134,6 +139,7 @@ CH_IRQ_HANDLER(ADC1_2_3_IRQHandler) {
if ((sr & ADC_SR_OVR) && (dmaStreamGetTransactionSize(ADCD2.dmastp) > 0)) {
/* ADC overflow condition, this could happen only if the DMA is unable
to read data fast enough.*/
if (ADCD2.grpp != NULL)
_adc_isr_error_code(&ADCD2, ADC_ERR_OVERFLOW);
}
/* TODO: Add here analog watchdog handling.*/
@ -147,6 +153,7 @@ CH_IRQ_HANDLER(ADC1_2_3_IRQHandler) {
if ((sr & ADC_SR_OVR) && (dmaStreamGetTransactionSize(ADCD3.dmastp) > 0)) {
/* ADC overflow condition, this could happen only if the DMA is unable
to read data fast enough.*/
if (ADCD3.grpp != NULL)
_adc_isr_error_code(&ADCD3, ADC_ERR_OVERFLOW);
}
/* TODO: Add here analog watchdog handling.*/