From fb49ce4f3aae2a481be29d030b26a1485d6227de Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 26 Oct 2007 15:08:54 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@66 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- demos/AVR-AT90CANx-GCC/chconf.h | 4 +-- demos/AVR-AT90CANx-GCC/chcore.c | 47 ++++++++++++++++++++------------ demos/AVR-AT90CANx-GCC/chcore.h | 10 +++++-- demos/AVR-AT90CANx-GCC/chcore2.S | 9 +++++- 4 files changed, 47 insertions(+), 23 deletions(-) diff --git a/demos/AVR-AT90CANx-GCC/chconf.h b/demos/AVR-AT90CANx-GCC/chconf.h index 2c849b3c6..63a391e08 100644 --- a/demos/AVR-AT90CANx-GCC/chconf.h +++ b/demos/AVR-AT90CANx-GCC/chconf.h @@ -138,11 +138,11 @@ /** Configuration option: Frequency of the system timer that drives the system * ticks. This also defines the system time unit.*/ -#define CH_FREQUENCY 100 +#define CH_FREQUENCY 1000 /** Configuration option: This constant is the number of ticks allowed for the * threads before preemption occurs.*/ -#define CH_TIME_QUANTUM 10 +#define CH_TIME_QUANTUM 20 /** Configuration option: Defines a CPU register to be used as storage for the * global \p currp variable. Caching this variable in a register can greatly diff --git a/demos/AVR-AT90CANx-GCC/chcore.c b/demos/AVR-AT90CANx-GCC/chcore.c index ed9d90d01..262732676 100644 --- a/demos/AVR-AT90CANx-GCC/chcore.c +++ b/demos/AVR-AT90CANx-GCC/chcore.c @@ -82,32 +82,43 @@ void hwinit(void) { /* * I/O ports setup. */ - DDRA = VAL_DDRA; - PORTA = VAL_PORTA; - DDRB = VAL_DDRB; - PORTB = VAL_PORTB; - DDRC = VAL_DDRC; - PORTC = VAL_PORTC; - DDRD = VAL_DDRD; - PORTD = VAL_PORTD; - DDRE = VAL_DDRE; - PORTE = VAL_PORTE; - DDRF = VAL_DDRF; - PORTF = VAL_PORTF; - DDRG = VAL_DDRG; - PORTG = VAL_PORTG; + DDRA = VAL_DDRA; + PORTA = VAL_PORTA; + DDRB = VAL_DDRB; + PORTB = VAL_PORTB; + DDRC = VAL_DDRC; + PORTC = VAL_PORTC; + DDRD = VAL_DDRD; + PORTD = VAL_PORTD; + DDRE = VAL_DDRE; + PORTE = VAL_PORTE; + DDRF = VAL_DDRF; + PORTF = VAL_PORTF; + DDRG = VAL_DDRG; + PORTG = VAL_PORTG; /* * External interrupts setup, all disabled initially. */ - EICRA = 0x00; - EICRB = 0x00; - EIMSK = 0x00; + EICRA = 0x00; + EICRB = 0x00; + EIMSK = 0x00; /* * Enables Idle mode for SLEEP instruction. */ - SMCR = 1; + SMCR = 1; + + /* + * Timer 0 setup. + */ + TCCR0A = (1 << WGM01) | (0 << WGM00) | // CTC mode. + (0 << COM0A1) | (0 << COM0A0) | // OC0A disabled (normal I/O). + (0 << CS02) | (1 << CS01) | (1 << CS00); // CLK/64 clock source. + OCR0A = F_CPU / 64 / CH_FREQUENCY - 1; + TCNT0 = 0; // Reset counter. + TIFR0 = (1 << OCF0A); // Reset pending (if any). + TIMSK0 = (1 << OCIE0A); // Interrupt on compare. } void chSysPause(void) { diff --git a/demos/AVR-AT90CANx-GCC/chcore.h b/demos/AVR-AT90CANx-GCC/chcore.h index 799742f47..c3e0cfa34 100644 --- a/demos/AVR-AT90CANx-GCC/chcore.h +++ b/demos/AVR-AT90CANx-GCC/chcore.h @@ -79,8 +79,13 @@ typedef struct { /** * Platform dependent part of the \p chThdCreate() API. */ -#define SETUP_CONTEXT(workspace, wsize, pf, arg) \ -{ \ +#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \ + tp->p_ctx.sp--; \ + tp->p_ctx.sp->r2 = (int)pf; \ + tp->p_ctx.sp->r3 = (int)pf >> 8; \ + tp->p_ctx.sp->r4 = (int)arg; \ + tp->p_ctx.sp->r5 = (int)arg >> 8; \ + tp->p_ctx.sp->pc = (UWORD16)threadstart; \ } /* @@ -100,6 +105,7 @@ typedef struct { void chSysHalt(void) __attribute__((noreturn)) ; void chSysPause(void) __attribute__((noreturn)) ; void chSysSwitchI(Context *oldp, Context *newp); +void threadstart(void); #endif /* _CHCORE_H_ */ diff --git a/demos/AVR-AT90CANx-GCC/chcore2.S b/demos/AVR-AT90CANx-GCC/chcore2.S index d438ffb4f..3564de521 100644 --- a/demos/AVR-AT90CANx-GCC/chcore2.S +++ b/demos/AVR-AT90CANx-GCC/chcore2.S @@ -19,6 +19,14 @@ #include +.global threadstart +threadstart: + sei + movw r24, r4 // argument + movw r30, r2 // thread function + icall + call chThdExit + .global chSysSwitchI chSysSwitchI: push r2 @@ -113,4 +121,3 @@ noschd: pop r1 pop r0 reti -