git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4980 35acf78f-673a-0410-8e92-d51de3d6d3f4
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a77c78a51c
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@ -37,20 +37,27 @@
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#if STM32_ADC_DUAL_MODE
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#if STM32_ADC_DUAL_MODE
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#if STM32_ADC_COMPACT_SAMPLES
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#if STM32_ADC_COMPACT_SAMPLES
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/* Compact type dual mode.*/
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/* Compact type dual mode.*/
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#define ADC_DMA_SIZE (STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD)
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#define ADC_DMA_SIZE (STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD)
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#else
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#define ADC_DMA_MDMA ADC_CCR_MDMA_HWORD
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/* Large type dual mode.*/
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#else /* !STM32_ADC_COMPACT_SAMPLES */
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/* Large type dual mode.*/
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#define ADC_DMA_SIZE (STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_PSIZE_WORD)
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#define ADC_DMA_SIZE (STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_PSIZE_WORD)
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#endif
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#define ADC_DMA_MDMA ADC_CCR_MDMA_WORD
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#endif /* !STM32_ADC_COMPACT_SAMPLES */
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#else /* !STM32_ADC_DUAL_MODE */
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#else /* !STM32_ADC_DUAL_MODE */
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#if STM32_ADC_COMPACT_SAMPLES
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#if STM32_ADC_COMPACT_SAMPLES
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/* Compact type single mode.*/
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/* Compact type single mode.*/
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#define ADC_DMA_SIZE (STM32_DMA_CR_MSIZE_BYTE | STM32_DMA_CR_PSIZE_BYTE)
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#define ADC_DMA_SIZE (STM32_DMA_CR_MSIZE_BYTE | STM32_DMA_CR_PSIZE_BYTE)
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#else
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#define ADC_DMA_MDMA ADC_CCR_MDMA_DISABLED
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/* Large type single mode.*/
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#else /* !STM32_ADC_COMPACT_SAMPLES */
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/* Large type single mode.*/
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#define ADC_DMA_SIZE (STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD)
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#define ADC_DMA_SIZE (STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD)
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#endif
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#define ADC_DMA_MDMA ADC_CCR_MDMA_DISABLED
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#endif /* !STM32_ADC_COMPACT_SAMPLES */
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#endif /* !STM32_ADC_DUAL_MODE */
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#endif /* !STM32_ADC_DUAL_MODE */
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/*===========================================================================*/
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/*===========================================================================*/
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@ -126,14 +126,28 @@
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/** @} */
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/** @} */
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/**
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/**
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* @name ADC clock modes
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* @name CCR register configuration helpers
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* @{
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* @{
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*/
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*/
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#define ADC_CCR_DUAL_MASK (31 << 0)
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#define ADC_CCR_DUAL(n) ((n) << 0)
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#define ADC_CCR_DELAY_MASK (15 << 8)
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#define ADC_CCR_DELAY(n) ((n) << 8)
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#define ADC_CCR_DMACFG_MASK (1 << 13)
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#define ADC_CCR_DMACFG_ONESHOT (0 << 13)
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#define ADC_CCR_DMACFG_CIRCULAR (1 << 13)
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#define ADC_CCR_MDMA_MASK (3 << 14)
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#define ADC_CCR_MDMA_DISABLED (0 << 14)
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#define ADC_CCR_MDMA_WORD (1 << 14)
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#define ADC_CCR_MDMA_HWORD (3 << 14)
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#define ADC_CCR_CKMODE_MASK (3 << 16)
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#define ADC_CCR_CKMODE_MASK (3 << 16)
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#define ADC_CCR_CKMODE_ADCCK (0 << 16)
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#define ADC_CCR_CKMODE_ADCCK (0 << 16)
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#define ADC_CCR_CKMODE_AHB_DIV1 (1 << 16)
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#define ADC_CCR_CKMODE_AHB_DIV1 (1 << 16)
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#define ADC_CCR_CKMODE_AHB_DIV2 (2 << 16)
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#define ADC_CCR_CKMODE_AHB_DIV2 (2 << 16)
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#define ADC_CCR_CKMODE_AHB_DIV4 (3 << 16)
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#define ADC_CCR_CKMODE_AHB_DIV4 (3 << 16)
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#define ADC_CCR_VREFEN (1 << 22)
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#define ADC_CCR_TSEN (1 << 23)
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#define ADC_CCR_VBATEN (1 << 24)
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/** @} */
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/** @} */
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/*===========================================================================*/
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/*===========================================================================*/
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@ -422,7 +436,10 @@ typedef struct {
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* @brief Slave ADC SQRx register initialization data.
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* @brief Slave ADC SQRx register initialization data.
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*/
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*/
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uint32_t ssqr[4];
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uint32_t ssqr[4];
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/**
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* @brief ADC CCR register initialization data.
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*/
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uint32_t ccr;
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#endif /* STM32_ADC_DUAL_MODE */
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#endif /* STM32_ADC_DUAL_MODE */
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} ADCConversionGroup;
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} ADCConversionGroup;
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