git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4980 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2012-12-28 09:57:11 +00:00
parent a77c78a51c
commit fb1b227383
2 changed files with 34 additions and 10 deletions

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@ -37,20 +37,27 @@
#if STM32_ADC_DUAL_MODE #if STM32_ADC_DUAL_MODE
#if STM32_ADC_COMPACT_SAMPLES #if STM32_ADC_COMPACT_SAMPLES
/* Compact type dual mode.*/ /* Compact type dual mode.*/
#define ADC_DMA_SIZE (STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD) #define ADC_DMA_SIZE (STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD)
#else #define ADC_DMA_MDMA ADC_CCR_MDMA_HWORD
/* Large type dual mode.*/
#else /* !STM32_ADC_COMPACT_SAMPLES */
/* Large type dual mode.*/
#define ADC_DMA_SIZE (STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_PSIZE_WORD) #define ADC_DMA_SIZE (STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_PSIZE_WORD)
#endif #define ADC_DMA_MDMA ADC_CCR_MDMA_WORD
#endif /* !STM32_ADC_COMPACT_SAMPLES */
#else /* !STM32_ADC_DUAL_MODE */ #else /* !STM32_ADC_DUAL_MODE */
#if STM32_ADC_COMPACT_SAMPLES #if STM32_ADC_COMPACT_SAMPLES
/* Compact type single mode.*/ /* Compact type single mode.*/
#define ADC_DMA_SIZE (STM32_DMA_CR_MSIZE_BYTE | STM32_DMA_CR_PSIZE_BYTE) #define ADC_DMA_SIZE (STM32_DMA_CR_MSIZE_BYTE | STM32_DMA_CR_PSIZE_BYTE)
#else #define ADC_DMA_MDMA ADC_CCR_MDMA_DISABLED
/* Large type single mode.*/
#else /* !STM32_ADC_COMPACT_SAMPLES */
/* Large type single mode.*/
#define ADC_DMA_SIZE (STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD) #define ADC_DMA_SIZE (STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD)
#endif #define ADC_DMA_MDMA ADC_CCR_MDMA_DISABLED
#endif /* !STM32_ADC_COMPACT_SAMPLES */
#endif /* !STM32_ADC_DUAL_MODE */ #endif /* !STM32_ADC_DUAL_MODE */
/*===========================================================================*/ /*===========================================================================*/

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@ -126,14 +126,28 @@
/** @} */ /** @} */
/** /**
* @name ADC clock modes * @name CCR register configuration helpers
* @{ * @{
*/ */
#define ADC_CCR_DUAL_MASK (31 << 0)
#define ADC_CCR_DUAL(n) ((n) << 0)
#define ADC_CCR_DELAY_MASK (15 << 8)
#define ADC_CCR_DELAY(n) ((n) << 8)
#define ADC_CCR_DMACFG_MASK (1 << 13)
#define ADC_CCR_DMACFG_ONESHOT (0 << 13)
#define ADC_CCR_DMACFG_CIRCULAR (1 << 13)
#define ADC_CCR_MDMA_MASK (3 << 14)
#define ADC_CCR_MDMA_DISABLED (0 << 14)
#define ADC_CCR_MDMA_WORD (1 << 14)
#define ADC_CCR_MDMA_HWORD (3 << 14)
#define ADC_CCR_CKMODE_MASK (3 << 16) #define ADC_CCR_CKMODE_MASK (3 << 16)
#define ADC_CCR_CKMODE_ADCCK (0 << 16) #define ADC_CCR_CKMODE_ADCCK (0 << 16)
#define ADC_CCR_CKMODE_AHB_DIV1 (1 << 16) #define ADC_CCR_CKMODE_AHB_DIV1 (1 << 16)
#define ADC_CCR_CKMODE_AHB_DIV2 (2 << 16) #define ADC_CCR_CKMODE_AHB_DIV2 (2 << 16)
#define ADC_CCR_CKMODE_AHB_DIV4 (3 << 16) #define ADC_CCR_CKMODE_AHB_DIV4 (3 << 16)
#define ADC_CCR_VREFEN (1 << 22)
#define ADC_CCR_TSEN (1 << 23)
#define ADC_CCR_VBATEN (1 << 24)
/** @} */ /** @} */
/*===========================================================================*/ /*===========================================================================*/
@ -422,7 +436,10 @@ typedef struct {
* @brief Slave ADC SQRx register initialization data. * @brief Slave ADC SQRx register initialization data.
*/ */
uint32_t ssqr[4]; uint32_t ssqr[4];
/**
* @brief ADC CCR register initialization data.
*/
uint32_t ccr;
#endif /* STM32_ADC_DUAL_MODE */ #endif /* STM32_ADC_DUAL_MODE */
} ADCConversionGroup; } ADCConversionGroup;