From fb1b2273837207d71bdb2e676a10a934eb8fb7a7 Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Fri, 28 Dec 2012 09:57:11 +0000
Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4980
 35acf78f-673a-0410-8e92-d51de3d6d3f4

---
 os/hal/platforms/STM32F3xx/adc_lld.c | 23 +++++++++++++++--------
 os/hal/platforms/STM32F3xx/adc_lld.h | 21 +++++++++++++++++++--
 2 files changed, 34 insertions(+), 10 deletions(-)

diff --git a/os/hal/platforms/STM32F3xx/adc_lld.c b/os/hal/platforms/STM32F3xx/adc_lld.c
index 48b0494aa..fa8fe54ef 100644
--- a/os/hal/platforms/STM32F3xx/adc_lld.c
+++ b/os/hal/platforms/STM32F3xx/adc_lld.c
@@ -37,20 +37,27 @@
 
 #if STM32_ADC_DUAL_MODE
 #if STM32_ADC_COMPACT_SAMPLES
-  /* Compact type dual mode.*/
+/* Compact type dual mode.*/
 #define ADC_DMA_SIZE    (STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD)
-#else
-  /* Large type dual mode.*/
+#define ADC_DMA_MDMA    ADC_CCR_MDMA_HWORD
+
+#else /* !STM32_ADC_COMPACT_SAMPLES */
+/* Large type dual mode.*/
 #define ADC_DMA_SIZE    (STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_PSIZE_WORD)
-#endif
+#define ADC_DMA_MDMA    ADC_CCR_MDMA_WORD
+#endif /* !STM32_ADC_COMPACT_SAMPLES */
+
 #else /* !STM32_ADC_DUAL_MODE */
 #if STM32_ADC_COMPACT_SAMPLES
-  /* Compact type single mode.*/
+/* Compact type single mode.*/
 #define ADC_DMA_SIZE    (STM32_DMA_CR_MSIZE_BYTE | STM32_DMA_CR_PSIZE_BYTE)
-#else
-  /* Large type single mode.*/
+#define ADC_DMA_MDMA    ADC_CCR_MDMA_DISABLED
+
+#else /* !STM32_ADC_COMPACT_SAMPLES */
+/* Large type single mode.*/
 #define ADC_DMA_SIZE    (STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD)
-#endif
+#define ADC_DMA_MDMA    ADC_CCR_MDMA_DISABLED
+#endif /* !STM32_ADC_COMPACT_SAMPLES */
 #endif /* !STM32_ADC_DUAL_MODE */
 
 /*===========================================================================*/
diff --git a/os/hal/platforms/STM32F3xx/adc_lld.h b/os/hal/platforms/STM32F3xx/adc_lld.h
index 8d13caf87..f5e59967c 100644
--- a/os/hal/platforms/STM32F3xx/adc_lld.h
+++ b/os/hal/platforms/STM32F3xx/adc_lld.h
@@ -126,14 +126,28 @@
 /** @} */
 
 /**
- * @name    ADC clock modes
+ * @name    CCR register configuration helpers
  * @{
  */
+#define ADC_CCR_DUAL_MASK               (31 << 0)
+#define ADC_CCR_DUAL(n)                 ((n) << 0)
+#define ADC_CCR_DELAY_MASK              (15 << 8)
+#define ADC_CCR_DELAY(n)                ((n) << 8)
+#define ADC_CCR_DMACFG_MASK             (1 << 13)
+#define ADC_CCR_DMACFG_ONESHOT          (0 << 13)
+#define ADC_CCR_DMACFG_CIRCULAR         (1 << 13)
+#define ADC_CCR_MDMA_MASK               (3 << 14)
+#define ADC_CCR_MDMA_DISABLED           (0 << 14)
+#define ADC_CCR_MDMA_WORD               (1 << 14)
+#define ADC_CCR_MDMA_HWORD              (3 << 14)
 #define ADC_CCR_CKMODE_MASK             (3 << 16)
 #define ADC_CCR_CKMODE_ADCCK            (0 << 16)
 #define ADC_CCR_CKMODE_AHB_DIV1         (1 << 16)
 #define ADC_CCR_CKMODE_AHB_DIV2         (2 << 16)
 #define ADC_CCR_CKMODE_AHB_DIV4         (3 << 16)
+#define ADC_CCR_VREFEN                  (1 << 22)
+#define ADC_CCR_TSEN                    (1 << 23)
+#define ADC_CCR_VBATEN                  (1 << 24)
 /** @} */
 
 /*===========================================================================*/
@@ -422,7 +436,10 @@ typedef struct {
    * @brief   Slave ADC SQRx register initialization data.
    */
   uint32_t                  ssqr[4];
-
+  /**
+   * @brief   ADC CCR register initialization data.
+   */
+  uint32_t                  ccr;
 #endif /* STM32_ADC_DUAL_MODE */
 } ADCConversionGroup;