git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4055 35acf78f-673a-0410-8e92-d51de3d6d3f4

os/hal/dox/uart.dox

@@ -39,7 +39,7 @@
  *          - Multipoint network drivers.
  *          - Serial protocol decoders.
  *          .
- *          If your application requires a synchronoyus buffered driver then
+ *          If your application requires a synchronous buffered driver then
  *          the @ref SERIAL should be used instead.
  * @pre     In order to use the UART driver the @p HAL_USE_UART option
  *          must be enabled in @p halconf.h.

os/hal/include/sdc.h

@@ -98,7 +98,7 @@
  */
 /**
  * @brief   Number of initialization attempts before rejecting the card.
- * @note    Attempts are performed at 10mS intevals.
+ * @note    Attempts are performed at 10mS intervals.
  */
 #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
 #define SDC_INIT_RETRY                  100

os/hal/platforms/AT91SAM7/ext_lld.c

@@ -146,7 +146,7 @@ void ext_lld_init(void) {
 
 #if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
     (SAM7_PLATFORM == SAM7X512)
-  /* Aame for PIOB.*/
+  /* Same for PIOB.*/
   extObjectInit(&EXTDB);
   EXTDB.pio = AT91C_BASE_PIOB;
   EXTDB.pid = AT91C_ID_PIOB;

os/hal/platforms/AT91SAM7/mac_lld.c

@@ -324,7 +324,7 @@ msg_t max_lld_get_transmit_descriptor(MACDriver *macp,
  * @brief   Writes to a transmit descriptor's stream.
  *
  * @param[in] tdp       pointer to a @p MACTransmitDescriptor structure
- * @param[in] buf       pointer to the buffer cointaining the data to be
+ * @param[in] buf       pointer to the buffer containing the data to be
  *                      written
  * @param[in] size      number of bytes to be written
  * @return              The number of bytes written into the descriptor's

os/hal/platforms/AVR/serial_lld.h

@@ -109,7 +109,7 @@ typedef struct {
 #define UBRR(b)     (((F_CPU / b) >> 4) - 1)
 
 /**
- * @brief   Macro for baud rate computationwhen U2Xn == 1.
+ * @brief   Macro for baud rate computation when U2Xn == 1.
  * @note    Make sure the final baud rate is within tolerance.
  */
 #define UBRR2(b)    (((F_CPU / b) >> 3) - 1)

os/hal/platforms/SPC56x/hal_lld.c

@@ -70,7 +70,7 @@ void hal_lld_init(void) {
 
   /* Optimal crossbar settings. The DMA priority is placed above the CPU
      priority in order to not starve I/O activities while the CPU is
-     excuting tight loops (FLASH and SRAM slave ports only).
+     executing tight loops (FLASH and SRAM slave ports only).
      The SRAM is parked on the load/store port, for some unknown reason it
      is defaulted on the instructions port and this kills performance.*/
   XBAR.SGPCR3.B.PARK = 4;               /* RAM slave on load/store port.*/

os/hal/platforms/STM32/GPIOv2/pal_lld.c

@@ -50,7 +50,7 @@
                          RCC_AHB1ENR_GPIOIEN)
 #define AHB1_LPEN_MASK  AHB1_EN_MASK
 #else
-#error "missing or usupported platform for GPIOv2 PAL driver"
+#error "missing or unsupported platform for GPIOv2 PAL driver"
 #endif
 
 /*===========================================================================*/

os/hal/platforms/STM32/can_lld.h

@@ -188,7 +188,7 @@ typedef struct {
    */
   uint32_t                  mode:1;
   /**
-   * @brief Filter sclae.
+   * @brief Filter scale.
    * @note  This bit represent the CAN_FS1R register bit associated to this
    *        filter (0=16 bits mode, 1=32 bits mode).
    */

os/hal/platforms/STM32/mac_lld.c

@@ -415,7 +415,7 @@ msg_t max_lld_get_transmit_descriptor(MACDriver *macp,
  * @brief   Writes to a transmit descriptor's stream.
  *
  * @param[in] tdp       pointer to a @p MACTransmitDescriptor structure
- * @param[in] buf       pointer to the buffer cointaining the data to be
+ * @param[in] buf       pointer to the buffer containing the data to be
  *                      written
  * @param[in] size      number of bytes to be written
  * @return              The number of bytes written into the descriptor's

os/hal/platforms/STM32/sdc_lld.c

@@ -475,7 +475,7 @@ void sdc_lld_stop(SDCDriver *sdcp) {
 }
 
 /**
- * @brief   Starts the SDIO clock and sets it to init mode (400KHz or less).
+ * @brief   Starts the SDIO clock and sets it to init mode (400kHz or less).
  *
  * @param[in] sdcp      pointer to the @p SDCDriver object
  *
@@ -484,7 +484,7 @@ void sdc_lld_stop(SDCDriver *sdcp) {
 void sdc_lld_start_clk(SDCDriver *sdcp) {
 
   (void)sdcp;
-  /* Initial clock setting: 400KHz, 1bit mode.*/
+  /* Initial clock setting: 400kHz, 1bit mode.*/
   SDIO->CLKCR  = STM32_SDIO_DIV_LS;
   SDIO->POWER |= SDIO_POWER_PWRCTRL_0 | SDIO_POWER_PWRCTRL_1;
   SDIO->CLKCR |= SDIO_CLKCR_CLKEN;

os/hal/platforms/STM32F1xx/platform.dox

@@ -388,7 +388,7 @@
  * @section stm32f1xx_rcc_2 STM32F1xx RCC driver implementation features
  * - Peripherals reset.
  * - Peripherals clock enable.
- * - Periplerals clock disable.
+ * - Peripherals clock disable.
  * .
  * @ingroup STM32F1xx_PLATFORM_DRIVERS
  */

os/hal/platforms/STM32F1xx/stm32_dma.c

@@ -29,7 +29,7 @@
  *          drivers to coordinate the access to the resource.
  * @note    The DMA ISR handlers are all declared into this module because
  *          sharing, the various device drivers can associate a callback to
- *          IRSs when allocating streams.
+ *          ISRs when allocating streams.
  * @{
  */
 

os/hal/platforms/STM32F2xx/platform.dox

@@ -306,7 +306,7 @@
  * @section stm32f2xx_rcc_2 STM32F2xx RCC driver implementation features
  * - Peripherals reset.
  * - Peripherals clock enable.
- * - Periplerals clock disable.
+ * - Peripherals clock disable.
  * .
  * @ingroup STM32F2xx_PLATFORM_DRIVERS
  */

os/hal/platforms/STM32F2xx/stm32_dma.c

@@ -29,7 +29,7 @@
  *          drivers to coordinate the access to the resource.
  * @note    The DMA ISR handlers are all declared into this module because
  *          sharing, the various device drivers can associate a callback to
- *          IRSs when allocating streams.
+ *          ISRs when allocating streams.
  * @{
  */
 

os/hal/platforms/STM32F4xx/platform.dox

@@ -306,7 +306,7 @@
  * @section stm32f4xx_rcc_2 STM32F4xx RCC driver implementation features
  * - Peripherals reset.
  * - Peripherals clock enable.
- * - Periplerals clock disable.
+ * - Peripherals clock disable.
  * .
  * @ingroup STM32F4xx_PLATFORM_DRIVERS
  */

os/hal/platforms/STM32F4xx/stm32_dma.c

@@ -29,7 +29,7 @@
  *          drivers to coordinate the access to the resource.
  * @note    The DMA ISR handlers are all declared into this module because
  *          sharing, the various device drivers can associate a callback to
- *          IRSs when allocating streams.
+ *          ISRs when allocating streams.
  * @{
  */
 

os/hal/platforms/STM32L1xx/hal_lld.h

@@ -149,10 +149,10 @@
  * @{
  */
 #define STM32_MSIRANGE_MASK     (7 << 13)   /**< MSIRANGE field mask.       */
-#define STM32_MSIRANGE_64K      (0 << 13)   /**< 64KHz nominal.             */
+#define STM32_MSIRANGE_64K      (0 << 13)   /**< 64kHz nominal.             */
-#define STM32_MSIRANGE_128K     (1 << 13)   /**< 128KHz nominal.            */
+#define STM32_MSIRANGE_128K     (1 << 13)   /**< 128kHz nominal.            */
-#define STM32_MSIRANGE_256K     (2 << 13)   /**< 256KHz nominal.            */
+#define STM32_MSIRANGE_256K     (2 << 13)   /**< 256kHz nominal.            */
-#define STM32_MSIRANGE_512K     (3 << 13)   /**< 512KHz nominal.            */
+#define STM32_MSIRANGE_512K     (3 << 13)   /**< 512kHz nominal.            */
 #define STM32_MSIRANGE_1M       (4 << 13)   /**< 1MHz nominal.              */
 #define STM32_MSIRANGE_2M       (5 << 13)   /**< 2MHz nominal.              */
 #define STM32_MSIRANGE_4M       (6 << 13)   /**< 4MHz nominal               */
@@ -677,7 +677,7 @@
 #error "impossible to activate LSE"
 #endif
 #if (STM32_LSECLK < 1000) || (STM32_LSECLK > 1000000)
-#error "STM32_LSECLK outside acceptable range (1...1000KHz)"
+#error "STM32_LSECLK outside acceptable range (1...1000kHz)"
 #endif
 #else /* !STM32_LSE_ENABLED */
 #if STM_RTCCLK == STM32_LSECLK

os/hal/platforms/STM32L1xx/platform.dox

@@ -305,7 +305,7 @@
  * @section stm32l1xx_rcc_2 STM32L1xx RCC driver implementation features
  * - Peripherals reset.
  * - Peripherals clock enable.
- * - Periplerals clock disable.
+ * - Peripherals clock disable.
  * .
  * @ingroup STM32L1xx_PLATFORM_DRIVERS
  */

os/hal/platforms/STM32L1xx/stm32_dma.c

@@ -29,7 +29,7 @@
  *          drivers to coordinate the access to the resource.
  * @note    The DMA ISR handlers are all declared into this module because
  *          sharing, the various device drivers can associate a callback to
- *          IRSs when allocating streams.
+ *          ISRs when allocating streams.
  * @{
  */
 

os/hal/platforms/STM8L/hal_lld.c

@@ -108,7 +108,7 @@ void hal_lld_init(void) {
 #endif
 
   /* Clocks initially all disabled, note the boot ROM clock is disabled
-     because the boot loader is no more required and it draws pretious uAs.*/
+     because the boot loader is no more required and it draws precious uAs.*/
   CLK->PCKENR1 = 0;
   CLK->PCKENR2 = 0;
   CLK->PCKENR3 = 0;

os/hal/src/mmc_spi.c

@@ -96,7 +96,7 @@ static uint8_t crc7(uint8_t crc, const uint8_t *buffer, size_t len) {
 }
 
 /**
- * @brief   Inserion monitor timer callback function.
+ * @brief   Insertion monitor timer callback function.
  *
  * @param[in] p         pointer to the @p MMCDriver object
  *

os/hal/templates/halconf.h

@@ -292,7 +292,7 @@
 
 /**
  * @brief   Number of initialization attempts before rejecting the card.
- * @note    Attempts are performed at 10mS intevals.
+ * @note    Attempts are performed at 10mS intervals.
  */
 #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
 #define SDC_INIT_RETRY              100

os/hal/templates/mac_lld.c

@@ -114,7 +114,7 @@ msg_t max_lld_get_transmit_descriptor(MACDriver *macp,
  * @brief   Writes to a transmit descriptor's stream.
  *
  * @param[in] tdp       pointer to a @p MACTransmitDescriptor structure
- * @param[in] buf       pointer to the buffer cointaining the data to be
+ * @param[in] buf       pointer to the buffer containing the data to be
  *                      written
  * @param[in] size      number of bytes to be written
  * @return              The number of bytes written into the descriptor's

os/kernel/include/chioch.h

@@ -317,7 +317,7 @@ typedef struct {
 
 /**
  * @brief   Adds status flags to the channel's mask.
- * @details This function is usually called from the I/O ISTs in order to
+ * @details This function is usually called from the I/O ISRs in order to
  *          notify I/O conditions such as data events, errors, signal
  *          changes etc.
  *

os/kernel/include/chschd.h

@@ -205,7 +205,7 @@ extern "C" {
 #endif /* !defined(PORT_OPTIMIZED_DOYIELDS) */
 
 /**
- * @brief   Inlineable preemption code.
+ * @brief   Inline-able preemption code.
  * @details This is the common preemption code, this function must be invoked
  *          exclusively from the port layer.
  *

os/kernel/src/chevents.c

@@ -376,7 +376,7 @@ eventmask_t chEvtWaitAll(eventmask_t mask) {
  *          This means that Event Listeners with a lower event identifier have
  *          an higher priority.
  *
- * @param[in] mask      mask of the event flagss that the function should wait
+ * @param[in] mask      mask of the event flags that the function should wait
  *                      for, @p ALL_EVENTS enables all the events
  * @param[in] time      the number of ticks before the operation timeouts,
  *                      the following special values are allowed:

os/kernel/src/chheap.c

@@ -31,7 +31,7 @@
  *          are guaranteed to be thread safe.<br>
  *          By enabling the @p CH_USE_MALLOC_HEAP option the heap manager
  *          will use the runtime-provided @p malloc() and @p free() as
- *          backend for the heap APIs instead of the system provided
+ *          back end for the heap APIs instead of the system provided
  *          allocator.
  * @pre     In order to use the heap APIs the @p CH_USE_HEAP option must
  *          be enabled in @p chconf.h.

os/kernel/src/chmtx.c

@@ -117,14 +117,14 @@ void chMtxLockS(Mutex *mp) {
   chDbgCheckClassS();
   chDbgCheck(mp != NULL, "chMtxLockS");
 
-  /* Ia the mutex already locked? */
+  /* Is the mutex already locked? */
   if (mp->m_owner != NULL) {
     /* Priority inheritance protocol; explores the thread-mutex dependencies
        boosting the priority of all the affected threads to equal the priority
        of the running thread requesting the mutex.*/
     Thread *tp = mp->m_owner;
     /* Does the running thread have higher priority than the mutex
-       ownning thread? */
+       owning thread? */
     while (tp->p_prio < ctp->p_prio) {
       /* Make priority of thread tp match the running thread's priority.*/
       tp->p_prio = ctp->p_prio;
@@ -258,7 +258,7 @@ Mutex *chMtxUnlock(void) {
   chDbgAssert(ctp->p_mtxlist->m_owner == ctp,
               "chMtxUnlock(), #2",
               "ownership failure");
-  /* Removes the top Mutex from the Threads's owned mutexes list and matk it
+  /* Removes the top Mutex from the Thread's owned mutexes list and matk it
      as not owned.*/
   ump = ctp->p_mtxlist;
   ctp->p_mtxlist = ump->m_next;

os/kernel/src/chthreads.c

@@ -149,7 +149,7 @@ void _thread_memfill(uint8_t *startp, uint8_t *endp, uint8_t v) {
  */
 Thread *chThdCreateI(void *wsp, size_t size,
                      tprio_t prio, tfunc_t pf, void *arg) {
-  /* Thread structure is layed out in the lower part of the thread workspace */
+  /* Thread structure is layed out in the lower part of the thread workspace.*/
   Thread *tp = wsp;
 
   chDbgCheckClassI();

os/kernel/templates/chconf.h

@@ -459,7 +459,7 @@
  * @brief   Threads initialization hook.
  * @details User initialization code added to the @p chThdInit() API.
  *
- * @note    It is invoked from within @p chThdInit() and implicitily from all
+ * @note    It is invoked from within @p chThdInit() and implicitly from all
  *          the threads creation APIs.
  */
 #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)

os/kernel/templates/chcore.c

@@ -76,7 +76,7 @@ void port_unlock_from_isr(void) {
 
 /**
  * @brief   Disables all the interrupt sources.
- * @note    Of course non maskable interrupt sources are not included.
+ * @note    Of course non-maskable interrupt sources are not included.
  */
 void port_disable(void) {
 }

readme.txt

@@ -79,6 +79,7 @@
 *****************************************************************************
 
 *** 2.5.0 ***
+- FIX: Spelling fixes (bug 3510812)(backported to 2.4.1).
 - FIX: Fixed STM32 ICUD8 not functional because wrong initialization (bug
   3508758)(backported to 2.4.1).
 - FIX: Fixed chMBFetchI does not decrement mb_fullsem (bug 3504450)(backported