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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@459 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2008-10-04 12:00:18 +00:00
parent a3bb2266cf
commit f44bd871c7
18 changed files with 122 additions and 209 deletions
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3
demos/ARM7-LPC214x-G++/Makefile
View File

@ -93,7 +93,8 @@ TCSRC =
TCPPSRC =
# List ASM source files here
ASMSRC = ../../ports/ARM7-LPC214x/crt0.s ../../ports/ARM7/chsys.s
ASMSRC = ../../ports/ARM7/crt0.s ../../ports/ARM7/chsys.s \
../../ports/ARM7-LPC214x/vectors.s
# List all user directories here
UINCDIR = ../../src/include ../../src/lib ../../test \

3
demos/ARM7-LPC214x-G++/Makefile.thumb
View File

@ -93,7 +93,8 @@ TCSRC = ../../ports/ARM7-LPC214x/chcore.c \
TCPPSRC = ../../src/lib/ch.cpp main.cpp
# List ASM source files here
ASMSRC = ../../ports/ARM7-LPC214x/crt0.s ../../ports/ARM7/chsys.s
ASMSRC = ../../ports/ARM7/crt0.s ../../ports/ARM7/chsys.s \
../../ports/ARM7-LPC214x/vectors.s
# List all user directories here
UINCDIR = ../../src/include ../../src/lib ../../test \

20
demos/ARM7-LPC214x-G++/board.c
View File

@ -58,10 +58,11 @@ static void T0IrqHandler(void) {
}
/*
* Hardware initialization goes here.
* NOTE: Interrupts are still disabled.
* Early initialization code.
* This initialization is performed just after reset before BSS and DATA
* segments initialization.
*/
void hwinit(void) {
void hwinit0(void) {
/*
* All peripherals clock disabled by default in order to save power.
@ -106,6 +107,14 @@ void hwinit(void) {
IO0SET = 0xFFFFFFFF;
IO1DIR = VAL_FIO1DIR;
IO1SET = 0xFFFFFFFF;
}
/*
* Late initialization code.
* This initialization is performed after BSS and DATA segments initialization
* and before invoking the main() function.
*/
void hwinit1(void) {
/*
* Interrupt vectors assignment.
@ -132,4 +141,9 @@ void hwinit(void) {
// InitSSP();
// InitMMC();
// InitBuzzer();
/*
* ChibiOS/RT initialization.
*/
chSysInit();
}

2
demos/ARM7-LPC214x-G++/ch.ld
View File

@ -48,7 +48,7 @@ SECTIONS
.text :
{
_text = .;
KEEP(*(.startup))
KEEP(*(vectors))
*(.text)
*(.text.*);
*(.rodata);

6
demos/ARM7-LPC214x-G++/main.cpp
View File

@ -124,8 +124,8 @@ static void TimerHandler(eventid_t id) {
}
/*
* Entry point, the interrupts are disabled on entry.
* This is the real "application".
* Entry point, note, the main() function is already a thread in the system
* on entry.
*/
int main(int argc, char **argv) {
static const evhandler_t evhndl[] = {
@ -134,8 +134,6 @@ int main(int argc, char **argv) {
static EvTimer evt;
struct EventListener el0;
System::Init(); // ChibiOS/RT goes live here.
evtInit(&evt, 500); // Initializes an event timer.
evtStart(&evt); // Starts the event timer.
chEvtRegister(&evt.et_es, &el0, 0); // Registers a listener on the source.

3
demos/ARM7-LPC214x-GCC-minimal/Makefile
View File

@ -80,7 +80,8 @@ ASRC = ../../ports/ARM7-LPC214x/chcore.c \
TSRC =
# List ASM source files here
ASMSRC = ../../ports/ARM7-LPC214x/crt0.s ../../ports/ARM7/chsys.s
ASMSRC = ../../ports/ARM7/crt0.s ../../ports/ARM7/chsys.s \
../../ports/ARM7-LPC214x/vectors.s
# List all user directories here
UINCDIR = ../../src/include ../../src/lib \

3
demos/ARM7-LPC214x-GCC-minimal/Makefile.thumb
View File

@ -80,7 +80,8 @@ TSRC = ../../ports/ARM7-LPC214x/chcore.c \
board.c main.c
# List ASM source files here
ASMSRC = ../../ports/ARM7-LPC214x/crt0.s ../../ports/ARM7/chsys.s
ASMSRC = ../../ports/ARM7/crt0.s ../../ports/ARM7/chsys.s \
../../ports/ARM7-LPC214x/vectors.s
# List all user directories here
UINCDIR = ../../src/include ../../src/lib \

20
demos/ARM7-LPC214x-GCC-minimal/board.c
View File

@ -58,10 +58,11 @@ static void T0IrqHandler(void) {
}
/*
* Hardware initialization goes here.
* NOTE: Interrupts are still disabled.
* Early initialization code.
* This initialization is performed just after reset before BSS and DATA
* segments initialization.
*/
void hwinit(void) {
void hwinit0(void) {
/*
* All peripherals clock disabled by default in order to save power.
@ -106,6 +107,14 @@ void hwinit(void) {
IO0SET = 0xFFFFFFFF;
IO1DIR = VAL_FIO1DIR;
IO1SET = 0xFFFFFFFF;
}
/*
* Late initialization code.
* This initialization is performed after BSS and DATA segments initialization
* and before invoking the main() function.
*/
void hwinit1(void) {
/*
* Interrupt vectors assignment.
@ -132,4 +141,9 @@ void hwinit(void) {
// InitSSP();
// InitMMC();
// InitBuzzer();
/*
* ChibiOS/RT initialization.
*/
chSysInit();
}

2
demos/ARM7-LPC214x-GCC-minimal/ch.ld
View File

@ -48,7 +48,7 @@ SECTIONS
.text :
{
_text = .;
KEEP(*(.startup))
KEEP(*(vectors))
*(.text)
*(.text.*);
*(.rodata);

9
demos/ARM7-LPC214x-GCC-minimal/main.c
View File

@ -56,16 +56,11 @@ static msg_t Thread2(void *arg) {
}
/*
* Entry point, the interrupts are disabled on entry.
* Entry point, note, the main() function is already a thread in the system
* on entry.
*/
int main(int argc, char **argv) {
/*
* The main() function becomes a thread here then the interrupts are
* enabled and ChibiOS/RT goes live.
*/
chSysInit();
/*
* Creates the blinker threads.
*/

3
demos/ARM7-LPC214x-GCC/Makefile
View File

@ -84,7 +84,8 @@ ASRC = ../../ports/ARM7-LPC214x/chcore.c \
TSRC =
# List ASM source files here
ASMSRC = ../../ports/ARM7-LPC214x/crt0.s ../../ports/ARM7/chsys.s
ASMSRC = ../../ports/ARM7/crt0.s ../../ports/ARM7/chsys.s \
../../ports/ARM7-LPC214x/vectors.s
# List all user directories here
UINCDIR = ../../src/include ../../src/lib ../../test \

3
demos/ARM7-LPC214x-GCC/Makefile.thumb
View File

@ -84,7 +84,8 @@ TSRC = ../../ports/ARM7-LPC214x/chcore.c \
board.c buzzer.c mmcsd.c main.c
# List ASM source files here
ASMSRC = ../../ports/ARM7-LPC214x/crt0.s ../../ports/ARM7/chsys.s
ASMSRC = ../../ports/ARM7/crt0.s ../../ports/ARM7/chsys.s \
../../ports/ARM7-LPC214x/vectors.s
# List all user directories here
UINCDIR = ../../src/include ../../src/lib ../../test \

20
demos/ARM7-LPC214x-GCC/board.c
View File

@ -58,10 +58,11 @@ static void T0IrqHandler(void) {
}
/*
* Hardware initialization goes here.
* NOTE: Interrupts are still disabled.
* Early initialization code.
* This initialization is performed just after reset before BSS and DATA
* segments initialization.
*/
void hwinit(void) {
void hwinit0(void) {
/*
* All peripherals clock disabled by default in order to save power.
@ -106,6 +107,14 @@ void hwinit(void) {
IO0SET = 0xFFFFFFFF;
IO1DIR = VAL_FIO1DIR;
IO1SET = 0xFFFFFFFF;
}
/*
* Late initialization code.
* This initialization is performed after BSS and DATA segments initialization
* and before invoking the main() function.
*/
void hwinit1(void) {
/*
* Interrupt vectors assignment.
@ -132,4 +141,9 @@ void hwinit(void) {
InitSSP();
InitMMC();
InitBuzzer();
/*
* ChibiOS/RT initialization.
*/
chSysInit();
}

2
demos/ARM7-LPC214x-GCC/ch.ld
View File

@ -48,7 +48,7 @@ SECTIONS
.text :
{
_text = .;
KEEP(*(.startup))
KEEP(*(vectors))
*(.text)
*(.text.*);
*(.rodata);

9
demos/ARM7-LPC214x-GCC/main.c
View File

@ -109,7 +109,8 @@ static void RemoveHandler(eventid_t id) {
}
/*
* Entry point, the interrupts are disabled on entry.
* Entry point, note, the main() function is already a thread in the system
* on entry.
*/
int main(int argc, char **argv) {
static const evhandler_t evhndl[] = {
@ -120,12 +121,6 @@ int main(int argc, char **argv) {
static EvTimer evt;
struct EventListener el0, el1, el2;
/*
* The main() function becomes a thread here then the interrupts are
* enabled and ChibiOS/RT goes live.
*/
chSysInit();
/*
* If a button is pressed during the reset then the blinking leds threads
* are not started in order to make accurate benchmarks.

172
ports/ARM7-LPC214x/crt0.s
View File

@ -1,172 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* Generic ARM startup file for ChibiOS/RT.
*/
.set MODE_USR, 0x10
.set MODE_FIQ, 0x11
.set MODE_IRQ, 0x12
.set MODE_SVC, 0x13
.set MODE_ABT, 0x17
.set MODE_UND, 0x1B
.set MODE_SYS, 0x1F
.equ I_BIT, 0x80
.equ F_BIT, 0x40
.section .startup
.code 32
.balign 4
/*
* System entry points.
*/
_start:
ldr pc, _reset
ldr pc, _undefined
ldr pc, _swi
ldr pc, _prefetch
ldr pc, _abort
nop
ldr pc, [pc,#-0xFF0] /* VIC - IRQ Vector Register */
ldr pc, _fiq
_reset:
.word ResetHandler
_undefined:
.word UndHandler
_swi:
.word SwiHandler
_prefetch:
.word PrefetchHandler
_abort:
.word AbortHandler
_fiq:
.word FiqHandler
.word 0
.word 0
/*
* Reset handler.
*/
.text
ResetHandler:
/*
* Stack pointers initialization.
*/
ldr r0, =__ram_end__
/* Undefined */
msr CPSR_c, #MODE_UND | I_BIT | F_BIT
mov sp, r0
ldr r1, =__und_stack_size__
sub r0, r0, r1
/* Abort */
msr CPSR_c, #MODE_ABT | I_BIT | F_BIT
mov sp, r0
ldr r1, =__abt_stack_size__
sub r0, r0, r1
/* FIQ */
msr CPSR_c, #MODE_FIQ | I_BIT | F_BIT
mov sp, r0
ldr r1, =__fiq_stack_size__
sub r0, r0, r1
/* IRQ */
msr CPSR_c, #MODE_IRQ | I_BIT | F_BIT
mov sp, r0
ldr r1, =__irq_stack_size__
sub r0, r0, r1
/* Supervisor */
msr CPSR_c, #MODE_SVC | I_BIT | F_BIT
mov sp, r0
ldr r1, =__svc_stack_size__
sub r0, r0, r1
/* System */
msr CPSR_c, #MODE_SYS | I_BIT | F_BIT
mov sp, r0
// ldr r1, =__sys_stack_size__
// sub r0, r0, r1
/*
* Data initialization.
* NOTE: It assumes that the DATA size is a multiple of 4.
*/
ldr r1, =_textdata
ldr r2, =_data
ldr r3, =_edata
dataloop:
cmp r2, r3
ldrlo r0, [r1], #4
strlo r0, [r2], #4
blo dataloop
/*
* BSS initialization.
* NOTE: It assumes that the BSS size is a multiple of 4.
*/
mov r0, #0
ldr r1, =_bss_start
ldr r2, =_bss_end
bssloop:
cmp r1, r2
strlo r0, [r1], #4
blo bssloop
/*
* Application-provided HW initialization routine.
*/
#ifndef THUMB_NO_INTERWORKING
bl hwinit
/*
* main(0, NULL).
*/
mov r0, #0
mov r1, r0
bl main
bl chSysHalt
#else
add r0, pc, #1
bx r0
.code 16
bl hwinit
mov r0, #0
mov r1, r0
bl main
bl chSysHalt
.code 32
#endif
.weak UndHandler
.globl UndHandler
UndHandler:
.weak SwiHandler
.globl SwiHandler
SwiHandler:
.weak PrefetchHandler
.globl PrefetchHandler
PrefetchHandler:
.weak AbortHandler
.globl AbortHandler
AbortHandler:
.weak FiqHandler
.globl FiqHandler
FiqHandler:
.loop: b .loop

49
ports/ARM7-LPC214x/vectors.s Normal file
View File

@ -0,0 +1,49 @@
/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
.section vectors
.code 32
.balign 4
/*
* System entry points.
*/
_start:
ldr pc, _reset
ldr pc, _undefined
ldr pc, _swi
ldr pc, _prefetch
ldr pc, _abort
nop
ldr pc, [pc,#-0xFF0] /* VIC - IRQ Vector Register */
ldr pc, _fiq
_reset:
.word ResetHandler
_undefined:
.word UndHandler
_swi:
.word SwiHandler
_prefetch:
.word PrefetchHandler
_abort:
.word AbortHandler
_fiq:
.word FiqHandler
.word 0
.word 0

2
readme.txt
View File

@ -83,7 +83,7 @@ Win32-MinGW - ChibiOS/RT simulator and demo into a WIN32 process,
projects. The new startup file implements early and late initialization
phases as described above for the CM3 startup file.
The architecture specific vector tables are now encapsulated into the
vectors.s file.
vectors.s files.
- Modified the STM32 demo makefile to use the latest YAGARTO toolchain as
default (arm-elf-gcc).