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HAL improvements, mailboxes macro name changed. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2238 35acf78f-673a-0410-8e92-d51de3d6d3f4
master
gdisirio 2010-10-08 18:16:38 +00:00
parent 38cc48d575
commit f407e4a84f
29 changed files with 176 additions and 1576 deletions
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6
os/hal/include/adc.h
View File

@ -88,13 +88,11 @@ extern "C" {
bool_t adcStartConversion(ADCDriver *adcp,
const ADCConversionGroup *grpp,
adcsample_t *samples,
size_t depth,
adccallback_t callback);
size_t depth);
bool_t adcStartConversionI(ADCDriver *adcp,
const ADCConversionGroup *grpp,
adcsample_t *samples,
size_t depth,
adccallback_t callback);
size_t depth);
void adcStopConversion(ADCDriver *adcp);
void adcStopConversionI(ADCDriver *adcp);
#if ADC_USE_WAIT

7
os/hal/include/pwm.h
View File

@ -65,13 +65,6 @@ typedef enum {
PWM_OUTPUT_ACTIVE_LOW = 2 /**< @brief Idle is logic level 1. */
} pwmmode_t;
/**
* @brief PWM notification callback type.
*
* @param[in] active current channel output state
*/
typedef void (*pwmcallback_t)(void);
#include "pwm_lld.h"
/*===========================================================================*/

10
os/hal/platforms/STM32/adc_lld.c
View File

@ -66,9 +66,9 @@ CH_IRQ_HANDLER(DMA1_Ch1_IRQHandler) {
dmaClearChannel(STM32_DMA1, STM32_DMA_CHANNEL_1);
if ((isr & DMA_ISR_HTIF1) != 0) {
/* Half transfer processing.*/
if (ADCD1.ad_callback != NULL) {
if (ADCD1.ad_grpp->acg_callback != NULL) {
/* Invokes the callback passing the 1st half of the buffer.*/
ADCD1.ad_callback(ADCD1.ad_samples, ADCD1.ad_depth / 2);
ADCD1.ad_grpp->acg_callback(&ADCD1, ADCD1.ad_samples, ADCD1.ad_depth / 2);
}
}
if ((isr & DMA_ISR_TCIF1) != 0) {
@ -85,15 +85,15 @@ CH_IRQ_HANDLER(DMA1_Ch1_IRQHandler) {
#endif
}
/* Callback handling.*/
if (ADCD1.ad_callback != NULL) {
if (ADCD1.ad_grpp->acg_callback != NULL) {
if (ADCD1.ad_depth > 1) {
/* Invokes the callback passing the 2nd half of the buffer.*/
size_t half = ADCD1.ad_depth / 2;
ADCD1.ad_callback(ADCD1.ad_samples + half, half);
ADCD1.ad_grpp->acg_callback(&ADCD1, ADCD1.ad_samples + half, half);
}
else {
/* Invokes the callback passing the whole buffer.*/
ADCD1.ad_callback(ADCD1.ad_samples, ADCD1.ad_depth);
ADCD1.ad_grpp->acg_callback(&ADCD1, ADCD1.ad_samples, ADCD1.ad_depth);
}
}
}

26
os/hal/platforms/STM32/adc_lld.h
View File

@ -114,13 +114,20 @@ typedef uint16_t adcsample_t;
*/
typedef uint16_t adc_channels_num_t;
/**
* @brief Type of a structure representing an ADC driver.
*/
typedef struct ADCDriver ADCDriver;
/**
* @brief ADC notification callback type.
*
* @param[in] adcp pointer to the @p ADCDriver object triggering the
* callback
* @param[in] buffer pointer to the most recent samples data
* @param[in] n number of buffer rows available starting from @p buffer
*/
typedef void (*adccallback_t)(adcsample_t *buffer, size_t n);
typedef void (*adccallback_t)(ADCDriver *adcp, adcsample_t *buffer, size_t n);
/**
* @brief Conversion group configuration structure.
@ -139,6 +146,10 @@ typedef struct {
* @brief Number of the analog channels belonging to the conversion group.
*/
adc_channels_num_t acg_num_channels;
/**
* @brief Callback function associated to the group or @p NULL.
*/
adccallback_t acg_callback;
/* End of the mandatory fields.*/
/**
* @brief ADC CR1 register initialization data.
@ -185,7 +196,7 @@ typedef struct {
/**
* @brief Structure representing an ADC driver.
*/
typedef struct {
struct ADCDriver {
/**
* @brief Driver state.
*/
@ -194,10 +205,6 @@ typedef struct {
* @brief Current configuration data.
*/
const ADCConfig *ad_config;
/**
* @brief Current callback function or @p NULL.
*/
adccallback_t ad_callback;
/**
* @brief Current samples buffer pointer or @p NULL.
*/
@ -210,11 +217,14 @@ typedef struct {
* @brief Current conversion group pointer or @p NULL.
*/
const ADCConversionGroup *ad_grpp;
#if ADC_USE_WAIT
#if ADC_USE_WAIT || defined(__DOXYGEN__)
/**
* @brief Synchronization semaphore.
*/
Semaphore ad_sem;
#endif
#if defined(ADC_DRIVER_EXT_FIELDS)
ADC_DRIVER_EXT_FIELDS
#endif
/* End of the mandatory fields.*/
/**
@ -229,7 +239,7 @@ typedef struct {
* @brief DMA CCR register bit mask.
*/
uint32_t ad_dmaccr;
} ADCDriver;
};
/*===========================================================================*/
/* Driver macros. */

18
os/hal/platforms/STM32/pwm_lld.c
View File

@ -106,13 +106,13 @@ static void serve_interrupt(PWMDriver *pwmp) {
pwmp->pd_tim->SR = ~(TIM_SR_CC1IF | TIM_SR_CC2IF | TIM_SR_CC3IF |
TIM_SR_CC4IF | TIM_SR_UIF);
if ((sr & TIM_SR_CC1IF) != 0)
pwmp->pd_config->pc_channels[0].pcc_callback();
pwmp->pd_config->pc_channels[0].pcc_callback(pwmp);
if ((sr & TIM_SR_CC2IF) != 0)
pwmp->pd_config->pc_channels[1].pcc_callback();
pwmp->pd_config->pc_channels[1].pcc_callback(pwmp);
if ((sr & TIM_SR_CC3IF) != 0)
pwmp->pd_config->pc_channels[2].pcc_callback();
pwmp->pd_config->pc_channels[2].pcc_callback(pwmp);
if ((sr & TIM_SR_CC4IF) != 0)
pwmp->pd_config->pc_channels[3].pcc_callback();
pwmp->pd_config->pc_channels[3].pcc_callback(pwmp);
if ((sr & TIM_SR_UIF) != 0)
pwmp->pd_config->pc_callback();
}
@ -136,7 +136,7 @@ CH_IRQ_HANDLER(TIM1_UP_IRQHandler) {
CH_IRQ_PROLOGUE();
TIM1->SR = ~TIM_SR_UIF;
PWMD1.pd_config->pc_callback();
PWMD1.pd_config->pc_callback(&PWMD1);
CH_IRQ_EPILOGUE();
}
@ -157,13 +157,13 @@ CH_IRQ_HANDLER(TIM1_CC_IRQHandler) {
sr = TIM1->SR & TIM1->DIER;
TIM1->SR = ~(TIM_SR_CC1IF | TIM_SR_CC2IF | TIM_SR_CC3IF | TIM_SR_CC4IF);
if ((sr & TIM_SR_CC1IF) != 0)
PWMD1.pd_config->pc_channels[0].pcc_callback();
PWMD1.pd_config->pc_channels[0].pcc_callback(&PWMD1);
if ((sr & TIM_SR_CC2IF) != 0)
PWMD1.pd_config->pc_channels[1].pcc_callback();
PWMD1.pd_config->pc_channels[1].pcc_callback(&PWMD1);
if ((sr & TIM_SR_CC3IF) != 0)
PWMD1.pd_config->pc_channels[2].pcc_callback();
PWMD1.pd_config->pc_channels[2].pcc_callback(&PWMD1);
if ((sr & TIM_SR_CC4IF) != 0)
PWMD1.pd_config->pc_channels[3].pcc_callback();
PWMD1.pd_config->pc_channels[3].pcc_callback(&PWMD1);
CH_IRQ_EPILOGUE();
}

20
os/hal/platforms/STM32/pwm_lld.h
View File

@ -135,6 +135,18 @@ typedef uint8_t pwmchannel_t;
*/
typedef uint16_t pwmcnt_t;
/**
* @brief Type of a structure representing an PWM driver.
*/
typedef struct PWMDriver PWMDriver;
/**
* @brief PWM notification callback type.
*
* @param[in] pwmp pointer to a @p PWMDriver object
*/
typedef void (*pwmcallback_t)(PWMDriver *pwmp);
/**
* @brief PWM driver channel configuration structure.
* @note It could be empty on some architectures.
@ -155,7 +167,6 @@ typedef struct {
/**
* @brief PWM driver configuration structure.
* @note It could be empty on some architectures.
*/
typedef struct {
/**
@ -187,7 +198,7 @@ typedef struct {
/**
* @brief Structure representing a PWM driver.
*/
typedef struct {
struct PWMDriver {
/**
* @brief Driver state.
*/
@ -196,6 +207,9 @@ typedef struct {
* @brief Current driver configuration data.
*/
const PWMConfig *pd_config;
#if defined(PWM_DRIVER_EXT_FIELDS)
PWM_DRIVER_EXT_FIELDS
#endif
/* End of the mandatory fields.*/
/**
* @brief Bit mask of the enabled channels.
@ -205,7 +219,7 @@ typedef struct {
* @brief Pointer to the TIMx registers block.
*/
TIM_TypeDef *pd_tim;
} PWMDriver;
};
/*===========================================================================*/
/* Driver macros. */

1
os/hal/platforms/STM32/stm32_dma.c
View File

@ -20,6 +20,7 @@
/**
* @file stm32_dma.c
* @brief STM32 DMA helper driver code.
*
* @addtogroup STM32_DMA
* @{
*/

3
os/hal/platforms/STM32/uart_lld.h
View File

@ -233,6 +233,9 @@ struct UARTDriver {
uartrxstate_t ud_rxstate;
/** @brief UART driver status flags.*/
uartflags_t ud_flags;
#if defined(UART_DRIVER_EXT_FIELDS)
UART_DRIVER_EXT_FIELDS
#endif
/* End of the mandatory fields.*/
/** @brief Pointer to the USART registers block.*/
USART_TypeDef *ud_usart;

14
os/hal/src/adc.c
View File

@ -67,7 +67,6 @@ void adcObjectInit(ADCDriver *adcp) {
adcp->ad_state = ADC_STOP;
adcp->ad_config = NULL;
adcp->ad_callback = NULL;
adcp->ad_samples = NULL;
adcp->ad_depth = 0;
adcp->ad_grpp = NULL;
@ -142,8 +141,6 @@ void adcStop(ADCDriver *adcp) {
* @param[out] samples pointer to the samples buffer
* @param[in] depth buffer depth (matrix rows number). The buffer depth
* must be one or an even number.
* @param[in] callback pointer to the conversion callback function, this
* parameter can be @p NULL if a callback is not required
* @return The operation status.
* @retval FALSE the conversion has been started.
* @retval TRUE the driver is busy, conversion not started.
@ -153,12 +150,11 @@ void adcStop(ADCDriver *adcp) {
bool_t adcStartConversion(ADCDriver *adcp,
const ADCConversionGroup *grpp,
adcsample_t *samples,
size_t depth,
adccallback_t callback) {
size_t depth) {
bool_t result;
chSysLock();
result = adcStartConversionI(adcp, grpp, samples, depth, callback);
result = adcStartConversionI(adcp, grpp, samples, depth);
chSysUnlock();
return result;
}
@ -187,8 +183,6 @@ bool_t adcStartConversion(ADCDriver *adcp,
* @param[out] samples pointer to the samples buffer
* @param[in] depth buffer depth (matrix rows number). The buffer depth
* must be one or an even number.
* @param[in] callback pointer to the conversion callback function, this
* parameter can be @p NULL if a callback is not required
* @return The operation status.
* @retval FALSE the conversion has been started.
* @retval TRUE the driver is busy, conversion not started.
@ -198,8 +192,7 @@ bool_t adcStartConversion(ADCDriver *adcp,
bool_t adcStartConversionI(ADCDriver *adcp,
const ADCConversionGroup *grpp,
adcsample_t *samples,
size_t depth,
adccallback_t callback) {
size_t depth) {
chDbgCheck((adcp != NULL) && (grpp != NULL) && (samples != NULL) &&
((depth == 1) || ((depth & 1) == 0)),
@ -212,7 +205,6 @@ bool_t adcStartConversionI(ADCDriver *adcp,
"invalid state");
if (adcp->ad_state == ADC_RUNNING)
return TRUE;
adcp->ad_callback = callback;
adcp->ad_samples = samples;
adcp->ad_depth = depth;
adcp->ad_grpp = grpp;

26
os/hal/templates/adc_lld.h
View File

@ -60,13 +60,20 @@ typedef uint16_t adcsample_t;
*/
typedef uint16_t adc_channels_num_t;
/**
* @brief Type of a structure representing an ADC driver.
*/
typedef struct ADCDriver ADCDriver;
/**
* @brief ADC notification callback type.
*
* @param[in] adcp pointer to the @p ADCDriver object triggering the
* callback
* @param[in] buffer pointer to the most recent samples data
* @param[in] n number of buffer rows available starting from @p buffer
*/
typedef void (*adccallback_t)(adcsample_t *buffer, size_t n);
typedef void (*adccallback_t)(ADCDriver *adcp, adcsample_t *buffer, size_t n);
/**
* @brief Conversion group configuration structure.
@ -84,6 +91,10 @@ typedef struct {
* @brief Number of the analog channels belonging to the conversion group.
*/
adc_channels_num_t acg_num_channels;
/**
* @brief Callback function associated to the group or @p NULL.
*/
adccallback_t acg_callback;
/* End of the mandatory fields.*/
} ADCConversionGroup;
@ -102,7 +113,7 @@ typedef struct {
* @note Implementations may extend this structure to contain more,
* architecture dependent, fields.
*/
typedef struct {
struct ADCDriver {
/**
* @brief Driver state.
*/
@ -111,10 +122,6 @@ typedef struct {
* @brief Current configuration data.
*/
const ADCConfig *ad_config;
/**
* @brief Current callback function or @p NULL.
*/
adccallback_t ad_callback;
/**
* @brief Current samples buffer pointer or @p NULL.
*/
@ -127,14 +134,17 @@ typedef struct {
* @brief Current conversion group pointer or @p NULL.
*/
const ADCConversionGroup *ad_grpp;
#if ADC_USE_WAIT
#if ADC_USE_WAIT || defined(__DOXYGEN__)
/**
* @brief Synchronization semaphore.
*/
Semaphore ad_sem;
#endif
#if defined(ADC_DRIVER_EXT_FIELDS)
ADC_DRIVER_EXT_FIELDS
#endif
/* End of the mandatory fields.*/
} ADCDriver;
};
/*===========================================================================*/
/* Driver macros. */

13
os/hal/templates/i2c_lld.h
View File

@ -46,6 +46,12 @@
/* Driver data structures and types. */
/*===========================================================================*/
/**
* @brief Type of a structure representing an I2C driver.
*/
typedef struct I2CDriver I2CDriver;
/**
* @brief I2C completion callback type.
*
@ -70,15 +76,18 @@ typedef struct {
* @note Implementations may extend this structure to contain more,
* architecture dependent, fields.
*/
typedef struct {
struct I2CDriver {
/** @brief Driver state.*/
i2cstate_t id_state;
/** @brief Current configuration data.*/
const I2CConfig *id_config;
/** @brief Current callback.*/
i2ccallback_t id_callback;
#if defined(I2C_DRIVER_EXT_FIELDS)
I2C_DRIVER_EXT_FIELDS
#endif
/* End of the mandatory fields.*/
} I2CDriver;
};
/*===========================================================================*/
/* Driver macros. */

34
os/hal/templates/pwm_lld.h
View File

@ -61,14 +61,35 @@ typedef uint8_t pwmchannel_t;
*/
typedef uint16_t pwmcnt_t;
/**
* @brief Type of a structure representing an PWM driver.
*/
typedef struct PWMDriver PWMDriver;
/**
* @brief PWM notification callback type.
*
* @param[in] pwmp pointer to a @p PWMDriver object
*/
typedef void (*pwmcallback_t)(PWMDriver *pwmp);
/**
* @brief Driver configuration structure.
* @note Implementations may extend this structure to contain more,
* architecture dependent, fields.
* @note It could be empty on some architectures.
*/
typedef struct {
/**
* @brief Periodic callback pointer.
* @note This callback is invoked on PWM counter reset. If set to
* @p NULL then the callback is disabled.
*/
pwmcallback_t pc_callback;
/**
* @brief Channels configurations.
*/
PWMChannelConfig pc_channels[PWM_CHANNELS];
/* End of the mandatory fields.*/
} PWMConfig;
/**
@ -76,7 +97,7 @@ typedef struct {
* @note Implementations may extend this structure to contain more,
* architecture dependent, fields.
*/
typedef struct {
struct PWMDriver {
/**
* @brief Driver state.
*/
@ -85,8 +106,11 @@ typedef struct {
* @brief Current configuration data.
*/
const PWMConfig *pd_config;
#if defined(PWM_DRIVER_EXT_FIELDS)
PWM_DRIVER_EXT_FIELDS
#endif
/* End of the mandatory fields.*/
} PWMDriver;
};
/*===========================================================================*/
/* Driver macros. */
@ -103,8 +127,6 @@ extern "C" {
void pwm_lld_start(PWMDriver *pwmp);
void pwm_lld_stop(PWMDriver *pwmp);
bool_t pwm_lld_is_enabled(PWMDriver *pwmp, pwmchannel_t channel);
void pwm_lld_set_callback(PWMDriver *pwmp, pwmchannel_t channel,
pwmedge_t edge, pwmcallback_t callback);
void pwm_lld_enable_channel(PWMDriver *pwmp,
pwmchannel_t channel,
pwmcnt_t width);

13
os/hal/templates/uart_lld.h
View File

@ -52,9 +52,7 @@
typedef uint32_t uartflags_t;
/**
* @brief Structure representing an UART driver.
* @note Implementations may extend this structure to contain more,
* architecture dependent, fields.
* @brief Type of structure representing an UART driver.
*/
typedef struct UARTDriver UARTDriver;
@ -68,7 +66,8 @@ typedef void (*uartcb_t)(UARTDriver *uartp);
/**
* @brief Character received UART notification callback type.
*
* @param[in] uartp pointer to the @p UARTDriver object
* @param[in] uartp pointer to the @p UARTDriver object triggering the
* callback
* @param[in] c received character
*/
typedef void (*uartccb_t)(UARTDriver *uartp, uint16_t c);
@ -76,7 +75,8 @@ typedef void (*uartccb_t)(UARTDriver *uartp, uint16_t c);
/**
* @brief Receive error UART notification callback type.
*
* @param[in] uartp pointer to the @p UARTDriver object
* @param[in] uartp pointer to the @p UARTDriver object triggering the
* callback
* @param[in] e receive error mask
*/
typedef void (*uartecb_t)(UARTDriver *uartp, uartflags_t e);
@ -122,6 +122,9 @@ struct UARTDriver {
* @brief Current configuration data.
*/
const UARTConfig *ud_config;
#if defined(UART_DRIVER_EXT_FIELDS)
UART_DRIVER_EXT_FIELDS
#endif
/* End of the mandatory fields.*/
};

4
os/kernel/include/chmboxes.h
View File

@ -93,7 +93,7 @@ extern "C" {
#define chMBGetFreeCountI(mbp) chSemGetCounterI(&(mbp)->mb_emptysem)
/**
* @brief Returns the number of queued messages into a mailbox.
* @brief Returns the number of used message slots into a mailbox.
* @note Can be invoked in any system state but if invoked out of a locked
* state then the returned value may change after reading.
* @note The returned value can be less than zero when there are waiting
@ -104,7 +104,7 @@ extern "C" {
*
* @iclass
*/
#define chMBGetFullCountI(mbp) chSemGetCounterI(&(mbp)->mb_fullsem)
#define chMBGetUsedCountI(mbp) chSemGetCounterI(&(mbp)->mb_fullsem)
/**
* @brief Returns the next message in the queue without removing it.

13
readme.txt
View File

@ -91,6 +91,12 @@
2.0.3).
- FIX: Fixed a documentation error regarding the ADC driver function
adcStartConversion() (bug 3039890)(backported to 2.0.3).
- NEW: Added an ADC_DRIVER_EXT_FIELDS macro to the ADCDriver structure
in order to be able to insert extra fields.
- NEW: Added an PWM_DRIVER_EXT_FIELDS macro to the PWMDriver structure
in order to be able to insert extra fields.
- NEW: Added an UART_DRIVER_EXT_FIELDS macro to the UARTDriver structure
in order to be able to insert extra fields.
- NEW: More assertions added to the kernel.
- NEW: New kernel hooks: SYSTEM_TICK_EVENT_HOOK(), SYSTEM_HALT_HOOK().
- NEW: Added board files for the Olimex STM32-H103.
@ -128,13 +134,18 @@
make clear it is usable from interrupt handlers.
- CHANGE: The mailboxes macros chMBSize(), chMBGetEmpty(), chMBGetFull(),
chMBPeek() have been renamed to chMBSizeI(), chMBGetFreeCountI(),
chMBGetFullCountI(), chMBPeekI().
chMBGetUsedCountI(), chMBPeekI().
- CHANGE: The queue APIs chQSize(), chQSpace(), chIQIsEmpty(), chIQIsFull(),
chOQIsEmpty(), chOQIsFull() have been renamed to chQSizeI(), chQSpaceI(),
chIQIsEmptyI(), chIQIsFullI(), chOQIsEmptyI(), chOQIsFullI().
- CHANGE: The event APIs chEvtPend() and chEvtClear() have been renamed
to chEvtAddFlags() and chEvtClearFlags() for consistency and correct
English. Changed the macro chEvtIsListening() in chEvtIsListeningI().
- CHANGE: Added a parameter to the ADC driver callbacks, the pointer to the
driver itself. Now the callback is statically associated to the conversion
group, thanks to this the ADC function calls have one less parameter.
- CHANGE: Added a parameter to the PWM driver callbacks, the pointer to the
driver itself.
- CHANGE: Added a parameter to the UART driver callbacks, the pointer to the
driver itself.
- CHANGE: In the UART driver now an error does not automatically brings the

6
test/testmbox.c
View File

@ -105,7 +105,7 @@ static void mbox1_execute(void) {
* Testing final conditions.
*/
test_assert(5, chMBGetFreeCountI(&mb1) == 0, "still empty");
test_assert(6, chMBGetFullCountI(&mb1) == MB_SIZE, "not full");
test_assert(6, chMBGetUsedCountI(&mb1) == MB_SIZE, "not full");
test_assert(7, mb1.mb_rdptr == mb1.mb_wrptr, "pointers not aligned");
/*
@ -138,7 +138,7 @@ static void mbox1_execute(void) {
* Testing final conditions.
*/
test_assert(15, chMBGetFreeCountI(&mb1) == MB_SIZE, "not empty");
test_assert(16, chMBGetFullCountI(&mb1) == 0, "still full");
test_assert(16, chMBGetUsedCountI(&mb1) == 0, "still full");
test_assert(17, mb1.mb_rdptr == mb1.mb_wrptr, "pointers not aligned");
/*
@ -150,7 +150,7 @@ static void mbox1_execute(void) {
* Re-testing final conditions.
*/
test_assert(18, chMBGetFreeCountI(&mb1) == MB_SIZE, "not empty");
test_assert(19, chMBGetFullCountI(&mb1) == 0, "still full");
test_assert(19, chMBGetUsedCountI(&mb1) == 0, "still full");
test_assert(20, mb1.mb_buffer == mb1.mb_wrptr, "write pointer not aligned to base");
test_assert(21, mb1.mb_buffer == mb1.mb_rdptr, "read pointer not aligned to base");
}

3
test/testsem.c
View File

@ -42,7 +42,6 @@
* - @subpage test_sem_001
* - @subpage test_sem_002
* - @subpage test_sem_003
* - @subpage test_sem_004
* .
* @file testsem.c
* @brief Semaphores test source file
@ -232,7 +231,7 @@ ROMCONST struct testcase testsem3 = {
#endif /* CH_USE_SEMSW */
/**
* @page test_sem_004 Binary wait and signal
* @page test_sem_004 Binary Wait and Signal
*
* <h2>Description</h2>
* This test case tests the binary semaphores functionality. The test both

38
testhal/STM32/ADC/main.c
View File

@ -28,6 +28,24 @@
*/
static const ADCConfig adccfg = {};
static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
static Thread *adctp;
/*
* ADC streaming callback.
*/
size_t nx = 0, ny = 0;
static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) {
(void)adcp;
if (samples == buffer) {
nx += n;
}
else {
ny += n;
}
}
/*
* ADC conversion group.
* Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered.
@ -36,6 +54,7 @@ static const ADCConfig adccfg = {};
static const ADCConversionGroup adcgrpcfg = {
TRUE,
ADC_GRP1_NUM_CHANNELS,
adccallback,
0,
ADC_CR2_EXTSEL_SWSTART | ADC_CR2_TSVREFE | ADC_CR2_CONT,
0,
@ -46,22 +65,6 @@ static const ADCConversionGroup adcgrpcfg = {
ADC_SQR3_SQ3_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN10) |
ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ0_N(ADC_CHANNEL_IN10)
};
static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
static Thread *adctp;
/*
* ADC streaming callback.
*/
size_t nx = 0, ny = 0;
static void adccallback(adcsample_t *buffer, size_t n) {
if (samples == buffer) {
nx += n;
}
else {
ny += n;
}
}
/*
* ADC continuous conversion thread.
@ -71,8 +74,7 @@ static msg_t adc_continuous_thread(void *p){
(void)p;
adcStart(&ADCD1, &adccfg);
adcStartConversion(&ADCD1, &adcgrpcfg, samples,
ADC_GRP1_BUF_DEPTH, adccallback);
adcStartConversion(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH);
adcWaitConversion(&ADCD1, TIME_INFINITE);
adcStop(&ADCD1);
return 0;

8
testhal/STM32/PWM/main.c
View File

@ -36,10 +36,14 @@ static msg_t Thread1(void *arg) {
return 0;
}
static void pwmpcb(void) {
static void pwmpcb(PWMDriver *pwmp) {
(void)pwmp;
}
static void pwmc1cb(void) {
static void pwmc1cb(PWMDriver *pwmp) {
(void)pwmp;
}
static PWMConfig pwmcfg = {

204
testhal/STM32/_stess_test/Makefile
View File

@ -1,204 +0,0 @@
##############################################################################
# Build global options
# NOTE: Can be overridden externally.
#
# Compiler options here.
ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer -mabi=apcs-gnu -falign-functions=16
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
endif
# Enable this if you want the linker to remove unused code and data
ifeq ($(USE_LINK_GC),)
USE_LINK_GC = yes
endif
# If enabled, this option allows to compile the application in THUMB mode.
ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
endif
#
# Build global options
##############################################################################
##############################################################################
# Architecture or project specific options
#
# Enable this if you really want to use the STM FWLib.
ifeq ($(USE_FWLIB),)
USE_FWLIB = no
endif
#
# Architecture or project specific options
##############################################################################
##############################################################################
# Project, sources and paths
#
# Define project name here
PROJECT = ch
# Define linker script file here
LDSCRIPT= ch.ld
# Imported source files
CHIBIOS = ../../..
include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk
include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/port.mk
include $(CHIBIOS)/os/kernel/kernel.mk
include $(CHIBIOS)/test/test.mk
# C sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CSRC = $(PORTSRC) \
$(KERNSRC) \
$(TESTSRC) \
$(HALSRC) \
$(PLATFORMSRC) \
$(BOARDSRC) \
$(CHIBIOS)/os/various/evtimer.c \
$(CHIBIOS)/os/various/syscalls.c \
settings.c main.c
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CPPSRC =
# C sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACSRC =
# C++ sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACPPSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCPPSRC =
# List ASM source files here
ASMSRC = $(PORTASM) \
$(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
$(CHIBIOS)/os/various
#
# Project, sources and paths
##############################################################################
##############################################################################
# Compiler settings
#
MCU = cortex-m3
TRGT = arm-none-eabi-
CC = $(TRGT)gcc
CPPC = $(TRGT)g++
# Enable loading with g++ only if you need C++ runtime support.
# NOTE: You can use C++ even without C++ support if you are careful. C++
# runtime support makes code size explode.
LD = $(TRGT)gcc
#LD = $(TRGT)g++
CP = $(TRGT)objcopy
AS = $(TRGT)gcc -x assembler-with-cpp
OD = $(TRGT)objdump
HEX = $(CP) -O ihex
BIN = $(CP) -O binary
# ARM-specific options here
AOPT =
# THUMB-specific options here
TOPT = -mthumb -DTHUMB
# Define C warning options here
CWARN = -Wall -Wextra -Wstrict-prototypes
# Define C++ warning options here
CPPWARN = -Wall -Wextra
#
# Compiler settings
##############################################################################
##############################################################################
# Start of default section
#
# List all default C defines here, like -D_DEBUG=1
DDEFS =
# List all default ASM defines here, like -D_DEBUG=1
DADEFS =
# List all default directories to look for include files here
DINCDIR =
# List the default directory to look for the libraries here
DLIBDIR =
# List all default libraries here
DLIBS =
#
# End of default section
##############################################################################
##############################################################################
# Start of user section
#
# List all user C define here, like -D_DEBUG=1
UDEFS =
# Define ASM defines here
UADEFS =
# List all user directories here
UINCDIR =
# List the user directory to look for the libraries here
ULIBDIR =
# List all user libraries here
ULIBS =
#
# End of user defines
##############################################################################
ifeq ($(USE_FWLIB),yes)
include $(CHIBIOS)/ext/stm32lib/stm32lib.mk
CSRC += $(STM32SRC)
INCDIR += $(STM32INC)
USE_OPT += -DUSE_STDPERIPH_DRIVER
endif
include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk

113
testhal/STM32/_stess_test/ch.ld
View File

@ -1,113 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* ST32F103 memory setup.
*/
__main_stack_size__ = 0x0400;
__process_stack_size__ = 0x0400;
__stacks_total_size__ = __main_stack_size__ + __process_stack_size__;
MEMORY
{
flash : org = 0x08000000, len = 128k
ram : org = 0x20000000, len = 20k
}
__ram_start__ = ORIGIN(ram);
__ram_size__ = LENGTH(ram);
__ram_end__ = __ram_start__ + __ram_size__;
SECTIONS
{
. = 0;
.text : ALIGN(16) SUBALIGN(16)
{
_text = .;
KEEP(*(vectors))
*(.text)
*(.text.*)
*(.rodata)
*(.rodata.*)
*(.glue_7t)
*(.glue_7)
*(.gcc*)
} > flash
.ctors :
{
PROVIDE(_ctors_start_ = .);
KEEP(*(SORT(.ctors.*)))
KEEP(*(.ctors))
PROVIDE(_ctors_end_ = .);
} > flash
.dtors :
{
PROVIDE(_dtors_start_ = .);
KEEP(*(SORT(.dtors.*)))
KEEP(*(.dtors))
PROVIDE(_dtors_end_ = .);
} > flash
.ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)}
__exidx_start = .;
.ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash
__exidx_end = .;
.eh_frame_hdr : {*(.eh_frame_hdr)}
.eh_frame : ONLY_IF_RO {*(.eh_frame)}
. = ALIGN(4);
_etext = .;
_textdata = _etext;
.data :
{
_data = .;
*(.data)
. = ALIGN(4);
*(.data.*)
. = ALIGN(4);
*(.ramtext)
. = ALIGN(4);
_edata = .;
} > ram AT > flash
.bss :
{
_bss_start = .;
*(.bss)
. = ALIGN(4);
*(.bss.*)
. = ALIGN(4);
*(COMMON)
. = ALIGN(4);
_bss_end = .;
} > ram
}
PROVIDE(end = .);
_end = .;
__heap_base__ = _end;
__heap_end__ = __ram_end__ - __stacks_total_size__;

507
testhal/STM32/_stess_test/chconf.h
View File

@ -1,507 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file templates/chconf.h
* @brief Configuration file template.
* @details A copy of this file must be placed in each project directory, it
* contains the application specific kernel settings.
*
* @addtogroup config
* @details Kernel related settings and hooks.
* @{
*/
#ifndef _CHCONF_H_
#define _CHCONF_H_
/*===========================================================================*/
/* Kernel parameters. */
/*===========================================================================*/
/**
* @brief System tick frequency.
* @details Frequency of the system timer that drives the system ticks. This
* setting also defines the system tick time unit.
*/
#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
#define CH_FREQUENCY 1000
#endif
/**
* @brief Round robin interval.
* @details This constant is the number of system ticks allowed for the
* threads before preemption occurs. Setting this value to zero
* disables the preemption for threads with equal priority and the
* round robin becomes cooperative. Note that higher priority
* threads can still preempt, the kernel is always preemptive.
*
* @note Disabling the round robin preemption makes the kernel more compact
* and generally faster.
*/
#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
#define CH_TIME_QUANTUM 20
#endif
/**
* @brief Nested locks.
* @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock()
* operations is allowed.<br>
* For performance and code size reasons the recommended setting
* is to leave this option disabled.<br>
* You may use this option if you need to merge ChibiOS/RT with
* external libraries that require nested lock/unlock operations.
*
* @note T he default is @p FALSE.
*/
#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__)
#define CH_USE_NESTED_LOCKS FALSE
#endif
/**
* @brief Managed RAM size.
* @details Size of the RAM area to be managed by the OS. If set to zero
* then the whole available RAM is used. The core memory is made
* available to the heap allocator and/or can be used directly through
* the simplified core memory allocator.
*
* @note In order to let the OS manage the whole RAM the linker script must
* provide the @p __heap_base__ and @p __heap_end__ symbols.
* @note Requires @p CH_USE_COREMEM.
*/
#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
#define CH_MEMCORE_SIZE 0
#endif
/*===========================================================================*/
/* Performance options. */
/*===========================================================================*/
/**
* @brief OS optimization.
* @details If enabled then time efficient rather than space efficient code
* is used when two possible implementations exist.
*
* @note This is not related to the compiler optimization options.
* @note The default is @p TRUE.
*/
#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
/**
* @brief Threads registry APIs.
* @details If enabled then the registry APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
#define CH_USE_REGISTRY TRUE
#endif
/**
* @brief Threads synchronization APIs.
* @details If enabled then the @p chThdWait() function is included in
* the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
#define CH_USE_WAITEXIT TRUE
#endif
/**
* @brief Semaphores APIs.
* @details If enabled then the Semaphores APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES TRUE
#endif
/**
* @brief Semaphores queuing mode.
* @details If enabled then the threads are enqueued on semaphores by
* priority rather than in FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES_PRIORITY FALSE
#endif
/**
* @brief Atomic semaphore API.
* @details If enabled then the semaphores the @p chSemSignalWait() API
* is included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
#define CH_USE_SEMSW TRUE
#endif
/**
* @brief Mutexes APIs.
* @details If enabled then the mutexes APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
#define CH_USE_MUTEXES TRUE
#endif
/**
* @brief Conditional Variables APIs.
* @details If enabled then the conditional variables APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_MUTEXES.
*/
#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS TRUE
#endif
/**
* @brief Conditional Variables APIs with timeout.
* @details If enabled then the conditional variables APIs with timeout
* specification are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_CONDVARS.
*/
#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS_TIMEOUT TRUE
#endif
/**
* @brief Events Flags APIs.
* @details If enabled then the event flags APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
#define CH_USE_EVENTS TRUE
#endif
/**
* @brief Events Flags APIs with timeout.
* @details If enabled then the events APIs with timeout specification
* are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_EVENTS.
*/
#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_EVENTS_TIMEOUT TRUE
#endif
/**
* @brief Synchronous Messages APIs.
* @details If enabled then the synchronous messages APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES TRUE
#endif
/**
* @brief Synchronous Messages queuing mode.
* @details If enabled then messages are served by priority rather than in
* FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_MESSAGES.
*/
#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES_PRIORITY FALSE
#endif
/**
* @brief Mailboxes APIs.
* @details If enabled then the asynchronous messages (mailboxes) APIs are
* included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
#define CH_USE_MAILBOXES TRUE
#endif
/**
* @brief I/O Queues APIs.
* @details If enabled then the I/O queues APIs are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
#define CH_USE_QUEUES TRUE
#endif
/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
#define CH_USE_MEMCORE TRUE
#endif
/**
* @brief Heap Allocator APIs.
* @details If enabled then the memory heap allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or
* @p CH_USE_SEMAPHORES.
* @note Mutexes are recommended.
*/
#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
#define CH_USE_HEAP TRUE
#endif
/**
* @brief C-runtime allocator.
* @details If enabled the the heap allocator APIs just wrap the C-runtime
* @p malloc() and @p free() functions.
*
* @note The default is @p FALSE.
* @note Requires @p CH_USE_HEAP.
* @note The C-runtime may or may not require @p CH_USE_COREMEM, see the
* appropriate documentation.
*/
#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
#define CH_USE_MALLOC_HEAP FALSE
#endif
/**
* @brief Memory Pools Allocator APIs.
* @details If enabled then the memory pools allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
#define CH_USE_MEMPOOLS TRUE
#endif
/**
* @brief Dynamic Threads APIs.
* @details If enabled then the dynamic threads creation APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_WAITEXIT.
* @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
*/
#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
#define CH_USE_DYNAMIC TRUE
#endif
/*===========================================================================*/
/* Debug options. */
/*===========================================================================*/
/**
* @brief Debug option, parameters checks.
* @details If enabled then the checks on the API functions input
* parameters are activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_CHECKS FALSE
#endif
/**
* @brief Debug option, consistency checks.
* @details If enabled then all the assertions in the kernel code are
* activated. This includes consistency checks inside the kernel,
* runtime anomalies and port-defined checks.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_ASSERTS FALSE
#endif
/**
* @brief Debug option, trace buffer.
* @details If enabled then the context switch circular trace buffer is
* activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_TRACE FALSE
#endif
/**
* @brief Debug option, stack checks.
* @details If enabled then a runtime stack check is performed.
*
* @note The default is @p FALSE.
* @note The stack check is performed in a architecture/port dependent way.
* It may not be implemented or some ports.
* @note The default failure mode is to halt the system with the global
* @p panic_msg variable set to @p NULL.
*/
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_STACK_CHECK FALSE
#endif
/**
* @brief Debug option, stacks initialization.
* @details If enabled then the threads working area is filled with a byte
* value when a thread is created. This can be useful for the
* runtime measurement of the used stack.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
#define CH_DBG_FILL_THREADS FALSE
#endif
/**
* @brief Debug option, threads profiling.
* @details If enabled then a field is added to the @p Thread structure that
* counts the system ticks occurred while executing the thread.
*
* @note The default is @p TRUE.
* @note This debug option is defaulted to TRUE because it is required by
* some test cases into the test suite.
*/
#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
#define CH_DBG_THREADS_PROFILING TRUE
#endif
/*===========================================================================*/
/* Kernel hooks. */
/*===========================================================================*/
/**
* @brief Threads descriptor structure extension.
* @details User fields added to the end of the @p Thread structure.
*/
#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
#define THREAD_EXT_FIELDS \
/* Add threads custom fields here.*/
#endif
/**
* @brief Threads initialization hook.
* @details User initialization code added to the @p chThdInit() API.
*
* @note It is invoked from within @p chThdInit() and implicitily from all
* the threads creation APIs.
*/
#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
#define THREAD_EXT_INIT_HOOK(tp) { \
/* Add threads initialization code here.*/ \
}
#endif
/**
* @brief Threads finalization hook.
* @details User finalization code added to the @p chThdExit() API.
*
* @note It is inserted into lock zone.
* @note It is also invoked when the threads simply return in order to
* terminate.
*/
#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
#define THREAD_EXT_EXIT_HOOK(tp) { \
/* Add threads finalization code here.*/ \
}
#endif
/**
* @brief Idle Loop hook.
* @details This hook is continuously invoked by the idle thread loop.
*/
#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
#define IDLE_LOOP_HOOK() { \
/* Idle loop code here.*/ \
}
#endif
/**
* @brief System tick event hook.
* @details This hook is invoked in the system tick handler immediately
* after processing the virtual timers queue.
*/
#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
#define SYSTEM_TICK_EVENT_HOOK() { \
/* System tick event code here.*/ \
}
#endif
/**
* @brief System halt hook.
* @details This hook is invoked in case to a system halting error before
* the system is halted.
*/
#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
#define SYSTEM_HALT_HOOK() { \
/* System halt code here.*/ \
}
#endif
/*===========================================================================*/
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
#endif /* _CHCONF_H_ */
/** @} */

173
testhal/STM32/_stess_test/halconf.h
View File

@ -1,173 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file templates/halconf.h
* @brief HAL configuration header.
* @addtogroup HAL_CONF
* @{
*/
/*
* HAL configuration file, this file allows to enable or disable the various
* device drivers from your application. You may also use this file in order
* to override the device drivers default settings.
*/
#ifndef _HALCONF_H_
#define _HALCONF_H_
/*
* Uncomment the following line in order to include a mcu-related
* settings file. This file can be used to include platform specific
* header files or to override the low level drivers settings.
*/
#include "mcuconf.h"
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the PAL subsystem.
*/
#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__)
#define CH_HAL_USE_PAL TRUE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the ADC subsystem.
*/
#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__)
#define CH_HAL_USE_ADC TRUE
#endif
/*
* Default ADC settings overrides (uncomment to override).
*/
/*#define ADC_USE_WAIT TRUE*/
/*===========================================================================*/
/* CAN driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the CAN subsystem.
*/
#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__)
#define CH_HAL_USE_CAN TRUE
#endif
/*
* Default CAN settings overrides (uncomment to override).
*/
/*#define CAN_USE_SLEEP_MODE TRUE*/
/*===========================================================================*/
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the MAC subsystem.
*/
#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__)
#define CH_HAL_USE_MAC FALSE
#endif
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the PWM subsystem.
*/
#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__)
#define CH_HAL_USE_PWM TRUE
#endif
/*===========================================================================*/
/* SERIAL driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the SERIAL subsystem.
*/
#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define CH_HAL_USE_SERIAL TRUE
#endif
/*
* Default SERIAL settings overrides (uncomment to override).
*/
/*#define SERIAL_DEFAULT_BITRATE 38400*/
/*#define SERIAL_BUFFERS_SIZE 64*/
/*===========================================================================*/
/* SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the SPI subsystem.
*/
#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__)
#define CH_HAL_USE_SPI TRUE
#endif
/*
* Default SPI settings overrides (uncomment to override).
*/
/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the MMC_SPI subsystem.
*/
#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define CH_HAL_USE_MMC_SPI FALSE
#endif
/*
* Default MMC_SPI settings overrides (uncomment to override).
*/
/*#define MMC_SECTOR_SIZE 512*/
/*#define MMC_NICE_WAITING TRUE*/
/*#define MMC_POLLING_INTERVAL 10*/
/*#define MMC_POLLING_DELAY 10*/
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the UART subsystem.
*/
#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__)
#define CH_HAL_USE_UART FALSE
#endif
#endif /* _HALCONF_H_ */
/** @} */

221
testhal/STM32/_stess_test/main.c
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@ -1,221 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <stdio.h>
#include "ch.h"
#include "hal.h"
#include "test.h"
#include "settings.h"
/*
* LED blinker thread, times are in milliseconds.
*/
static WORKING_AREA(blinker_wa, 128);
static msg_t blinker_thread(void *p) {
(void)p;
while (TRUE) {
palClearPad(IOPORT3, GPIOC_LED);
chThdSleepMilliseconds(500);
palSetPad(IOPORT3, GPIOC_LED);
chThdSleepMilliseconds(500);
}
return 0;
}
#if CH_HAL_USE_ADC
static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
static Thread *adctp;
/*
* ADC continuous conversion thread.
*/
size_t nx = 0, ny = 0;
static void adccallback(adcsample_t *buffer, size_t n) {
if (samples == buffer) {
nx += n;
}
else {
ny += n;
}
}
static WORKING_AREA(adc_continuous_wa, 256);
static msg_t adc_continuous_thread(void *p){
(void)p;
palSetGroupMode(IOPORT3,
PAL_PORT_BIT(0) | PAL_PORT_BIT(1),
PAL_MODE_INPUT_ANALOG);
adcStart(&ADCD1, &adccfg);
adcStartConversion(&ADCD1, &adcgrpcfg, samples,
ADC_GRP1_BUF_DEPTH, adccallback);
adcWaitConversion(&ADCD1, TIME_INFINITE);
adcStop(&ADCD1);
return 0;
}
#endif /* CH_HAL_USE_ADC */
#if CH_HAL_USE_CAN
static Thread *canrtp;
static Thread *canttp;
static WORKING_AREA(can_rx_wa, 256);
static msg_t can_rx(void *p) {
EventListener el;
CANRxFrame rxmsg;
(void)p;
chEvtRegister(&CAND1.cd_rxfull_event, &el, 0);
while(!chThdShouldTerminate()) {
if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0)
continue;
while (canReceive(&CAND1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) {
/* Process message.*/
palTogglePad(IOPORT3, GPIOC_LED);
}
}
chEvtUnregister(&CAND1.cd_rxfull_event, &el);
return 0;
}
static WORKING_AREA(can_tx_wa, 256);
static msg_t can_tx(void * p) {
CANTxFrame txmsg;
(void)p;
txmsg.cf_IDE = CAN_IDE_EXT;
txmsg.cf_EID = 0x01234567;
txmsg.cf_RTR = CAN_RTR_DATA;
txmsg.cf_DLC = 8;
txmsg.cf_data32[0] = 0x55AA55AA;
txmsg.cf_data32[1] = 0x00FF00FF;
while (!chThdShouldTerminate()) {
canTransmit(&CAND1, &txmsg, MS2ST(100));
/* chThdSleepMilliseconds(5);*/
}
return 0;
}
#endif /* CH_HAL_USE_CAN */
#if CH_HAL_USE_SPI
static uint8_t txbuf[512];
static uint8_t rxbuf[512];
static Thread *spitp;
/*
* Maximum speed SPI continuous loopback thread.
*/
static WORKING_AREA(spi_loopback_wa, 256);
static msg_t spi_loopback_thread(void *p){
(void)p;
palSetPadMode(IOPORT1, GPIOA_SPI1NSS, PAL_MODE_OUTPUT_PUSHPULL);
palSetPad(IOPORT1, GPIOA_SPI1NSS);
spiStart(&SPID1, &spicfg);
while (!chThdShouldTerminate()) {
spiSelect(&SPID1);
spiExchange(&SPID1, 512, txbuf, rxbuf);
spiUnselect(&SPID1);
}
spiStop(&SPID1);
return 0;
}
#endif /* CH_HAL_USE_SPI */
/*
* Entry point, note, the main() function is already a thread in the system
* on entry.
*/
int main(int argc, char **argv) {
unsigned i;
(void)argc;
(void)argv;
(void)i;
/*
* Activates the serial driver 2 using the driver default configuration.
*/
sdStart(&SD2, NULL);
/*
* Creates the blinker thread.
*/
chThdCreateStatic(blinker_wa, sizeof(blinker_wa),
NORMALPRIO + 10, blinker_thread, NULL);
#if CH_HAL_USE_ADC
/*
* Creates the ADC continuous conversion test thread.
*/
adctp = chThdCreateStatic(adc_continuous_wa, sizeof(adc_continuous_wa),
NORMALPRIO + 9, adc_continuous_thread, NULL);
#endif
#if CH_HAL_USE_CAN
canStart(&CAND1, &cancfg);
canrtp = chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa),
NORMALPRIO + 7, can_rx, NULL);
canttp = chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa),
NORMALPRIO + 7, can_tx, NULL);
#endif
#if CH_HAL_USE_SPI
/*
* Creates the SPI loopback test thread.
*/
for (i = 0; i < sizeof(txbuf); i++)
txbuf[i] = (uint8_t)i;
spitp = chThdCreateStatic(spi_loopback_wa, sizeof(spi_loopback_wa),
NORMALPRIO + 8, spi_loopback_thread, NULL);
#endif
/*
* Normal main() thread activity, in this demo it does nothing except
* sleeping in a loop and check the button state.
*/
while (TRUE) {
if (palReadPad(IOPORT1, GPIOA_BUTTON)) {
TestThread(&SD2);
#if CH_HAL_USE_ADC
adcStopConversion(&ADCD1);
chThdWait(adctp);
#endif
#if CH_HAL_USE_CAN
chThdTerminate(canttp);
chThdWait(canttp);
chThdTerminate(canrtp);
chThdWait(canrtp);
#endif
#if CH_HAL_USE_SPI
chThdTerminate(spitp);
chThdWait(spitp);
#endif
chThdSleepMilliseconds(500);
TestThread(&SD2);
chThdSleepMilliseconds(500);
chSysHalt();
}
chThdSleepMilliseconds(500);
}
return 0;
}

117
testhal/STM32/_stess_test/mcuconf.h
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@ -1,117 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* STM32 drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the whole
* driver is enabled in halconf.h.
*
* IRQ priorities:
* 15...0 Lowest...Highest.
*
* DMA priorities:
* 0...3 Lowest...Highest.
*/
/*
* HAL driver system settings.
*/
#define STM32_SW STM32_SW_PLL
#define STM32_PLLSRC STM32_PLLSRC_HSE
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE 9
#define STM32_HPRE STM32_HPRE_DIV1
#define STM32_PPRE1 STM32_PPRE1_DIV2
#define STM32_PPRE2 STM32_PPRE2_DIV2
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_MCO STM32_MCO_NOCLOCK
/*
* ADC driver system settings.
*/
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY 3
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt()
/*
* CAN driver system settings.
*/
#define STM32_CAN_USE_CAN1 TRUE
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
* PWM driver system settings.
*/
#define STM32_PWM_USE_TIM1 TRUE
#define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_PWM1_IRQ_PRIORITY 7
#define STM32_PWM_PWM2_IRQ_PRIORITY 7
#define STM32_PWM_PWM3_IRQ_PRIORITY 7
#define STM32_PWM_PWM4_IRQ_PRIORITY 7
/*
* SERIAL driver system settings.
*/
#define STM32_SERIAL_USE_USART1 FALSE
#define STM32_SERIAL_USE_USART2 TRUE
#define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
/*
* SPI driver system settings.
*/
#define STM32_SPI_USE_SPI1 TRUE
#define STM32_SPI_USE_SPI2 TRUE
#define STM32_SPI_USE_SPI3 FALSE
#define STM32_SPI_SPI1_DMA_PRIORITY 2
#define STM32_SPI_SPI2_DMA_PRIORITY 2
#define STM32_SPI_SPI3_DMA_PRIORITY 2
#define STM32_SPI_SPI1_IRQ_PRIORITY 10
#define STM32_SPI_SPI2_IRQ_PRIORITY 10
#define STM32_SPI_SPI3_IRQ_PRIORITY 10
#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt()
#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt()
#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt()
/*
* UART driver system settings.
*/
#define STM32_UART_USE_USART1 FALSE
#define STM32_UART_USE_USART2 TRUE
#define STM32_UART_USE_USART3 FALSE
#define STM32_UART_USART1_IRQ_PRIORITY 12
#define STM32_UART_USART2_IRQ_PRIORITY 12
#define STM32_UART_USART3_IRQ_PRIORITY 12
#define STM32_UART_USART1_DMA_PRIORITY 0
#define STM32_UART_USART2_DMA_PRIORITY 0
#define STM32_UART_USART3_DMA_PRIORITY 0
#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt()
#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt()
#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt()

30
testhal/STM32/_stess_test/readme.txt
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@ -1,30 +0,0 @@
*****************************************************************************
** ChibiOS/RT port for ARM-Cortex-M3 STM32F103. **
*****************************************************************************
** TARGET **
The demo will on an Olimex STM32-P103 board.
** The Demo **
The demo is a stress test for the STM32 I/O subsystem, simultaneous activity
is performed on a SPI, an ADC, the CAN and a serial port all while executing
the complex test suite.
The demo is DMA and IRQ intensive so the debugging can be difficoult, so be
warned if you see anomalies in your debugger.
** Build Procedure **
The demo has been tested by using the free Codesourcery GCC-based toolchain
and YAGARTO.
Just modify the TRGT line in the makefile in order to use different GCC ports.
** Notes **
Some files used by the demo are not part of ChibiOS/RT but are copyright of
ST Microelectronics and are licensed under a different license.
Also note that not all the files present in the ST library are distribited
with ChibiOS/RT, you can find the whole library on the ST web site:
http://www.st.com

75
testhal/STM32/_stess_test/settings.c
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@ -1,75 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "ch.h"
#include "hal.h"
#include "settings.h"
#if CH_HAL_USE_ADC
/*
* ADC configuration.
*/
const ADCConfig adccfg = {};
const ADCConversionGroup adcgrpcfg = {
TRUE,
ADC_GRP1_NUM_CHANNELS,
0,
ADC_CR2_EXTSEL_SWSTART | ADC_CR2_TSVREFE | ADC_CR2_CONT,
0,
0,
ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS),
ADC_SQR2_SQ7_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ6_N(ADC_CHANNEL_VREFINT),
ADC_SQR3_SQ5_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ4_N(ADC_CHANNEL_IN10) |
ADC_SQR3_SQ3_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN10) |
ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ0_N(ADC_CHANNEL_IN10)
};
#endif
#if CH_HAL_USE_CAN
#define CAN_BTR_PRESCALER(n) (n)
#undef CAN_BTR_TS1
#define CAN_BTR_TS1(n) ((n) << 16)
#undef CAN_BTR_TS2
#define CAN_BTR_TS2(n) ((n) << 20)
#undef CAN_BTR_SJW
#define CAN_BTR_SJW(n) ((n) << 24)
/*
* Internal loopback mode, 500KBaud, automatic wakeup, automatic recover
* from abort mode.
* See section 22.7.7 on the STM32 reference manual.
*/
const CANConfig cancfg = {
CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
CAN_BTR_LBKM | CAN_BTR_SJW(0) | CAN_BTR_TS2(1) |
CAN_BTR_TS1(8) | CAN_BTR_PRESCALER(6),
0,
NULL
};
#endif /* CH_HAL_USE_CAN */
#if CH_HAL_USE_SPI
/*
* SPI configuration, maximum speed.
*/
const SPIConfig spicfg = {
IOPORT1, GPIOA_SPI1NSS, 0
};
#endif

34
testhal/STM32/_stess_test/settings.h
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@ -1,34 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#if CH_HAL_USE_ADC
#define ADC_GRP1_NUM_CHANNELS 8
#define ADC_GRP1_BUF_DEPTH 16
extern const ADCConfig adccfg;
extern const ADCConversionGroup adcgrpcfg;
#endif
#if CH_HAL_USE_CAN
extern const CANConfig cancfg;
#endif /* CH_HAL_USE_CAN */
#if CH_HAL_USE_SPI
extern const SPIConfig spicfg;
#endif

3
todo.txt
View File

@ -14,6 +14,9 @@ Within 2.1.x (hopefully)
verifiable.
* Rework STM32 drivers to use friendly IRQ names and centralized DMA macros.
* I-class functions for the ADC/PWM drivers.
* All the device driver callbacks must have the driver pointer as first
parameter.
X All the device driver structures must have a fields extension macro.
X Resist doing more changes and optimizations in the kernel, fixes only.
X File System infrastructure.
X General HAL improvements.