LPC214x board files and demos updated.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2499 35acf78f-673a-0410-8e92-d51de3d6d3f4master
parent
ada9fb82aa
commit
f131e4297d
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@ -54,25 +54,18 @@ static CH_IRQ_HANDLER(T0IrqHandler) {
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/*
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/*
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* Early initialization code.
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* Early initialization code.
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* This initialization is performed just after reset before BSS and DATA
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* This initialization must be performed just after stack setup and before
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* segments initialization.
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* any other initialization.
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*/
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*/
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void hwinit0(void) {
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void __early_init(void) {
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lpc214x_clock_init();
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lpc214x_clock_init();
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}
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}
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/*
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/*
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* Late initialization code.
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* Board-specific initialization code.
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* This initialization is performed after BSS and DATA segments initialization
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* and before invoking the main() function.
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*/
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*/
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void hwinit1(void) {
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void boardInit(void) {
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/*
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* HAL initialization.
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*/
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halInit();
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/*
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/*
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* System Timer initialization, 1ms intervals.
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* System Timer initialization, 1ms intervals.
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@ -85,9 +78,4 @@ void hwinit1(void) {
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timer->TC_MCR = 3; /* Interrupt and clear TC on match MR0. */
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timer->TC_MCR = 3; /* Interrupt and clear TC on match MR0. */
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timer->TC_TCR = 2; /* Reset counter and prescaler. */
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timer->TC_TCR = 2; /* Reset counter and prescaler. */
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timer->TC_TCR = 1; /* Timer enabled. */
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timer->TC_TCR = 1; /* Timer enabled. */
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/*
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* ChibiOS/RT initialization.
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*/
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chSysInit();
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}
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}
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@ -82,4 +82,14 @@
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#define PB_WP1 24
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#define PB_WP1 24
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#define PB_CP1 25
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#define PB_CP1 25
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#if !defined(_FROM_ASM_)
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#ifdef __cplusplus
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extern "C" {
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#endif
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void boardInit(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _FROM_ASM_ */
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#endif /* _BOARD_H_ */
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#endif /* _BOARD_H_ */
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@ -221,8 +221,7 @@ static void RemoveHandler(eventid_t id) {
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}
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}
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/*
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/*
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* Entry point, note, the main() function is already a thread in the system
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* Application entry point.
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* on entry.
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*/
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*/
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int main(int argc, char **argv) {
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int main(int argc, char **argv) {
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static const evhandler_t evhndl[] = {
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static const evhandler_t evhndl[] = {
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@ -236,6 +235,16 @@ int main(int argc, char **argv) {
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(void)argc;
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(void)argc;
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(void)argv;
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(void)argv;
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/*
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* System initializations.
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* - HAL initialization, this also initializes the configured device drivers
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* and performs the board-specific initializations.
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* - Kernel initialization, the main() function becomes a thread and the
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* RTOS is active.
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*/
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halInit();
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chSysInit();
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/*
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/*
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* Activates the serial driver 2 using the driver default configuration.
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* Activates the serial driver 2 using the driver default configuration.
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*/
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*/
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@ -142,8 +142,7 @@ static void TimerHandler(eventid_t id) {
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}
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}
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/*
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/*
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* Entry point, note, the main() function is already a thread in the system
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* Application entry point.
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* on entry.
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*/
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*/
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int main(int argc, char **argv) {
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int main(int argc, char **argv) {
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static const evhandler_t evhndl[] = {
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static const evhandler_t evhndl[] = {
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@ -155,6 +154,16 @@ int main(int argc, char **argv) {
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(void)argc;
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(void)argc;
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(void)argv;
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(void)argv;
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/*
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* System initializations.
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* - HAL initialization, this also initializes the configured device drivers
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* and performs the board-specific initializations.
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* - Kernel initialization, the main() function becomes a thread and the
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* RTOS is active.
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*/
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halInit();
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System::Init();
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/*
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/*
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* Activates the serial driver 2 using the driver default configuration.
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* Activates the serial driver 2 using the driver default configuration.
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*/
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*/
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@ -60,14 +60,23 @@ static msg_t Thread2(void *arg) {
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}
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}
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/*
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/*
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* Entry point, note, the main() function is already a thread in the system
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* Application entry point.
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* on entry.
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*/
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*/
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int main(int argc, char **argv) {
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int main(int argc, char **argv) {
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(void)argc;
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(void)argc;
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(void)argv;
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(void)argv;
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/*
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* System initializations.
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* - HAL initialization, this also initializes the configured device drivers
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* and performs the board-specific initializations.
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* - Kernel initialization, the main() function becomes a thread and the
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* RTOS is active.
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*/
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halInit();
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chSysInit();
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/*
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/*
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* Activates the serial driver 2 using the driver default configuration.
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* Activates the serial driver 2 using the driver default configuration.
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*/
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*/
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@ -5,7 +5,7 @@ Settings: CCLK=48, MAMCR=2, MAMTIM=3 (3 wait states)
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*** ChibiOS/RT test suite
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*** ChibiOS/RT test suite
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***
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***
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*** Kernel: 2.1.4unstable
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*** Kernel: 2.1.6unstable
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*** GCC Version: 4.5.1
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*** GCC Version: 4.5.1
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*** Architecture: ARM7
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*** Architecture: ARM7
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*** Core Variant: ARM7TDMI
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*** Core Variant: ARM7TDMI
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@ -114,11 +114,11 @@ Settings: CCLK=48, MAMCR=2, MAMTIM=3 (3 wait states)
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--- Result: SUCCESS
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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----------------------------------------------------------------------------
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--- Test Case 11.5 (Benchmark, threads, full cycle)
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--- Test Case 11.5 (Benchmark, threads, full cycle)
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--- Score : 89745 threads/S
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--- Score : 88089 threads/S
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--- Result: SUCCESS
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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----------------------------------------------------------------------------
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--- Test Case 11.6 (Benchmark, threads, create only)
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--- Test Case 11.6 (Benchmark, threads, create only)
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--- Score : 128237 threads/S
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--- Score : 126542 threads/S
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--- Result: SUCCESS
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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----------------------------------------------------------------------------
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--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
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--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
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@ -126,7 +126,7 @@ Settings: CCLK=48, MAMCR=2, MAMTIM=3 (3 wait states)
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--- Result: SUCCESS
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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----------------------------------------------------------------------------
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--- Test Case 11.8 (Benchmark, round robin context switching)
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--- Test Case 11.8 (Benchmark, round robin context switching)
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--- Score : 276080 ctxswc/S
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--- Score : 276084 ctxswc/S
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--- Result: SUCCESS
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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----------------------------------------------------------------------------
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--- Test Case 11.9 (Benchmark, I/O Queues throughput)
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--- Test Case 11.9 (Benchmark, I/O Queues throughput)
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@ -5,7 +5,7 @@ Settings: CCLK=48, MAMCR=2, MAMTIM=3 (3 wait states)
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*** ChibiOS/RT test suite
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*** ChibiOS/RT test suite
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***
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***
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*** Kernel: 2.1.4unstable
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*** Kernel: 2.1.6unstable
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*** GCC Version: 4.5.1
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*** GCC Version: 4.5.1
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*** Architecture: ARM7
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*** Architecture: ARM7
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*** Core Variant: ARM7TDMI
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*** Core Variant: ARM7TDMI
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@ -98,7 +98,7 @@ Settings: CCLK=48, MAMCR=2, MAMTIM=3 (3 wait states)
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--- Result: SUCCESS
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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----------------------------------------------------------------------------
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--- Test Case 11.1 (Benchmark, messages #1)
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--- Test Case 11.1 (Benchmark, messages #1)
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--- Score : 106223 msgs/S, 212446 ctxswc/S
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--- Score : 106224 msgs/S, 212448 ctxswc/S
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--- Result: SUCCESS
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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----------------------------------------------------------------------------
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--- Test Case 11.2 (Benchmark, messages #2)
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--- Test Case 11.2 (Benchmark, messages #2)
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@ -114,11 +114,11 @@ Settings: CCLK=48, MAMCR=2, MAMTIM=3 (3 wait states)
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--- Result: SUCCESS
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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----------------------------------------------------------------------------
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--- Test Case 11.5 (Benchmark, threads, full cycle)
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--- Test Case 11.5 (Benchmark, threads, full cycle)
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--- Score : 71990 threads/S
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--- Score : 70297 threads/S
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--- Result: SUCCESS
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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----------------------------------------------------------------------------
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--- Test Case 11.6 (Benchmark, threads, create only)
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--- Test Case 11.6 (Benchmark, threads, create only)
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--- Score : 110394 threads/S
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--- Score : 109135 threads/S
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--- Result: SUCCESS
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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----------------------------------------------------------------------------
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--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
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--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
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@ -27,25 +27,25 @@
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#if !defined(__DOXYGEN__)
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#if !defined(__DOXYGEN__)
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.set MODE_USR, 0x10
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.set MODE_USR, 0x10
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.set MODE_FIQ, 0x11
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.set MODE_FIQ, 0x11
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.set MODE_IRQ, 0x12
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.set MODE_IRQ, 0x12
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.set MODE_SVC, 0x13
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.set MODE_SVC, 0x13
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.set MODE_ABT, 0x17
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.set MODE_ABT, 0x17
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.set MODE_UND, 0x1B
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.set MODE_UND, 0x1B
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.set MODE_SYS, 0x1F
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.set MODE_SYS, 0x1F
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.equ I_BIT, 0x80
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.set I_BIT, 0x80
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.equ F_BIT, 0x40
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.set F_BIT, 0x40
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.text
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.text
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.code 32
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.code 32
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.balign 4
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.balign 4
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/*
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/*
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* Reset handler.
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* Reset handler.
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*/
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*/
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.global ResetHandler
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.global ResetHandler
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ResetHandler:
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ResetHandler:
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/*
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/*
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* Stack pointers initialization.
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* Stack pointers initialization.
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* Early initialization.
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* Early initialization.
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*/
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*/
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#ifndef THUMB_NO_INTERWORKING
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#ifndef THUMB_NO_INTERWORKING
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bl hwinit0
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bl __early_init
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#else
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#else
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add r0, pc, #1
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add r0, pc, #1
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bx r0
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bx r0
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.code 16
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.code 16
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bl hwinit0
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bl __early_init
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mov r0, pc
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mov r0, pc
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bx r0
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bx r0
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.code 32
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.code 32
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#endif
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#endif
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/*
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/*
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* Data initialization.
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* Data initialization.
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@ -119,21 +119,19 @@ bssloop:
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strlo r0, [r1], #4
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strlo r0, [r1], #4
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blo bssloop
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blo bssloop
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/*
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/*
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* Late initialization.
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* Main program invocation.
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*/
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*/
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#ifdef THUMB_NO_INTERWORKING
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#ifdef THUMB_NO_INTERWORKING
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add r0, pc, #1
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add r0, pc, #1
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bx r0
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bx r0
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.code 16
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.code 16
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bl hwinit1
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mov r0, #0
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mov r0, #0
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mov r1, r0
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mov r1, r0
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bl main
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bl main
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ldr r1, =MainExitHandler
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ldr r1, =MainExitHandler
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bx r1
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bx r1
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.code 32
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.code 32
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#else
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#else
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bl hwinit1
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mov r0, #0
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mov r0, #0
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mov r1, r0
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mov r1, r0
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bl main
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bl main
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/*
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/*
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* Default main function exit handler.
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* Default main function exit handler.
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*/
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*/
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.weak MainExitHandler
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.weak MainExitHandler
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.globl MainExitHandler
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.global MainExitHandler
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MainExitHandler:
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MainExitHandler:
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.loop: b .loop
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.loop: b .loop
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/*
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/*
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* segments initialization.
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* segments initialization.
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*/
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*/
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#ifdef THUMB_NO_INTERWORKING
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#ifdef THUMB_NO_INTERWORKING
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.thumb_func
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.thumb_func
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.code 16
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.code 16
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#endif
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#endif
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.weak hwinit0
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.weak __early_init
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hwinit0:
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hwinit0:
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bx lr
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bx lr
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.code 32
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.code 32
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/*
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* Default late initialization code. It is declared weak in order to be
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* replaced by the real initialization code.
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* Late initialization is performed after BSS and DATA segments initialization
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* and before invoking the main() function.
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*/
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#ifdef THUMB_NO_INTERWORKING
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.thumb_func
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.code 16
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#endif
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.weak hwinit1
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hwinit1:
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bx lr
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.code 32
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#endif
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#endif
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/** @} */
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/** @} */
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@ -100,7 +100,7 @@ endbloop:
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msr CONTROL, r0
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msr CONTROL, r0
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isb
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isb
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/*
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/*
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* Main program invokation.
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* Main program invocation.
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*/
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*/
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movs r0, #0
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movs r0, #0
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mov r1, r0
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mov r1, r0
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@ -95,7 +95,7 @@ bloop:
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msr CONTROL, r0
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msr CONTROL, r0
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isb
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isb
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/*
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/*
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* Main program invokation.
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* Main program invocation.
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*/
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*/
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movs r0, #0
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movs r0, #0
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mov r1, r0
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mov r1, r0
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