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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8378 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
Giovanni Di Sirio 2015-10-22 13:07:25 +00:00
parent 51e94075b0
commit e8cd094821
13 changed files with 157 additions and 108 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
demos/STM32/RT-STM32F091RC-NUCLEO/chconf.h
View File

@ -39,14 +39,14 @@
* @brief System time counter resolution.
* @note Allowed values are 16 or 32 bits.
*/
#define CH_CFG_ST_RESOLUTION 16
#define CH_CFG_ST_RESOLUTION 32
/**
* @brief System tick frequency.
* @details Frequency of the system timer that drives the system ticks. This
* setting also defines the system tick time unit.
*/
#define CH_CFG_ST_FREQUENCY 1000
#define CH_CFG_ST_FREQUENCY 10000
/**
* @brief Time delta constant for the tick-less mode.

6
demos/STM32/RT-STM32F091RC-NUCLEO/debug/RT-STM32F091RC-NUCLEO (OpenOCD, Flash and Run).launch
View File

@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchConfiguration type="org.eclipse.cdt.debug.gdbjtag.launchConfigurationType">
<stringAttribute key="bad_container_name" value="\RT-STM32F030R8-NUCLEO\debug"/>
<stringAttribute key="bad_container_name" value="\RT-STM32F091RC-NUCLEO\debug"/>
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.delay" value="1"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="true"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="true"/>
@ -37,11 +37,11 @@
<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;globalVariableList/&gt;&#13;&#10;"/>
<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList/&gt;&#13;&#10;"/>
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="./build/ch.elf"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="RT-STM32F030R8-NUCLEO"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="RT-STM32F091RC-NUCLEO"/>
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="0.1984968159"/>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
<listEntry value="/RT-STM32F030R8-NUCLEO"/>
<listEntry value="/RT-STM32F091RC-NUCLEO"/>
</listAttribute>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
<listEntry value="4"/>

51
demos/STM32/RT-STM32F091RC-NUCLEO/mcuconf.h
View File

@ -41,6 +41,7 @@
#define STM32_PLS STM32_PLS_LEV0
#define STM32_HSI_ENABLED TRUE
#define STM32_HSI14_ENABLED TRUE
#define STM32_HSI48_ENABLED FALSE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
#define STM32_LSE_ENABLED FALSE
@ -78,9 +79,11 @@
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 FALSE
#define STM32_GPT_USE_TIM2 FALSE
#define STM32_GPT_USE_TIM3 FALSE
#define STM32_GPT_USE_TIM14 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 2
#define STM32_GPT_TIM2_IRQ_PRIORITY 2
#define STM32_GPT_TIM3_IRQ_PRIORITY 2
#define STM32_GPT_TIM14_IRQ_PRIORITY 2
@ -105,8 +108,10 @@
* ICU driver system settings.
*/
#define STM32_ICU_USE_TIM1 FALSE
#define STM32_ICU_USE_TIM2 FALSE
#define STM32_ICU_USE_TIM3 FALSE
#define STM32_ICU_TIM1_IRQ_PRIORITY 3
#define STM32_ICU_TIM2_IRQ_PRIORITY 3
#define STM32_ICU_TIM3_IRQ_PRIORITY 3
/*
@ -114,8 +119,10 @@
*/
#define STM32_PWM_USE_ADVANCED FALSE
#define STM32_PWM_USE_TIM1 FALSE
#define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 3
#define STM32_PWM_TIM2_IRQ_PRIORITY 3
#define STM32_PWM_TIM3_IRQ_PRIORITY 3
/*
@ -123,8 +130,20 @@
*/
#define STM32_SERIAL_USE_USART1 FALSE
#define STM32_SERIAL_USE_USART2 TRUE
#define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USE_UART7 FALSE
#define STM32_SERIAL_USE_UART8 FALSE
#define STM32_SERIAL_USART1_PRIORITY 3
#define STM32_SERIAL_USART2_PRIORITY 3
#define STM32_SERIAL_USART3_PRIORITY 3
#define STM32_SERIAL_UART4_PRIORITY 3
#define STM32_SERIAL_UART5_PRIORITY 3
#define STM32_SERIAL_USART6_PRIORITY 3
#define STM32_SERIAL_UART7_PRIORITY 3
#define STM32_SERIAL_UART8_PRIORITY 3
/*
* SPI driver system settings.
@ -145,21 +164,51 @@
* ST driver system settings.
*/
#define STM32_ST_IRQ_PRIORITY 2
#define STM32_ST_USE_TIMER 3
#define STM32_ST_USE_TIMER 2
/*
* UART driver system settings.
*/
#define STM32_UART_USE_USART1 FALSE
#define STM32_UART_USE_USART2 FALSE
#define STM32_UART_USE_USART3 FALSE
#define STM32_UART_USE_UART4 FALSE
#define STM32_UART_USE_UART5 FALSE
#define STM32_UART_USE_USART6 FALSE
#define STM32_UART_USE_UART7 FALSE
#define STM32_UART_USE_UART8 FALSE
#define STM32_UART_USART1_IRQ_PRIORITY 3
#define STM32_UART_USART2_IRQ_PRIORITY 3
#define STM32_UART_USART3_IRQ_PRIORITY 3
#define STM32_UART_UART4_IRQ_PRIORITY 3
#define STM32_UART_UART5_IRQ_PRIORITY 3
#define STM32_UART_USART6_IRQ_PRIORITY 3
#define STM32_UART_UART7_IRQ_PRIORITY 3
#define STM32_UART_UART8_IRQ_PRIORITY 3
#define STM32_UART_USART1_DMA_PRIORITY 0
#define STM32_UART_USART2_DMA_PRIORITY 0
#define STM32_UART_USART3_DMA_PRIORITY 0
#define STM32_UART_UART4_DMA_PRIORITY 0
#define STM32_UART_UART5_DMA_PRIORITY 0
#define STM32_UART_USART6_DMA_PRIORITY 0
#define STM32_UART_UART7_DMA_PRIORITY 0
#define STM32_UART_UART8_DMA_PRIORITY 0
#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_UART_UART7_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_UART_UART7_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_UART_UART8_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
#define STM32_UART_UART8_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
#endif /* _MCUCONF_H_ */

32
os/hal/boards/ST_NUCLEO_F030R8/board.h
View File

@ -63,8 +63,8 @@
#define GPIOA_PIN8 8U
#define GPIOA_PIN9 9U
#define GPIOA_PIN10 10U
#define GPIOA_OTG_FS_DM 11U
#define GPIOA_OTG_FS_DP 12U
#define GPIOA_PIN11 11U
#define GPIOA_PIN12 12U
#define GPIOA_SWDIO 13U
#define GPIOA_SWCLK 14U
#define GPIOA_PIN15 15U
@ -172,8 +172,8 @@
* PA8 - PIN8 (input pullup).
* PA9 - PIN9 (input pullup).
* PA10 - PIN10 (input pullup).
* PA11 - OTG_FS_DM (alternate 10).
* PA12 - OTG_FS_DP (alternate 10).
* PA11 - PIN11 (input floating).
* PA12 - PIN12 (input floating).
* PA13 - SWDIO (alternate 0).
* PA14 - SWCLK (alternate 0).
* PA15 - PIN15 (input pullup).
@ -189,8 +189,8 @@
PIN_MODE_INPUT(GPIOA_PIN8) | \
PIN_MODE_INPUT(GPIOA_PIN9) | \
PIN_MODE_INPUT(GPIOA_PIN10) | \
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \
PIN_MODE_INPUT(GPIOA_PIN11) | \
PIN_MODE_INPUT(GPIOA_PIN12) | \
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
PIN_MODE_INPUT(GPIOA_PIN15))
@ -205,8 +205,8 @@
PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \
PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN11) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN12) | \
PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
@ -221,8 +221,8 @@
PIN_OSPEED_40M(GPIOA_PIN8) | \
PIN_OSPEED_40M(GPIOA_PIN9) | \
PIN_OSPEED_40M(GPIOA_PIN10) | \
PIN_OSPEED_40M(GPIOA_OTG_FS_DM) | \
PIN_OSPEED_40M(GPIOA_OTG_FS_DP) | \
PIN_OSPEED_40M(GPIOA_PIN11) | \
PIN_OSPEED_40M(GPIOA_PIN12) | \
PIN_OSPEED_40M(GPIOA_SWDIO) | \
PIN_OSPEED_40M(GPIOA_SWCLK) | \
PIN_OSPEED_40M(GPIOA_PIN15))
@ -237,8 +237,8 @@
PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \
PIN_PUPDR_FLOATING(GPIOA_PIN11) | \
PIN_PUPDR_FLOATING(GPIOA_PIN12) | \
PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
PIN_PUPDR_PULLUP(GPIOA_PIN15))
@ -253,8 +253,8 @@
PIN_ODR_HIGH(GPIOA_PIN8) | \
PIN_ODR_HIGH(GPIOA_PIN9) | \
PIN_ODR_HIGH(GPIOA_PIN10) | \
PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \
PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \
PIN_ODR_HIGH(GPIOA_PIN11) | \
PIN_ODR_HIGH(GPIOA_PIN12) | \
PIN_ODR_HIGH(GPIOA_SWDIO) | \
PIN_ODR_HIGH(GPIOA_SWCLK) | \
PIN_ODR_HIGH(GPIOA_PIN15))
@ -269,8 +269,8 @@
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \
PIN_AFIO_AF(GPIOA_PIN9, 0) | \
PIN_AFIO_AF(GPIOA_PIN10, 0) | \
PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \
PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \
PIN_AFIO_AF(GPIOA_PIN11, 0) | \
PIN_AFIO_AF(GPIOA_PIN12, 0) | \
PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
PIN_AFIO_AF(GPIOA_PIN15, 0))

12
os/hal/boards/ST_NUCLEO_F030R8/cfg/board.chcfg
View File

@ -105,21 +105,21 @@
Mode="Input"
Alternate="0" />
<pin11
ID="OTG_FS_DM"
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Alternate"
Alternate="10" />
Mode="Input"
Alternate="0" />
<pin12
ID="OTG_FS_DP"
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Alternate"
Alternate="10" />
Mode="Input"
Alternate="0" />
<pin13
ID="SWDIO"
Type="PushPull"

40
os/hal/boards/ST_NUCLEO_F091RC/board.h
View File

@ -61,8 +61,8 @@
#define GPIOA_PIN8 8U
#define GPIOA_PIN9 9U
#define GPIOA_PIN10 10U
#define GPIOA_OTG_FS_DM 11U
#define GPIOA_OTG_FS_DP 12U
#define GPIOA_PIN11 11U
#define GPIOA_PIN12 12U
#define GPIOA_SWDIO 13U
#define GPIOA_SWCLK 14U
#define GPIOA_PIN15 15U
@ -178,8 +178,8 @@
*
* PA0 - PIN0 (input pullup).
* PA1 - PIN1 (input pullup).
* PA2 - USART_TX (alternate 7).
* PA3 - USART_RX (alternate 7).
* PA2 - USART_TX (alternate 1).
* PA3 - USART_RX (alternate 1).
* PA4 - PIN4 (input pullup).
* PA5 - LED_GREEN (output pushpull high).
* PA6 - PIN6 (input pullup).
@ -187,8 +187,8 @@
* PA8 - PIN8 (input pullup).
* PA9 - PIN9 (input pullup).
* PA10 - PIN10 (input pullup).
* PA11 - OTG_FS_DM (alternate 10).
* PA12 - OTG_FS_DP (alternate 10).
* PA11 - PIN11 (input floating).
* PA12 - PIN12 (input floating).
* PA13 - SWDIO (alternate 0).
* PA14 - SWCLK (alternate 0).
* PA15 - PIN15 (input pullup).
@ -204,8 +204,8 @@
PIN_MODE_INPUT(GPIOA_PIN8) | \
PIN_MODE_INPUT(GPIOA_PIN9) | \
PIN_MODE_INPUT(GPIOA_PIN10) | \
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \
PIN_MODE_INPUT(GPIOA_PIN11) | \
PIN_MODE_INPUT(GPIOA_PIN12) | \
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
PIN_MODE_INPUT(GPIOA_PIN15))
@ -220,8 +220,8 @@
PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \
PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN11) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN12) | \
PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
@ -236,8 +236,8 @@
PIN_OSPEED_40M(GPIOA_PIN8) | \
PIN_OSPEED_40M(GPIOA_PIN9) | \
PIN_OSPEED_40M(GPIOA_PIN10) | \
PIN_OSPEED_40M(GPIOA_OTG_FS_DM) | \
PIN_OSPEED_40M(GPIOA_OTG_FS_DP) | \
PIN_OSPEED_40M(GPIOA_PIN11) | \
PIN_OSPEED_40M(GPIOA_PIN12) | \
PIN_OSPEED_40M(GPIOA_SWDIO) | \
PIN_OSPEED_40M(GPIOA_SWCLK) | \
PIN_OSPEED_40M(GPIOA_PIN15))
@ -252,8 +252,8 @@
PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \
PIN_PUPDR_FLOATING(GPIOA_PIN11) | \
PIN_PUPDR_FLOATING(GPIOA_PIN12) | \
PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
PIN_PUPDR_PULLUP(GPIOA_PIN15))
@ -268,15 +268,15 @@
PIN_ODR_HIGH(GPIOA_PIN8) | \
PIN_ODR_HIGH(GPIOA_PIN9) | \
PIN_ODR_HIGH(GPIOA_PIN10) | \
PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \
PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \
PIN_ODR_HIGH(GPIOA_PIN11) | \
PIN_ODR_HIGH(GPIOA_PIN12) | \
PIN_ODR_HIGH(GPIOA_SWDIO) | \
PIN_ODR_HIGH(GPIOA_SWCLK) | \
PIN_ODR_HIGH(GPIOA_PIN15))
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0) | \
PIN_AFIO_AF(GPIOA_PIN1, 0) | \
PIN_AFIO_AF(GPIOA_USART_TX, 7) | \
PIN_AFIO_AF(GPIOA_USART_RX, 7) | \
PIN_AFIO_AF(GPIOA_USART_TX, 1) | \
PIN_AFIO_AF(GPIOA_USART_RX, 1) | \
PIN_AFIO_AF(GPIOA_PIN4, 0) | \
PIN_AFIO_AF(GPIOA_LED_GREEN, 0) | \
PIN_AFIO_AF(GPIOA_PIN6, 0) | \
@ -284,8 +284,8 @@
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \
PIN_AFIO_AF(GPIOA_PIN9, 0) | \
PIN_AFIO_AF(GPIOA_PIN10, 0) | \
PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \
PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \
PIN_AFIO_AF(GPIOA_PIN11, 0) | \
PIN_AFIO_AF(GPIOA_PIN12, 0) | \
PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
PIN_AFIO_AF(GPIOA_PIN15, 0))

16
os/hal/boards/ST_NUCLEO_F091RC/cfg/board.chcfg
View File

@ -39,7 +39,7 @@
Speed="High"
Resistor="Floating"
Mode="Alternate"
Alternate="7" />
Alternate="1" />
<pin3
ID="USART_RX"
Type="PushPull"
@ -47,7 +47,7 @@
Speed="High"
Resistor="Floating"
Mode="Alternate"
Alternate="7" ></pin3>
Alternate="1" />
<pin4
ID=""
Type="PushPull"
@ -105,21 +105,21 @@
Mode="Input"
Alternate="0" />
<pin11
ID="OTG_FS_DM"
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Alternate"
Alternate="10" />
Mode="Input"
Alternate="0" />
<pin12
ID="OTG_FS_DP"
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Alternate"
Alternate="10" />
Mode="Input"
Alternate="0" />
<pin13
ID="SWDIO"
Type="PushPull"

12
os/hal/boards/ST_NUCLEO_F302R8/cfg/board.chcfg
View File

@ -105,21 +105,21 @@
Mode="Input"
Alternate="0" />
<pin11
ID="OTG_FS_DM"
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Alternate"
Alternate="10" />
Mode="Input"
Alternate="0" />
<pin12
ID="OTG_FS_DP"
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Alternate"
Alternate="10" />
Mode="Input"
Alternate="0" />
<pin13
ID="SWDIO"
Type="PushPull"

32
os/hal/boards/ST_NUCLEO_F334R8/board.h
View File

@ -61,8 +61,8 @@
#define GPIOA_PIN8 8U
#define GPIOA_PIN9 9U
#define GPIOA_PIN10 10U
#define GPIOA_OTG_FS_DM 11U
#define GPIOA_OTG_FS_DP 12U
#define GPIOA_PIN11 11U
#define GPIOA_PIN12 12U
#define GPIOA_SWDIO 13U
#define GPIOA_SWCLK 14U
#define GPIOA_PIN15 15U
@ -188,8 +188,8 @@
* PA8 - PIN8 (input pullup).
* PA9 - PIN9 (input pullup).
* PA10 - PIN10 (input pullup).
* PA11 - OTG_FS_DM (alternate 10).
* PA12 - OTG_FS_DP (alternate 10).
* PA11 - PIN11 (input floating).
* PA12 - PIN12 (input floating).
* PA13 - SWDIO (alternate 0).
* PA14 - SWCLK (alternate 0).
* PA15 - PIN15 (input pullup).
@ -205,8 +205,8 @@
PIN_MODE_INPUT(GPIOA_PIN8) | \
PIN_MODE_INPUT(GPIOA_PIN9) | \
PIN_MODE_INPUT(GPIOA_PIN10) | \
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \
PIN_MODE_INPUT(GPIOA_PIN11) | \
PIN_MODE_INPUT(GPIOA_PIN12) | \
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
PIN_MODE_INPUT(GPIOA_PIN15))
@ -221,8 +221,8 @@
PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \
PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN11) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN12) | \
PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
@ -237,8 +237,8 @@
PIN_OSPEED_100M(GPIOA_PIN8) | \
PIN_OSPEED_100M(GPIOA_PIN9) | \
PIN_OSPEED_100M(GPIOA_PIN10) | \
PIN_OSPEED_100M(GPIOA_OTG_FS_DM) | \
PIN_OSPEED_100M(GPIOA_OTG_FS_DP) | \
PIN_OSPEED_100M(GPIOA_PIN11) | \
PIN_OSPEED_100M(GPIOA_PIN12) | \
PIN_OSPEED_100M(GPIOA_SWDIO) | \
PIN_OSPEED_100M(GPIOA_SWCLK) | \
PIN_OSPEED_100M(GPIOA_PIN15))
@ -253,8 +253,8 @@
PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \
PIN_PUPDR_FLOATING(GPIOA_PIN11) | \
PIN_PUPDR_FLOATING(GPIOA_PIN12) | \
PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
PIN_PUPDR_PULLUP(GPIOA_PIN15))
@ -269,8 +269,8 @@
PIN_ODR_HIGH(GPIOA_PIN8) | \
PIN_ODR_HIGH(GPIOA_PIN9) | \
PIN_ODR_HIGH(GPIOA_PIN10) | \
PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \
PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \
PIN_ODR_HIGH(GPIOA_PIN11) | \
PIN_ODR_HIGH(GPIOA_PIN12) | \
PIN_ODR_HIGH(GPIOA_SWDIO) | \
PIN_ODR_HIGH(GPIOA_SWCLK) | \
PIN_ODR_HIGH(GPIOA_PIN15))
@ -285,8 +285,8 @@
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \
PIN_AFIO_AF(GPIOA_PIN9, 0) | \
PIN_AFIO_AF(GPIOA_PIN10, 0) | \
PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \
PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \
PIN_AFIO_AF(GPIOA_PIN11, 0) | \
PIN_AFIO_AF(GPIOA_PIN12, 0) | \
PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
PIN_AFIO_AF(GPIOA_PIN15, 0))

12
os/hal/boards/ST_NUCLEO_F334R8/cfg/board.chcfg
View File

@ -105,21 +105,21 @@
Mode="Input"
Alternate="0" />
<pin11
ID="OTG_FS_DM"
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Alternate"
Alternate="10" />
Mode="Input"
Alternate="0" />
<pin12
ID="OTG_FS_DP"
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Alternate"
Alternate="10" />
Mode="Input"
Alternate="0" />
<pin13
ID="SWDIO"
Type="PushPull"

4
os/hal/boards/ST_NUCLEO_L053R8/cfg/board.chcfg
View File

@ -105,7 +105,7 @@
Mode="Input"
Alternate="0" />
<pin11
ID="OTG_FS_DM"
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
@ -113,7 +113,7 @@
Mode="Input"
Alternate="0" />
<pin12
ID="OTG_FS_DP"
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"

32
os/hal/boards/ST_NUCLEO_L152RE/board.h
View File

@ -60,8 +60,8 @@
#define GPIOA_PIN8 8U
#define GPIOA_PIN9 9U
#define GPIOA_PIN10 10U
#define GPIOA_OTG_FS_DM 11U
#define GPIOA_OTG_FS_DP 12U
#define GPIOA_PIN11 11U
#define GPIOA_PIN12 12U
#define GPIOA_SWDIO 13U
#define GPIOA_SWCLK 14U
#define GPIOA_PIN15 15U
@ -221,8 +221,8 @@
* PA8 - PIN8 (input pullup).
* PA9 - PIN9 (input pullup).
* PA10 - PIN10 (input pullup).
* PA11 - OTG_FS_DM (alternate 10).
* PA12 - OTG_FS_DP (alternate 10).
* PA11 - PIN11 (input floating).
* PA12 - PIN12 (input floating).
* PA13 - SWDIO (alternate 0).
* PA14 - SWCLK (alternate 0).
* PA15 - PIN15 (input pullup).
@ -238,8 +238,8 @@
PIN_MODE_INPUT(GPIOA_PIN8) | \
PIN_MODE_INPUT(GPIOA_PIN9) | \
PIN_MODE_INPUT(GPIOA_PIN10) | \
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \
PIN_MODE_INPUT(GPIOA_PIN11) | \
PIN_MODE_INPUT(GPIOA_PIN12) | \
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
PIN_MODE_INPUT(GPIOA_PIN15))
@ -254,8 +254,8 @@
PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \
PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN11) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN12) | \
PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
@ -270,8 +270,8 @@
PIN_OSPEED_40M(GPIOA_PIN8) | \
PIN_OSPEED_40M(GPIOA_PIN9) | \
PIN_OSPEED_40M(GPIOA_PIN10) | \
PIN_OSPEED_40M(GPIOA_OTG_FS_DM) | \
PIN_OSPEED_40M(GPIOA_OTG_FS_DP) | \
PIN_OSPEED_40M(GPIOA_PIN11) | \
PIN_OSPEED_40M(GPIOA_PIN12) | \
PIN_OSPEED_40M(GPIOA_SWDIO) | \
PIN_OSPEED_40M(GPIOA_SWCLK) | \
PIN_OSPEED_40M(GPIOA_PIN15))
@ -286,8 +286,8 @@
PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \
PIN_PUPDR_FLOATING(GPIOA_PIN11) | \
PIN_PUPDR_FLOATING(GPIOA_PIN12) | \
PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
PIN_PUPDR_PULLUP(GPIOA_PIN15))
@ -302,8 +302,8 @@
PIN_ODR_HIGH(GPIOA_PIN8) | \
PIN_ODR_HIGH(GPIOA_PIN9) | \
PIN_ODR_HIGH(GPIOA_PIN10) | \
PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \
PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \
PIN_ODR_HIGH(GPIOA_PIN11) | \
PIN_ODR_HIGH(GPIOA_PIN12) | \
PIN_ODR_HIGH(GPIOA_SWDIO) | \
PIN_ODR_HIGH(GPIOA_SWCLK) | \
PIN_ODR_HIGH(GPIOA_PIN15))
@ -318,8 +318,8 @@
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \
PIN_AFIO_AF(GPIOA_PIN9, 0) | \
PIN_AFIO_AF(GPIOA_PIN10, 0) | \
PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \
PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \
PIN_AFIO_AF(GPIOA_PIN11, 0) | \
PIN_AFIO_AF(GPIOA_PIN12, 0) | \
PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
PIN_AFIO_AF(GPIOA_PIN15, 0))

12
os/hal/boards/ST_NUCLEO_L152RE/cfg/board.chcfg
View File

@ -109,21 +109,21 @@
Mode="Input"
Alternate="0" />
<pin11
ID="OTG_FS_DM"
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Alternate"
Alternate="10" />
Mode="Input"
Alternate="0" />
<pin12
ID="OTG_FS_DP"
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Alternate"
Alternate="10" />
Mode="Input"
Alternate="0" />
<pin13
ID="SWDIO"
Type="PushPull"