git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6459 35acf78f-673a-0410-8e92-d51de3d6d3f4
parent
ee44b486e5
commit
e7ea2e070e
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@ -78,6 +78,14 @@
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STM32_DMA_GETCHANNEL(STM32_UART_USART6_TX_DMA_STREAM, \
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STM32_USART6_TX_DMA_CHN)
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#define STM32_UART45_CR2_CHECK_MASK \
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(USART_CR2_STOP_0 | USART_CR2_CLKEN | USART_CR2_CPOL | USART_CR2_CPHA | \
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USART_CR2_LBCL)
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#define STM32_UART45_CR3_CHECK_MASK \
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(USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE | USART_CR3_SCEN | \
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USART_CR3_NACK)
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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@ -571,6 +579,12 @@ void uart_lld_start(UARTDriver *uartp) {
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#if STM32_UART_USE_UART4
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if (&UARTD4 == uartp) {
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bool b;
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chDbgAssert((uartp->config->cr2 & STM32_UART45_CR2_CHECK_MASK) == 0,
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"specified invalid bits in UART4 CR2 register settings");
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chDbgAssert((uartp->config->cr3 & STM32_UART45_CR3_CHECK_MASK) == 0,
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"specified invalid bits in UART4 CR3 register settings");
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b = dmaStreamAllocate(uartp->dmarx,
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STM32_UART_UART4_IRQ_PRIORITY,
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(stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
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@ -591,6 +605,12 @@ void uart_lld_start(UARTDriver *uartp) {
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#if STM32_UART_USE_UART5
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if (&UARTD5 == uartp) {
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bool b;
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chDbgAssert((uartp->config->cr2 & STM32_UART45_CR2_CHECK_MASK) == 0,
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"specified invalid bits in UART5 CR2 register settings");
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chDbgAssert((uartp->config->cr3 & STM32_UART45_CR3_CHECK_MASK) == 0,
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"specified invalid bits in UART5 CR3 register settings");
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b = dmaStreamAllocate(uartp->dmarx,
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STM32_UART_UART5_IRQ_PRIORITY,
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(stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
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@ -80,7 +80,7 @@
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* @details If set to @p TRUE the support for UART5 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(STM32_UART_USE_UART4) || defined(__DOXYGEN__)
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#if !defined(STM32_UART_USE_UART5) || defined(__DOXYGEN__)
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#define STM32_UART_USE_UART5 FALSE
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#endif
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@ -222,25 +222,25 @@
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#endif
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#if STM32_UART_USE_UART4
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#if !STM32_HAS_UART4
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#error "UART4 not present in the selected device"
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#endif
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#if !defined(STM32F2XX) && !defined(STM32F4XX)
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#error "UART4 DMA access not supported in this platform"
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#endif
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#if !STM32_HAS_UART4
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#error "UART4 not present in the selected device"
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#endif
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#if !defined(STM32F2XX) && !defined(STM32F4XX)
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#error "UART4 DMA access not supported in this platform"
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#endif
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#endif /* STM32_UART_USE_UART4 */
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#if STM32_UART_USE_UART5
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#if !STM32_HAS_UART5
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#error "UART5 not present in the selected device"
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#endif
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#if !defined(STM32F2XX) && !defined(STM32F4XX)
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#error "UART5 DMA access not supported in this platform"
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#endif
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#if !STM32_HAS_UART5
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#error "UART5 not present in the selected device"
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#endif
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#if !defined(STM32F2XX) && !defined(STM32F4XX)
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#error "UART5 DMA access not supported in this platform"
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#endif
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#endif /* STM32_UART_USE_UART5 */
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#if STM32_UART_USE_USART6 && !STM32_HAS_USART6
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#error "USART6 not present in the selected device"
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#endif
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@ -382,18 +382,36 @@
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#error "invalid DMA stream associated to USART3 TX"
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#endif
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#if STM32_UART_USE_UART4 && \
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!STM32_DMA_IS_VALID_ID(STM32_UART_UART4_RX_DMA_STREAM, \
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STM32_UART4_RX_DMA_MSK)
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#error "invalid DMA stream associated to UART4 RX"
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#endif
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#if STM32_UART_USE_UART4 && \
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!STM32_DMA_IS_VALID_ID(STM32_UART_UART4_TX_DMA_STREAM, \
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STM32_UART4_TX_DMA_MSK)
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#error "invalid DMA stream associated to UART4 TX"
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#endif
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#if STM32_UART_USE_UART5 && \
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!STM32_DMA_IS_VALID_ID(STM32_UART_UART5_RX_DMA_STREAM, \
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STM32_UART5_RX_DMA_MSK)
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#error "invalid DMA stream associated to UART5 RX"
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#endif
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#if STM32_UART_USE_UART5 && \
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!STM32_DMA_IS_VALID_ID(STM32_UART_UART5_TX_DMA_STREAM, \
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STM32_UART5_TX_DMA_MSK)
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#error "invalid DMA stream associated to UART5 TX"
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#endif
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#if STM32_UART_USE_USART6 && \
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!STM32_DMA_IS_VALID_ID(STM32_UART_USART6_RX_DMA_STREAM, \
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STM32_USART6_RX_DMA_MSK)
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#error "invalid DMA stream associated to USART6 RX"
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#endif
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#if STM32_UART_USE_USART6 && \
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!STM32_DMA_IS_VALID_ID(STM32_UART_USART6_TX_DMA_STREAM, \
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STM32_USART6_TX_DMA_MSK)
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