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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6459 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2013-11-12 09:58:30 +00:00
parent ee44b486e5
commit e7ea2e070e
2 changed files with 53 additions and 15 deletions
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20
os/hal/ports/STM32/USARTv1/uart_lld.c
View File

@ -78,6 +78,14 @@
STM32_DMA_GETCHANNEL(STM32_UART_USART6_TX_DMA_STREAM, \
STM32_USART6_TX_DMA_CHN)
#define STM32_UART45_CR2_CHECK_MASK \
(USART_CR2_STOP_0 | USART_CR2_CLKEN | USART_CR2_CPOL | USART_CR2_CPHA | \
USART_CR2_LBCL)
#define STM32_UART45_CR3_CHECK_MASK \
(USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE | USART_CR3_SCEN | \
USART_CR3_NACK)
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
@ -571,6 +579,12 @@ void uart_lld_start(UARTDriver *uartp) {
#if STM32_UART_USE_UART4
if (&UARTD4 == uartp) {
bool b;
chDbgAssert((uartp->config->cr2 & STM32_UART45_CR2_CHECK_MASK) == 0,
"specified invalid bits in UART4 CR2 register settings");
chDbgAssert((uartp->config->cr3 & STM32_UART45_CR3_CHECK_MASK) == 0,
"specified invalid bits in UART4 CR3 register settings");
b = dmaStreamAllocate(uartp->dmarx,
STM32_UART_UART4_IRQ_PRIORITY,
(stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
@ -591,6 +605,12 @@ void uart_lld_start(UARTDriver *uartp) {
#if STM32_UART_USE_UART5
if (&UARTD5 == uartp) {
bool b;
chDbgAssert((uartp->config->cr2 & STM32_UART45_CR2_CHECK_MASK) == 0,
"specified invalid bits in UART5 CR2 register settings");
chDbgAssert((uartp->config->cr3 & STM32_UART45_CR3_CHECK_MASK) == 0,
"specified invalid bits in UART5 CR3 register settings");
b = dmaStreamAllocate(uartp->dmarx,
STM32_UART_UART5_IRQ_PRIORITY,
(stm32_dmaisr_t)uart_lld_serve_rx_end_irq,

24
os/hal/ports/STM32/USARTv1/uart_lld.h
View File

@ -80,7 +80,7 @@
* @details If set to @p TRUE the support for UART5 is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_UART_USE_UART4) || defined(__DOXYGEN__)
#if !defined(STM32_UART_USE_UART5) || defined(__DOXYGEN__)
#define STM32_UART_USE_UART5 FALSE
#endif
@ -229,7 +229,7 @@
#if !defined(STM32F2XX) && !defined(STM32F4XX)
#error "UART4 DMA access not supported in this platform"
#endif
#endif
#endif /* STM32_UART_USE_UART4 */
#if STM32_UART_USE_UART5
#if !STM32_HAS_UART5
@ -239,7 +239,7 @@
#if !defined(STM32F2XX) && !defined(STM32F4XX)
#error "UART5 DMA access not supported in this platform"
#endif
#endif
#endif /* STM32_UART_USE_UART5 */
#if STM32_UART_USE_USART6 && !STM32_HAS_USART6
#error "USART6 not present in the selected device"
@ -382,18 +382,36 @@
#error "invalid DMA stream associated to USART3 TX"
#endif
#if STM32_UART_USE_UART4 && \
!STM32_DMA_IS_VALID_ID(STM32_UART_UART4_RX_DMA_STREAM, \
STM32_UART4_RX_DMA_MSK)
#error "invalid DMA stream associated to UART4 RX"
#endif
#if STM32_UART_USE_UART4 && \
!STM32_DMA_IS_VALID_ID(STM32_UART_UART4_TX_DMA_STREAM, \
STM32_UART4_TX_DMA_MSK)
#error "invalid DMA stream associated to UART4 TX"
#endif
#if STM32_UART_USE_UART5 && \
!STM32_DMA_IS_VALID_ID(STM32_UART_UART5_RX_DMA_STREAM, \
STM32_UART5_RX_DMA_MSK)
#error "invalid DMA stream associated to UART5 RX"
#endif
#if STM32_UART_USE_UART5 && \
!STM32_DMA_IS_VALID_ID(STM32_UART_UART5_TX_DMA_STREAM, \
STM32_UART5_TX_DMA_MSK)
#error "invalid DMA stream associated to UART5 TX"
#endif
#if STM32_UART_USE_USART6 && \
!STM32_DMA_IS_VALID_ID(STM32_UART_USART6_RX_DMA_STREAM, \
STM32_USART6_RX_DMA_MSK)
#error "invalid DMA stream associated to USART6 RX"
#endif
#if STM32_UART_USE_USART6 && \
!STM32_DMA_IS_VALID_ID(STM32_UART_USART6_TX_DMA_STREAM, \
STM32_USART6_TX_DMA_MSK)